[Tcwg-commits] [llvm] branch stable updated (64184ec178e -> 6281d8cca4f)

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from 64184ec178e Creating branches/google/testing and tags/google/testing/20 [...] adds 652842ec9ac [mips] Use register scavenging with MSA. adds a223e909914 [X86] Fix bug in legalize vector types - Split large loads adds f08c3d1d13d [ExpandMemCmp] Split ExpandMemCmp from CodeGen into its own pass. adds c0222867301 Revert "[ExpandMemCmp] Split ExpandMemCmp from CodeGen into [...] adds 2880b72d32a [RS4GC] Strip off invariant.start because memory locations [...] adds 685fd434908 Revert "[RS4GC] Strip off invariant.start because memory lo [...] adds 9cca1f183a2 [dsymutil] Add a manpage for dsymutil adds 0416327f197 [TargetParser][AArch64] Reorder enum to preserve 5.0.0 libL [...] adds 4c88213d82f Fixed line length style issue. adds 0c059eff813 Strip off invariant.start because memory locations arent invariant adds 2f759d471a7 [dsymutil][doc] Improve wording in manpage and rename file. adds 161385fddde [X86] Change getHostCPUName fallback code to not select 'x8 [...] adds 2bbdf002305 [X86] Simplify the pentium4 code in getHostCPUName to be ba [...] adds ce68f2c6292 [test] Move llvm-lib tests into tools/llvm-lib. NFC. adds 15f5deb8cb6 Fix llvm-dsymutil test in -DLLVM_ENABLE_THREADS=OFF mode adds c626458f762 [cmake] Remove policy conditionals adds 37bbee84d83 AMDGPU: Remove outdated fixme (it was already fixed) adds 2e63034efd7 Add missing header guards. adds b69a2a9ae35 [LoopPredication] Enable predication when latchCheckIV is w [...] adds dc666ea9df6 Clean up comments in include/llvm-c/DebugInfo.h adds fbb50d9079f [tools] Add option to install binutils symlinks adds da35e5e8bec [Hexagon] Prefer L2_loadrub_io over L4_loadrub_rr adds dd33e177dd8 Irreducible loop metadata for more accurate block frequency [...] adds f79fab6f98f AMDGPU: Fix warning discovered by r317266 [-Wunused-private-field] adds 56898c12450 Add feature to determine if host architecture is 64-bit in [...] adds a555cf06835 IndVarSimplify: preserve debug information attached to wide [...] adds 6d06c893037 [X86] Give AVX512VL instructions priority over their AVX eq [...] adds 89fd072604f [llvm-objcopy] Fix bug in how segment alignment was being handled adds 0ae3f32f564 mir-canon: First commit. adds 87cdca2231e [AArch64][RegisterBankInfo] Add FPR16 support in value mapping. adds d8375d73687 [AArch64][RegisterBankInfo] Add mapping for G_FPEXT. adds b57c6f4150d [Verifier] Remove the -verify-debug-info cl::opt adds c7ddffcd329 Reland "Add feature to determine if host architecture is 64 [...] adds 1bd292583c0 Avoid PLT for external calls when attribute nonlazybind is used. adds 931b3020257 [LSR] Clarify a comment. NFC. adds 06d5ebdc631 [TableGen] Add an extra blank line to DAGISel output file t [...] adds c43a693efb0 [X86] Remove PALIGNR/VALIGN handling from combineBitcastFor [...] adds 37104fff45a [llvm-nm] Print 'I' for import table data in COFF adds f30757f3b07 [llvm-nm] Don't error out on multiple occurrances of the -g [...] adds 691ff5f8503 [NFC] Get rid of hard-coded value ID in test adds 19a3ba35df2 [AArch64] Use dwarf exception handling on MinGW adds ba9125e489d [PEI] Simplify handling of targets with no phys regs. NFC adds 74ecc3ab6b5 [Analysis] Refine matching and merging of TBAA tags adds 52811121613 [ARM GlobalISel] Move the check for Thumb higher up adds a7372f15c92 [globalisel][tablegen] Skip src child predicates adds 6cd2a99eb67 [PartialInliner] Skip call sites where inlining fails. adds eb7c044ce99 [X86][SSE] Add PACKUS support to combineVectorTruncation adds 3d456013b6b re-land [ExpandMemCmp] Split ExpandMemCmp from CodeGen into [...] adds 9e5188ca177 [ADCE] Use MapVector for BlockInfo to make iteration order [...] adds c9ed638d214 [LoopPredication] NFC: Refactored code to separate out func [...] adds d1f487bc595 Fix for Bug 34475 - LOCK/REP/REPNE prefixes emitted as inst [...] adds 876a9b9b65e [mips] Match 'ins' and its' variants with C++ code adds d16b502afd1 [SLP] Test for PR23510, NFC. adds 7c2eb4ec8b2 [LICM] sink through non-trivially replicable PHI adds 604f04f397e Invoke salvageDebugInfo from CodeGenPrepare's SinkCast() adds 761cb9cc0a2 [X86] Initialize Type and Subtype in getHostCPUName to 0. adds aaf1db11f9e [CodeGen] Remove unnecessary semicolons to fix a warning. NFC adds 6a8da4f6fee Revert "Invoke salvageDebugInfo from CodeGenPrepare's SinkCast()" adds aba0da108e9 The patch fixes PR35131 adds 8f805056c27 [AArch64] Fix the number of iterations for the Newton series adds a8631b87aef [llvm-objcopy] Add support for dwarf fission adds 1b91c5e8aad Add CallSiteSplitting pass adds 06dbf5ad006 Reland "Add support for writing 64-bit symbol tables for ar [...] adds c86c85f907f Revert "Add CallSiteSplitting pass" adds b24883f402d [X86] Promote athlon, athlon-xp, k8, and k8-sse3 to types i [...] adds b72a3a9da43 [cfi-verify] Add an interesting unit test where undef searc [...] adds bdc30c02fb2 Add llvm::for_each as a range-based extensions to <algorith [...] adds 2619256bd71 Correcting some CRLFs that snuck in with my previous commit; NFC. adds af481e4f940 [llvm-ar] Support an options string that start with a dash adds ceb5b1b4346 Modularize: Include some required headers adds f4beb75be0f Recommit r317351 : Add CallSiteSplitting pass adds 79eed6909a1 [cfi-verify] Add blacklist parsing for result filtering. adds 352adf2ec9c llvm-objdump: Fix unused-lambda-capture warning by removing [...] adds 7711c315b29 GCOV: Move GCOV from IR & Support into ProfileData to fix layering adds 4fedc84270a [SimplifyCFG] When merging conditional stores, don't count [...] adds 9cf32a0f1d2 Revert r317046, "Object: Move some code from ELF.h into ELF.cpp." adds ce8f24e6d75 Fix a crash in llvm-objdump when printing a bad x86_64 relo [...] adds cdc57825ed6 [LTO][ThinLTO] Use the linker resolutions to mark global va [...] adds 29c52e4fc98 Invoke salvageDebugInfo from CodeGenPrepare's SinkCast() adds 803f827385f Move TargetFrameLowering.h to CodeGen where it's implemented adds be2858c001c [X86] Give unary PERMI priority over SHUF128 in lowerV8I64V [...] adds 1024a3777d9 [CallSiteSplitting] Silence GCC's -Wparentheses. NFCI. adds f0732934fcd [CallSiteSplitting] clang-format my last commit. NFCI. adds f1b2e0b26a4 Revert "[LTO][ThinLTO] Use the linker resolutions to mark g [...] adds ac439ba1eaa llvm/test/Object/archive-SYM64-write.test: Delete large tem [...] adds 5473af66611 CMake: Let LLVM_BUILD_32_BITS aware of large file. adds 19bc3f9a843 [X86] Teach shuffle lowering to use 256-bit SHUF128 when possible. adds ce4da272347 llvm/test/lit.cfg.py: Don't set the feature "llvm-64-bits" [...] adds dcf1ffe8a08 [LTO][ThinLTO] Use the linker resolutions to mark global va [...] adds 35934f8100a [AMDGPU] Remove hardcoded address space value from AMDGPULibFunc adds e775c347e59 [X86] Teach EVEX->VEX pass to turn SHUFI32X4/SHUFF32X4/SHUF [...] adds cf0e1f6fa73 [X86] Regenerate a couple more tests that I missed in r317410. adds 1b23a75d3e2 [X86] Don't use RCP14 and RSQRT14 for reciprocal estimation [...] adds 010bb80a59a Move these CMake projects into the Tests folder on IDEs lik [...] adds 33cfb89938b Move the LLVMCFIVerify project into the Libraries folder on [...] adds 3639f551552 Move the srpm, ocaml_make_directory, llvm_vcsrevision_h, an [...] adds 60528d6193e Move the llvm-tblgen project into the Tablegenning folder o [...] adds 73fca577073 Use code voice for DIBuilder in LLVM C API adds c80a0ef3c0c [X86][AVX] Regenerate test. NFCI. adds 30669bbc403 [CGP] Extends the scope of optimizeMemoryInst optimization adds 6479e734e3c [CGP] Extends the scope of optimizeMemoryInst optimization. NFC adds d3469412e0c [CGP] Fix the bug found by asan. adds 1511d2e7fef [LV][X86] update the cost of interleaving mem. access of floats adds 08eb02abdb5 [REVERT][LV][X86] update the cost of interleaving mem. acce [...] adds ee9947c063c [SLPVectorizer] minimize tests and auto-generate full checks; NFC adds ee5e3180393 [LV/LAA] Avoid specializing a loop for stride=1 when this p [...] adds 56069612804 [X86][SSE] Tests for integer min/max horizontal reductions adds f99fcce45b7 [X86] Fix outdated comment. NFC adds 3594a87170e [X86] Remove some more RCP and RSQRT patterns from InstrAVX [...] adds d864a8df8f6 [X86] Add missing predicate to a pattern. NFC adds c8200b76884 [PassManager, SimplifyCFG] Revert r316908 and r316869. adds 67a801250fe [X86] Use EVEX encoded instructions for legacy scalar sqrt [...] adds 105371319b2 [X86] Simplify command lines on the fma-instrinsics-x86.ll [...] adds 9b9ae41a885 [X86] Add avx512vl command line to fma-instrinsics-x86.ll adds af14030ea20 [X86] Add scalar FMA ISD nodes without rounding mode. NFC adds f9f3d363763 [X86] Use EVEX encoded intrinsics for legacy FMA intrinsics [...] adds 2513e7c5ce7 adding a pattern for broadcastm adds 028edca1226 [x86][AVX512] Lowering Broadcastm intrinsics to LLVM IR adds 8738ed486fb [ObjectYAML] Map relocation types for COFF ARMNT and ARM64 adds 708a132cbc0 [test] Add test files that were missed from SVN r317459 adds 150ca1191c0 Revert "adding a pattern for broadcastm" adds 807235c9ea1 X86 ISel: Basic support for variable-index vector permutations adds 16b230fc73d [X86] Replace duplicate function call with variable. NFC adds d8ea26422cf [X86][AVX512] Improve lowering of AVX512 test intrinsics adds d64a5991124 Fixed dead links in WritingAnLLVMPass.rst adds 194c54be450 [mips] Fix PR35140 adds 84066df4d90 [LV][X86] update the cost of interleaving mem. access of floats adds 2b2534cd857 [docs] Update code block for compatibility with Sphinx 1.5.1 adds dfaa4d2c2bc [mips] Add movep for microMIPS32R6 and fix microMIPS32r3 version adds 13a223e6e62 [AMDGPU] Fix assertion due to assuming pointer in default a [...] adds 044ea898ddf [SystemZ] implement hasDivRemOp() adds ec1f0cc416a [AMDGPU] Change alloca addr space of r600 to 5 for amdgiz e [...] adds 6e1c5e0143d [X86][SSE] Combine EXTRACT_VECTOR_ELT with combineExtractWi [...] adds d27af430ac1 [SLP] Test for PR35047, NFC. adds ae8a0007cb8 [X86][SSE] Merge combineExtractVectorElt_SSE into combineEx [...] adds 00e900afdbd [IR] redefine 'UnsafeAlgebra' / 'reassoc' fast-math-flags a [...] adds 94bed7d9687 Canonicalize spelling of long-form-options in dsymutil.rst adds bd04b64cd12 AMDGPU: Select v_mad_u64_u32 and v_mad_i64_i32 adds 6e029979011 Make MCAsmBackend and MCCodeEmiiter passed by unique_ptr rval adds 416cdcce390 [PPC] Use xxbrd to speed up bswap64 adds 0ec29cbb9c9 [cfi-verify] Added a simple check that stops division-by-ze [...] adds 561a742524f Include already promoted counts when computing SUM for VP. adds 20a90ab7468 Adds code to PPC ISEL lowering to recognize byte inserts fr [...] adds e005ea7d878 Fix buildbot breakages from r317503. Add parentheses to as [...] adds 82cd943eb1d update_mir_test_checks: Be careful about replacing entire vregs adds aceaaf0aecb [InstCombine] Pull shifts through a select plus binop with [...] adds 4cbab70b625 [MIRPrinter] Use %subreg.xxx syntax for subregister index operands adds cebfaaf903b Fix comment /NFC adds 2c99ae89abb Revert r316064 "Fix the incorrect detection of ICONV_LIBRARY_PATH" adds e209a1a12de Revert r317510 "[InstCombine] Pull shifts through a select [...] adds 618cf290880 [ValueTracking] readonly (const) is a requirement for conve [...] adds 490bc3940dd [X86] Make FeatureAVX512 imply FeatureFMA. adds acf8758c20c [X86] Make FeatureAVX512 imply FeatureF16C. adds 790be31f8c5 InstCombine: salvage the debug info of DCE'ed add instructions. adds b67df9f5a06 [Support][Chrono] Use explicit cast of text output of time values. adds 0ffa8796b2c [DebugInfo] Unify logic to merge DILocations. NFC. adds db6cc311a07 AMDGPU: Remove redundant combine adds 964a48a5b6b [IPO/LowerTypesTest] Skip blockaddress(es) when replacing uses. adds ed2657e43a7 [XRay] Minimal tool to convert xray traces to Chrome's Trac [...] adds 0227fe59a98 Make DIExpression::createFragmentExpression() return an Optional. adds 59aa4918d09 [Support/UNIX] posix_fallocate() can fail with EINVAL. adds 0b9dcde0fae [X86] Remove 'Requires' from instructions with no patterns. NFC adds f14ad9a908a [X86] Use IMPLICIT_DEF in VEX/EVEX vcvtss2sd/vcvtsd2ss patt [...] adds 60b616c374b [X86] Add AVX512VL command line to f16c intrinsic test to s [...] adds 0c6a9e1d8e3 [X86] Add support for using EVEX instructions for the legac [...] adds bfc01346197 [X86] Remove alignment from a load in the f16c intrinsic te [...] adds 2765e2df21a [X86] Add a test for a 128-bit vector load feeding a cvtph2 [...] adds 7f4581842bd [X86] Add patterns for folding a v16i8 with the VEX vcvtph2 [...] adds c305f3d45a5 [X86] Add patterns to fold a 64-bit load into the EVEX vcvt [...] adds c1c411e7a86 [X86] Don't clobber reserved registers with stack adjustments adds 51bcf5f4a57 [docs][ARM] Add HowTo for cross compiling and testing compi [...] adds e82a7f1476b [CGP] Disable Select instruction handling in optimizeMemory [...] adds b79469ca2fb [GlobalISel] Enable legalizing non-power-of-2 sized types. adds 8aa5d0fb6a1 [AArch64][SVE] Asm: Extend EnforceVectorSubVectorTypeIs to [...] adds 55f6a859ccb Silence C4715 warning from MSVC (NFC). adds c5e08cf67c8 [AArch64][SVE] Asm: Replace 'IsVector' by 'RegKind' in AArc [...] adds 1ed4428b8f0 [X86] Regenerate select tests adds 7c37aa1189e Add a -D flag to FileCheck to define variables adds 81d5ecb65cb Mark intentional fall-through with LLVM_FALLTHROUGH. adds 25ff19d87a3 [SLP] Fix PR35047: Fix default cost model for cast op in X86. adds d142ab12fc9 Silence MSVC error C2398 adds 8cec6c49168 Reland "Correct dwarf unwind information in function epilog [...] adds 861d2963c7a [AArch64][SVE] Asm: Set SVE as unsupported feature for exis [...] adds 70b92b659fe [SelectionDAG] Fix typo in comment. NFC adds 6cf02b953eb [AArch64][SVE] Asm: Add SVE (Z) Register definitions and pa [...] adds 99835246622 [AArch64][SVE] Asm: Add support for (ADD|SUB)_ZZZ adds 5933b2471c8 [Hexagon] Make a test more flexible in HexagonLoopIdiomRecognition adds 3c64d8ff3ae [InstCombine] Update stale comment. NFC adds 7e1904e9c8a Recommit r317510 "[InstCombine] Pull shifts through a selec [...] adds e9d757c19ed [DWARFv5] Support DW_FORM_strp in the .debug_line header. adds a2fd1c7e77b [DWARFv5] Add new test for previous commit. adds 2725af04109 Convert a dwarfdump test from checked-in binary to assemble [...] adds 5363e7a31e7 Use new vector insert half-word and byte instructions when [...] adds c062c8dc61d [CodeGenPrepare] Fix typo in comment. NFC adds 56fec39d44a Extend SpecialCaseList to allow users to blame matches on e [...] adds c7c5ad77745 [SLPVectorizer] Failure to beneficially vectorize 'copyable [...] adds 595a4486c10 Allow yaml2obj to order implicit sections for ELF adds d8660fa5dc3 [NVPTX] Implement __nvvm_atom_add_gen_d builtin. adds 1d494b9e822 Fix build bots after r317622 adds aa34334e90f Revert r317609, test fails on one bot adds 7c6de050f84 Revert "Allow yaml2obj to order implicit sections for ELF" adds d37de6a8652 Reapply r317609 with a simpler sed script, thanks to Justin [...] adds ea30756f682 Attribute nonlazybind should not affect calls to functions [...] adds cee04762ca1 Revert rL317618 adds a932c3f118f AMDGPU: Set correct sched model on v_mad_u64_u32 adds 9fd7184f642 Reapply: Allow yaml2obj to order implicit sections for ELF adds 48319238e40 Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to ma [...] adds 0fa582d74a7 Convert FileOutputBuffer to Expected. NFC. adds 29fa40c962b Update unittest too. adds aeaece745d6 Revert "Reapply: Allow yaml2obj to order implicit sections [...] adds 14c636043c9 Convert FileOutputBuffer::commit to Error. adds c30df5f3d38 [X86] Allow legacy vcvtps2ph intrinsics to select EVEX enco [...] adds d550a31777f [X86] Add patterns to fold EVEX store with EVEX encoded vcv [...] adds 2c8a33ad124 [CGP] Enable extending scope of optimizeMemoryInst adds 600fc9c8370 Revert "[CGP] Enable extending scope of optimizeMemoryInst" adds 19b50e8dffa DAG: Add computeKnownBitsForFrameIndex adds 4d211caa376 [NFCI] Ensure TargetOpcode::* are compatible with guessInst [...] adds 4514930eb0a BasicAA: fix bug where we would return partialalias instead [...] adds d036c9c4396 [mips] Guard indirect and tailcall pseudo instructions correctly. adds 96342ebf2a0 [Analysis] Fix merging TBAA tags with different final access types adds c5abad3f598 [RISCV] Codegen support for materializing constants adds 21ae2e7a569 [RISCV] Codegen support for memory operations adds 6c9938cf11d [RISCV] Codegen support for memory operations on global addresses adds eacca308e4e [RISCV] Codegen for conditional branches adds da781c72957 [RISCV] Initial support for function calls adds a3ad9bd475b [utils] Add RISC-V support to update_llc_test_checks.py adds 41dfa199812 [CMake] Add custom target to create build directory adds d44ed288f9e [CMake] Remove target to build native tablegen adds 15443bdc4b6 [X86] Add some initial scheduling tests for generic x86 ins [...] adds 27b6b3117fa Handle inlined variables in SelectionDAGBuilder::EmitFuncAr [...] adds cf89e1c2fe8 NFC: Rename MCSafeSEHFragment to MCSymbolIdFragment adds 8e0d3d4cd77 [WebAssembly] Revise the strategy for inline asm. adds 29ba7f646bb Un-XFAIL a test after the bugfix in r317702. adds 40486d7dcf7 [WebAssembly] Call signExtend to get sign extended register adds 94964bb7560 [WebAssembly] Add a test for inline-asm "m" constraints. adds ca3cf87eee5 [ValueTracking] Use APInt::isNullValue/isOneValue which are [...] adds 9799e6facce [X86] Don't call validateInstruction from MatchAndEmitInstr [...] adds dcf64df89bc [ThinLTO] Ensure sanitizer passes are run new 6281d8cca4f Creating branches/google/stable and tags/google/stable/ fro [...]

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Summary of changes: CMakeLists.txt | 45 +- cmake/config-ix.cmake | 2 +- cmake/modules/AddOCaml.cmake | 1 + cmake/modules/CrossCompile.cmake | 5 +- cmake/modules/HandleLLVMOptions.cmake | 5 + cmake/modules/TableGen.cmake | 15 +- docs/CMake.rst | 4 + docs/CMakeLists.txt | 11 +- docs/CommandGuide/FileCheck.rst | 5 + docs/CommandGuide/dsymutil.rst | 89 + docs/CommandGuide/index.rst | 1 + docs/CommandGuide/lli.rst | 12 +- docs/CommandGuide/llvm-pdbutil.rst | 8 +- docs/GetElementPtr.rst | 2 +- docs/HowToCrossCompileBuiltinsOnArm.rst | 201 ++ docs/LangRef.rst | 281 +- docs/SourceLevelDebugging.rst | 2 +- docs/WritingAnLLVMPass.rst | 4 +- docs/index.rst | 4 + include/llvm-c/DebugInfo.h | 148 +- include/llvm/ADT/MapVector.h | 7 + include/llvm/ADT/STLExtras.h | 7 + include/llvm/Analysis/BlockFrequencyInfo.h | 4 + include/llvm/Analysis/BlockFrequencyInfoImpl.h | 49 +- .../CodeGen/GlobalISel/InstructionSelectorImpl.h | 2 +- include/llvm/CodeGen/GlobalISel/LegalizerInfo.h | 377 ++- include/llvm/CodeGen/MachineBasicBlock.h | 10 + include/llvm/CodeGen/MachineBlockFrequencyInfo.h | 2 + include/llvm/CodeGen/MachineInstr.h | 15 + include/llvm/CodeGen/Passes.h | 6 + include/llvm/CodeGen/ResourcePriorityQueue.h | 2 +- include/llvm/CodeGen/StackMaps.h | 2 +- include/llvm/CodeGen/TailDuplicator.h | 4 +- .../llvm/{Target => CodeGen}/TargetFrameLowering.h | 14 +- include/llvm/{Target => CodeGen}/TargetInstrInfo.h | 2 +- include/llvm/DebugInfo/DWARF/DWARFDebugLine.h | 8 +- include/llvm/DebugInfo/DWARF/DWARFFormValue.h | 14 +- include/llvm/IR/BasicBlock.h | 2 + include/llvm/IR/DebugInfoMetadata.h | 26 +- include/llvm/IR/Instruction.h | 24 +- include/llvm/IR/IntrinsicsNVVM.td | 7 +- include/llvm/IR/LLVMContext.h | 1 + include/llvm/IR/MDBuilder.h | 3 + include/llvm/IR/ModuleSummaryIndex.h | 12 +- include/llvm/IR/ModuleSummaryIndexYAML.h | 8 +- include/llvm/IR/Operator.h | 113 +- include/llvm/IR/Value.h | 6 + include/llvm/InitializePasses.h | 4 + include/llvm/LinkAllPasses.h | 1 + include/llvm/MC/MCFragment.h | 11 +- include/llvm/Object/ELF.h | 263 ++ include/llvm/ObjectYAML/COFFYAML.h | 10 + include/llvm/{Support => ProfileData}/GCOV.h | 4 +- include/llvm/ProfileData/SampleProfReader.h | 2 +- include/llvm/Support/CMakeLists.txt | 1 + include/llvm/Support/FileOutputBuffer.h | 6 +- include/llvm/Support/LowLevelTypeImpl.h | 45 - include/llvm/Support/MemoryBuffer.h | 3 +- include/llvm/Support/SpecialCaseList.h | 37 +- include/llvm/Support/TargetParser.h | 8 +- include/llvm/Target/Target.td | 18 +- include/llvm/Target/TargetLowering.h | 9 + include/llvm/Transforms/PGOInstrumentation.h | 2 + include/llvm/Transforms/Scalar.h | 10 +- include/llvm/Transforms/Scalar/CallSiteSplitting.h | 29 + include/llvm/Transforms/Utils/LoopUtils.h | 6 +- lib/Analysis/BasicAliasAnalysis.cpp | 6 +- lib/Analysis/BlockFrequencyInfo.cpp | 5 + lib/Analysis/BlockFrequencyInfoImpl.cpp | 21 + lib/Analysis/LoopAccessAnalysis.cpp | 45 +- lib/Analysis/ModuleSummaryAnalysis.cpp | 9 +- lib/Analysis/TypeBasedAliasAnalysis.cpp | 178 +- lib/Analysis/ValueTracking.cpp | 13 +- lib/AsmParser/LLLexer.cpp | 2 + lib/AsmParser/LLParser.h | 4 +- lib/AsmParser/LLToken.h | 2 + lib/Bitcode/Reader/BitcodeReader.cpp | 10 +- lib/Bitcode/Writer/BitcodeWriter.cpp | 8 +- lib/Bitcode/Writer/ValueEnumerator.h | 2 + lib/CodeGen/AggressiveAntiDepBreaker.cpp | 2 +- lib/CodeGen/Analysis.cpp | 2 +- lib/CodeGen/AsmPrinter/ARMException.cpp | 2 +- lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 4 +- lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp | 2 +- lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | 2 +- lib/CodeGen/AsmPrinter/DwarfCFIException.cpp | 2 +- lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 2 +- lib/CodeGen/AsmPrinter/DwarfFile.h | 2 +- lib/CodeGen/AsmPrinter/WinException.cpp | 2 +- lib/CodeGen/BranchFolding.cpp | 63 +- lib/CodeGen/BranchRelaxation.cpp | 2 +- lib/CodeGen/CFIInstrInserter.cpp | 319 +++ lib/CodeGen/CMakeLists.txt | 3 + lib/CodeGen/CalcSpillWeights.cpp | 2 +- lib/CodeGen/CodeGen.cpp | 3 + lib/CodeGen/CodeGenPrepare.cpp | 1154 ++++----- lib/CodeGen/CriticalAntiDepBreaker.cpp | 2 +- lib/CodeGen/DFAPacketizer.cpp | 2 +- lib/CodeGen/DeadMachineInstructionElim.cpp | 2 +- lib/CodeGen/DetectDeadLanes.cpp | 2 +- lib/CodeGen/EarlyIfConversion.cpp | 2 +- lib/CodeGen/ExecutionDepsFix.cpp | 2 +- lib/CodeGen/ExpandMemCmp.cpp | 828 ++++++ lib/CodeGen/ExpandPostRAPseudos.cpp | 2 +- lib/CodeGen/ExpandReductions.cpp | 2 +- lib/CodeGen/FEntryInserter.cpp | 4 +- lib/CodeGen/GCRootLowering.cpp | 4 +- lib/CodeGen/GlobalISel/IRTranslator.cpp | 2 +- lib/CodeGen/GlobalISel/Legalizer.cpp | 2 +- lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 74 +- lib/CodeGen/GlobalISel/LegalizerInfo.cpp | 383 ++- lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 2 +- lib/CodeGen/GlobalISel/RegisterBankInfo.cpp | 2 +- lib/CodeGen/GlobalISel/Utils.cpp | 2 +- lib/CodeGen/IfConversion.cpp | 2 +- lib/CodeGen/ImplicitNullChecks.cpp | 2 +- lib/CodeGen/InlineSpiller.cpp | 2 +- lib/CodeGen/LiveDebugValues.cpp | 4 +- lib/CodeGen/LiveDebugVariables.cpp | 2 +- lib/CodeGen/LiveRangeEdit.cpp | 2 +- lib/CodeGen/LiveVariables.cpp | 2 +- lib/CodeGen/LocalStackSlotAllocation.cpp | 2 +- lib/CodeGen/MIRCanonicalizerPass.cpp | 626 +++++ lib/CodeGen/MIRParser/MIParser.cpp | 6 +- lib/CodeGen/MIRPrinter.cpp | 33 +- lib/CodeGen/MachineBasicBlock.cpp | 10 +- lib/CodeGen/MachineBlockFrequencyInfo.cpp | 6 + lib/CodeGen/MachineBlockPlacement.cpp | 2 +- lib/CodeGen/MachineCSE.cpp | 2 +- lib/CodeGen/MachineCombiner.cpp | 2 +- lib/CodeGen/MachineCopyPropagation.cpp | 2 +- lib/CodeGen/MachineFrameInfo.cpp | 4 +- lib/CodeGen/MachineFunction.cpp | 2 +- lib/CodeGen/MachineInstr.cpp | 52 +- lib/CodeGen/MachineInstrBundle.cpp | 2 +- lib/CodeGen/MachineLICM.cpp | 2 +- lib/CodeGen/MachineOutliner.cpp | 2 +- lib/CodeGen/MachinePipeliner.cpp | 2 +- lib/CodeGen/MachineRegisterInfo.cpp | 2 +- lib/CodeGen/MachineSSAUpdater.cpp | 2 +- lib/CodeGen/MachineScheduler.cpp | 2 +- lib/CodeGen/MachineSink.cpp | 2 +- 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