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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_cross/gnu-master-arm-build_cross in repository toolchain/ci/qemu.
from f9a576a818 Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/p [...] adds a6625d38cc pc-bios/s390-ccw: don't try to read the next block if end of [...] adds d08a649404 pc-bios/s390-ccw/bootmap: Silence compiler warning from Clang adds ff77712a8a pc-bios/s390-ccw: Use reset_psw pointer instead of hard-code [...] adds b460a22087 pc-bios/s390-ccw/netboot: Use "-Wl," prefix to pass paramete [...] adds 679196a646 pc-bios/s390-ccw: Silence warning from Clang by marking pani [...] adds 3462ff3551 pc-bios/s390-ccw: Fix the cc-option macro in the Makefile adds da231910d3 pc-bios/s390-ccw: Silence GCC 11 stringop-overflow warning adds a5b2afd522 pc-bios/s390-ccw: Allow building with Clang, too adds f612e211e5 pc-bios/s390: Update the s390-ccw bios binaries with the Cla [...] adds 7c7cb752d7 Merge remote-tracking branch 'remotes/thuth-gitlab/tags/s390 [...] adds 3e81a71c9f xen-mapcache: avoid a race on memory map while using MAP_FIXED adds f1e43b6026 xen: Free xenforeignmemory_resource at exit adds 1898293990 xen-block: Use specific blockdev driver adds 4f24f774ba Merge remote-tracking branch 'remotes/aperard/tags/pull-xen- [...] adds bdbe824b7e qemu-edid: use qemu_edid_size() adds ed7f17a640 edid: edid_desc_next adds ec70aec8dc edid: move xtra3 descriptor adds 4f9e268637 edid: use dta extension block descriptors adds fce39fa737 edid: Make refresh rate configurable adds 850dc61f5f edid: move timing generation into a separate function adds 5a4e88cf3b edid: allow arbitrary-length checksums adds 35f171a2eb edid: add support for DisplayID extension (5k resolution) adds 9049f8bc44 virtio-gpu: handle partial maps properly adds 7d2ad4e1e8 virtio-gpu: rename virgl source file. adds 063cd34a03 virtio-gpu: add virtio-gpu-gl-device adds 37f86af087 virtio-gpu: move virgl realize + properties adds 76fa8b359b virtio-gpu: move virgl reset adds cabbe8e588 virtio-gpu: use class function for ctrl queue handlers adds ce537a4fc9 virtio-gpu: move virgl handle_ctrl adds 3e48b7a31a virtio-gpu: move virgl gl_flushed adds 2f47691a0f virtio-gpu: move virgl process_cmd adds 2c267d66fd virtio-gpu: move update_cursor_data adds d42d0d34b9 virtio-gpu: drop VIRGL() macro adds e349693a28 virtio-gpu: move virtio-gpu-gl-device to separate module adds 49afbca3b0 virtio-gpu: drop use_virgl_renderer adds eff6fa1735 virtio-gpu: move fields to struct VirtIOGPUGL adds 17cdac0b51 virtio-gpu: add virtio-gpu-gl-pci adds 48ecfbf12c modules: add have_vga adds b36eb8860f virtio-gpu: add virtio-vga-gl adds a5ccdccc97 Merge remote-tracking branch 'remotes/kraxel/tags/vga-202105 [...] adds e3a6923454 target/i386: Rename helper_fldt, helper_fstt adds 0ac2b19743 target/i386: Split out do_fsave, do_frstor, do_fxsave, do_fxrstor adds f5cc5a5c16 i386: split cpu accelerators from cpu.c, using AccelCPUClass adds 30565f10e9 cpu: call AccelCPUClass::cpu_realizefn in cpu_exec_realizefn adds bb883fd677 accel: introduce new accessor functions adds ce21726525 target/i386: fix host_cpu_adjust_phys_bits error handling adds 9ea057dc64 accel-cpu: make cpu_realizefn return a bool adds 222f3e6f19 i386: split off sysemu-only functionality in tcg-cpu adds a93b55ec22 i386: split smm helper (sysemu) adds e7f2670f2a i386: split tcg excp_helper into sysemu and user parts adds 6d8d1a031a i386: move TCG bpt_helper into sysemu/ adds a4b1f4e611 i386: split misc helper user stubs and sysemu part adds 83a3d9c740 i386: separate fpu_helper sysemu-only parts adds b39030942d i386: split svm_helper into sysemu and stub-only user adds 30493a030f i386: split seg_helper into user-only and sysemu parts adds 79f1a68ab3 i386: split off sysemu part of cpu.c adds 4d81e28514 target/i386: gdbstub: introduce aux functions to read/write [...] adds 1852f0942c target/i386: gdbstub: only write CR0/CR2/CR3/EFER for sysemu adds 6308728907 i386: make cpu_load_efer sysemu-only adds 92242f34ab accel: move call to accel_init_interfaces adds cc3f2be6b7 accel: add init_accel_cpu for adapting accel behavior to CPU type adds 6ed6b0d380 target/i386: merge SVM_NPTEXIT_* with PF_ERROR_* constants adds 616a89eaad target/i386: move paging mode constants from SVM to cpu.h adds 661ff4879e target/i386: extract mmu_translate adds cd906d315d target/i386: pass cr3 to mmu_translate adds 31dd35eb2d target/i386: extend pg_mode to more CR0 and CR4 bits adds 33ce155c67 target/i386: allow customizing the next phase of the translation adds 68746930ae target/i386: use mmu_translate for NPT walk adds d3e6dd2fe7 main-loop: remove dead code adds 941a4736d2 qemu-option: support accept-any QemuOptsList in qemu_opts_ab [...] adds 5ecfb76ccc configure: fix detection of gdbus-codegen adds e804f892b9 coverity-scan: list components, move model to scripts/coverity-scan adds 31589644ba Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/fo [...] adds ac12b60103 target/riscv: Remove privilege v1.9 specific CSR related code adds d00d739b66 docs/system/generic-loader.rst: Fix style adds 01e723bf18 target/riscv: Align the data type of reset vector address adds 3de70cec77 hw/riscv: sifive_e: Add 'const' to sifive_e_memmap[] adds 6ddc7069f5 target/riscv: Add Shakti C class CPU adds 7a261bafc8 riscv: Add initial support for Shakti C machine adds 07f334d89d hw/char: Add Shakti UART emulation adds 8a2aca3d79 hw/riscv: Connect Shakti UART to Shakti platform adds 330d2ae32a target/riscv: Convert the RISC-V exceptions to an enum adds 0e62f92eac target/riscv: Use the RISCVException enum for CSR predicates adds d6f20dacea target/riscv: Fix 32-bit HS mode access permissions adds 605def6eee target/riscv: Use the RISCVException enum for CSR operations adds 533c91e8f2 target/riscv: Use RISCVException enum for CSR access adds ab2c91286c MAINTAINERS: Update the RISC-V CPU Maintainers adds d4cad54499 hw/opentitan: Update the interrupt layout adds 1742054f0b hw/riscv: Enable VIRTIO_VGA for RISC-V virt machine adds 11c27c6ded riscv: don't look at SUM when accessing memory from a debugg [...] adds 65606f2124 target/riscv: Fixup saturate subtract function adds 0924a423ba docs: Add documentation for shakti_c machine adds 94c6ba83c1 target/riscv: Fix the PMP is locked check when using TOR adds db9f1dac48 target/riscv: Define ePMP mseccfg adds 4a345b2a83 target/riscv: Add the ePMP feature adds 2582a95c3c target/riscv: Add ePMP CSR access functions adds ae39e4ce19 target/riscv: Implementation of enhanced PMP (ePMP) adds 5da9514e96 target/riscv: Add a config option for ePMP adds 8ab6d3fbfe target/riscv/pmp: Remove outdated comment adds ed6eebaaaf target/riscv: Add ePMP support for the Ibex CPU adds b11e84b883 target/riscv: fix vrgather macro index variable type bug adds f9e580c13a target/riscv: fix exception index on instruction access fault adds d11e316d84 hw/riscv: Fix OT IBEX reset vector adds 3a7f7757ba fpu/softfloat: set invalid excp flag for RISC-V muladd instructions adds 6cfcf77573 target/riscv: fix a typo with interrupt names adds 3820602f80 target/riscv: Remove the hardcoded RVXLEN macro adds 5f10e6d895 target/riscv: Remove the hardcoded SSTATUS_SD macro adds 994b6bb2db target/riscv: Remove the hardcoded HGATP_MODE macro adds 4fd7455bb3 target/riscv: Remove the hardcoded MSTATUS_SD macro adds 419ddf00ed target/riscv: Remove the hardcoded SATP_MODE macro adds e95ea34742 target/riscv: Remove the unused HSTATUS_WPRI macro adds 4bb85634af target/riscv: Remove an unused CASE_OP_32_64 macro adds daf866b606 target/riscv: Consolidate RV32/64 32-bit instructions adds 6baba30ad0 target/riscv: Consolidate RV32/64 16-bit instructions adds c30a0757f0 target/riscv: Fix the RV64H decode comment adds 3e9f48bcda Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...] adds 1d4ae5a34f hw/block/pflash_cfi02: Set romd mode in pflash_cfi02_realize() adds 27545c9df2 hw/block/pflash_cfi02: Do not create aliases when not necessary adds dab59ce031 Merge remote-tracking branch 'remotes/philmd/tags/pflash-202 [...]
No new revisions were added by this update.
Summary of changes: MAINTAINERS | 16 +- accel/accel-common.c | 32 + bsd-user/main.c | 2 +- configure | 13 +- cpu.c | 5 +- default-configs/devices/riscv64-softmmu.mak | 1 + docs/system/generic-loader.rst | 9 +- docs/system/riscv/shakti-c.rst | 82 ++ docs/system/target-riscv.rst | 1 + fpu/softfloat-specialize.c.inc | 6 + hw/block/pflash_cfi02.c | 10 +- hw/block/xen-block.c | 14 +- hw/char/meson.build | 1 + hw/char/shakti_uart.c | 185 +++++ hw/char/trace-events | 4 + hw/core/machine.c | 1 + hw/display/edid-generate.c | 214 ++++-- hw/display/meson.build | 19 +- hw/display/vga-pci.c | 2 +- hw/display/vga.c | 2 + hw/display/virtio-gpu-base.c | 6 +- hw/display/virtio-gpu-gl.c | 163 ++++ hw/display/virtio-gpu-pci-gl.c | 55 ++ hw/display/{virtio-gpu-3d.c => virtio-gpu-virgl.c} | 7 +- hw/display/virtio-gpu.c | 218 ++---- hw/display/virtio-vga-gl.c | 47 ++ hw/i386/pc_piix.c | 1 + hw/i386/xen/xen-hvm.c | 9 +- hw/i386/xen/xen-mapcache.c | 15 +- hw/intc/ibex_plic.c | 20 +- hw/riscv/Kconfig | 11 + hw/riscv/meson.build | 1 + hw/riscv/opentitan.c | 10 +- hw/riscv/shakti_c.c | 181 +++++ hw/riscv/sifive_e.c | 2 +- include/hw/char/shakti_uart.h | 74 ++ include/hw/core/accel-cpu.h | 2 +- include/hw/core/cpu.h | 6 + include/hw/display/edid.h | 12 +- include/hw/display/vga.h | 6 + include/hw/riscv/opentitan.h | 16 +- include/hw/riscv/shakti_c.h | 75 ++ include/hw/virtio/virtio-gpu.h | 34 +- include/hw/xen/xen_common.h | 6 + include/qemu/accel.h | 13 + include/qemu/main-loop.h | 18 - linux-user/main.c | 2 +- pc-bios/s390-ccw.img | Bin 42608 -> 50936 bytes pc-bios/s390-ccw/Makefile | 8 +- pc-bios/s390-ccw/bootmap.c | 4 +- pc-bios/s390-ccw/jump2ipl.c | 4 +- pc-bios/s390-ccw/netboot.mak | 2 +- pc-bios/s390-ccw/s390-ccw.h | 1 + pc-bios/s390-netboot.img | Bin 67232 -> 79688 bytes qemu-edid.c | 6 +- scripts/coverity-scan/COMPONENTS.md | 154 ++++ .../{coverity-model.c => coverity-scan/model.c} | 0 softmmu/vl.c | 1 - target/i386/cpu-internal.h | 70 ++ target/i386/cpu-sysemu.c | 352 +++++++++ target/i386/cpu.c | 775 ++----------------- target/i386/cpu.h | 59 +- target/i386/gdbstub.c | 165 ++--- target/i386/helper.c | 13 + target/i386/helper.h | 11 + target/i386/host-cpu.c | 204 +++++ target/i386/host-cpu.h | 19 + target/i386/hvf/hvf-cpu.c | 68 ++ target/i386/hvf/meson.build | 1 + target/i386/kvm/kvm-cpu.c | 151 ++++ target/i386/kvm/kvm-cpu.h | 41 + target/i386/kvm/kvm.c | 3 +- target/i386/kvm/meson.build | 7 +- target/i386/meson.build | 9 +- target/i386/svm.h | 10 - target/i386/tcg/bpt_helper.c | 276 ------- target/i386/tcg/excp_helper.c | 573 -------------- target/i386/tcg/fpu_helper.c | 106 ++- target/i386/tcg/helper-tcg.h | 8 + target/i386/tcg/meson.build | 5 +- target/i386/tcg/misc_helper.c | 467 ------------ target/i386/tcg/seg_helper.c | 237 +----- target/i386/tcg/seg_helper.h | 66 ++ target/i386/tcg/{ => sysemu}/bpt_helper.c | 49 +- target/i386/tcg/sysemu/excp_helper.c | 471 ++++++++++++ target/i386/tcg/sysemu/fpu_helper.c | 57 ++ target/i386/tcg/sysemu/meson.build | 10 + target/i386/tcg/{ => sysemu}/misc_helper.c | 244 +----- target/i386/tcg/sysemu/seg_helper.c | 125 ++++ target/i386/tcg/{ => sysemu}/smm_helper.c | 19 +- target/i386/tcg/{ => sysemu}/svm_helper.c | 75 +- target/i386/tcg/sysemu/tcg-cpu.c | 83 +++ target/i386/tcg/tcg-cpu.c | 56 +- target/i386/tcg/tcg-cpu.h | 21 +- target/i386/tcg/translate.c | 13 +- target/i386/tcg/user/excp_helper.c | 39 + target/i386/tcg/user/meson.build | 6 + target/i386/tcg/user/misc_stubs.c | 75 ++ target/i386/tcg/user/seg_helper.c | 109 +++ target/i386/tcg/user/svm_stubs.c | 76 ++ target/riscv/cpu.c | 26 +- target/riscv/cpu.h | 42 +- target/riscv/cpu_bits.h | 114 +-- target/riscv/cpu_helper.c | 88 ++- target/riscv/csr.c | 824 ++++++++++++--------- target/riscv/fpu_helper.c | 16 +- target/riscv/gdbstub.c | 8 +- target/riscv/helper.h | 18 +- target/riscv/insn16-32.decode | 28 - target/riscv/insn16-64.decode | 36 - target/riscv/insn16.decode | 30 + target/riscv/insn32-64.decode | 88 --- target/riscv/insn32.decode | 67 +- target/riscv/insn_trans/trans_rva.c.inc | 14 +- target/riscv/insn_trans/trans_rvd.c.inc | 17 +- target/riscv/insn_trans/trans_rvf.c.inc | 6 +- target/riscv/insn_trans/trans_rvh.c.inc | 8 +- target/riscv/insn_trans/trans_rvi.c.inc | 22 +- target/riscv/insn_trans/trans_rvm.c.inc | 12 +- target/riscv/insn_trans/trans_rvv.c.inc | 39 +- target/riscv/machine.c | 8 +- target/riscv/meson.build | 13 +- target/riscv/monitor.c | 22 +- target/riscv/op_helper.c | 18 +- target/riscv/pmp.c | 218 +++++- target/riscv/pmp.h | 14 + target/riscv/trace-events | 3 + target/riscv/translate.c | 38 +- target/riscv/vector_helper.c | 18 +- util/main-loop.c | 61 -- util/module.c | 7 + util/qemu-option.c | 3 +- 132 files changed, 4964 insertions(+), 3995 deletions(-) create mode 100644 docs/system/riscv/shakti-c.rst create mode 100644 hw/char/shakti_uart.c create mode 100644 hw/display/virtio-gpu-gl.c create mode 100644 hw/display/virtio-gpu-pci-gl.c rename hw/display/{virtio-gpu-3d.c => virtio-gpu-virgl.c} (99%) create mode 100644 hw/display/virtio-vga-gl.c create mode 100644 hw/riscv/shakti_c.c create mode 100644 include/hw/char/shakti_uart.h create mode 100644 include/hw/riscv/shakti_c.h create mode 100644 scripts/coverity-scan/COMPONENTS.md rename scripts/{coverity-model.c => coverity-scan/model.c} (100%) create mode 100644 target/i386/cpu-internal.h create mode 100644 target/i386/cpu-sysemu.c create mode 100644 target/i386/host-cpu.c create mode 100644 target/i386/host-cpu.h create mode 100644 target/i386/hvf/hvf-cpu.c create mode 100644 target/i386/kvm/kvm-cpu.c create mode 100644 target/i386/kvm/kvm-cpu.h create mode 100644 target/i386/tcg/seg_helper.h copy target/i386/tcg/{ => sysemu}/bpt_helper.c (89%) create mode 100644 target/i386/tcg/sysemu/excp_helper.c create mode 100644 target/i386/tcg/sysemu/fpu_helper.c create mode 100644 target/i386/tcg/sysemu/meson.build copy target/i386/tcg/{ => sysemu}/misc_helper.c (68%) create mode 100644 target/i386/tcg/sysemu/seg_helper.c rename target/i386/tcg/{ => sysemu}/smm_helper.c (98%) rename target/i386/tcg/{ => sysemu}/svm_helper.c (95%) create mode 100644 target/i386/tcg/sysemu/tcg-cpu.c create mode 100644 target/i386/tcg/user/excp_helper.c create mode 100644 target/i386/tcg/user/meson.build create mode 100644 target/i386/tcg/user/misc_stubs.c create mode 100644 target/i386/tcg/user/seg_helper.c create mode 100644 target/i386/tcg/user/svm_stubs.c delete mode 100644 target/riscv/insn16-32.decode delete mode 100644 target/riscv/insn16-64.decode delete mode 100644 target/riscv/insn32-64.decode