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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allmodconfig in repository toolchain/ci/llvm-project.
from 9468a0f95385 [PowerPC] Define XL-compatible macros only for AIX and Linux adds 67b5bc26bde8 [DebugInfo] Check DIEnumerator bit width when comparing fo [...] new d31f8cc6884b [AArch64] Avoid crashing on invalid -Wa,-march= values new 69fcfdedc505 [AArch64][GlobalISel] Fix an crash in RBS due to a new reg [...] new 0d44201451f0 [MachineOutliner] Don't outline functions starting with PA [...]
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Summary of changes: clang/lib/Driver/ToolChains/Arch/AArch64.cpp | 15 ++- clang/test/Driver/aarch64-target-as-march.s | 9 ++ llvm/include/llvm/CodeGen/TargetInstrInfo.h | 4 +- llvm/lib/CodeGen/TargetInstrInfo.cpp | 13 +++ llvm/lib/IR/LLVMContextImpl.h | 5 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 2 + .../AArch64/GISel/AArch64RegisterBankInfo.cpp | 3 + llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 2 +- .../GlobalISel/rbs-matrixindex-regclass-crash.mir | 56 ++++++++++ .../CodeGen/AArch64/machine-outliner-patchable.ll | 114 +++++++++++++++++++++ .../CodeGen/RISCV/machine-outliner-patchable.ll | 77 ++++++++++++++ llvm/unittests/IR/DebugInfoTest.cpp | 20 +++- 12 files changed, 309 insertions(+), 11 deletions(-) create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/rbs-matrixindex-regclass-c [...] create mode 100644 llvm/test/CodeGen/AArch64/machine-outliner-patchable.ll create mode 100644 llvm/test/CodeGen/RISCV/machine-outliner-patchable.ll