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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-next-allyesconfig in repository toolchain/ci/llvm-project.
from 67b5bc26bde8 [DebugInfo] Check DIEnumerator bit width when comparing fo [...] adds d31f8cc6884b [AArch64] Avoid crashing on invalid -Wa,-march= values adds 69fcfdedc505 [AArch64][GlobalISel] Fix an crash in RBS due to a new reg [...] adds 0d44201451f0 [MachineOutliner] Don't outline functions starting with PA [...] adds 426297cce9d5 [DSE] Add test case showing bug PR52774. adds 33f7aa65f5d7 [DSE] Fix invalid removal of store instruction adds 0f915e755eae [RegAllocFast] Fix nondeterminism in debuginfo generation adds 35df3f98639e [DIArgList] Re-unique after changing operands to fix non-d [...] adds 12aaa8553f82 [InstCombine] Remove attributes after hoisting free above [...] adds 1ac6bb3c4dd4 [Clang][CFG] check children statements of asm goto adds bfb1bd1b9906 [Clang][Sema] Avoid crashing for va_arg expressions with b [...]
No new revisions were added by this update.
Summary of changes: clang/lib/Analysis/CFG.cpp | 2 +- clang/lib/Analysis/UninitializedValues.cpp | 9 +- clang/lib/Driver/ToolChains/Arch/AArch64.cpp | 15 ++- clang/lib/Sema/SemaExpr.cpp | 2 +- clang/test/Analysis/asm-goto.cpp | 29 ++++-- clang/test/Analysis/uninit-asm-goto.cpp | 47 ++++++--- clang/test/Driver/aarch64-target-as-march.s | 9 ++ clang/test/Sema/array-bounds-ptr-arith.c | 12 +++ clang/test/SemaCXX/varargs.cpp | 2 + llvm/include/llvm/CodeGen/TargetInstrInfo.h | 4 +- llvm/include/llvm/IR/Metadata.h | 1 + llvm/lib/CodeGen/RegAllocFast.cpp | 3 +- llvm/lib/CodeGen/TargetInstrInfo.cpp | 13 +++ llvm/lib/IR/DebugInfoMetadata.cpp | 10 ++ llvm/lib/IR/LLVMContextImpl.cpp | 9 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 2 + .../AArch64/GISel/AArch64RegisterBankInfo.cpp | 3 + llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 2 +- .../InstCombine/InstructionCombining.cpp | 20 ++++ .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 13 +-- .../GlobalISel/rbs-matrixindex-regclass-crash.mir | 56 ++++++++++ .../CodeGen/AArch64/machine-outliner-patchable.ll | 114 +++++++++++++++++++++ .../CodeGen/RISCV/machine-outliner-patchable.ll | 77 ++++++++++++++ .../DeadStoreElimination/store-after-loop.ll | 61 +++++++++++ llvm/test/Transforms/InstCombine/malloc-free.ll | 79 ++++++++++++++ 25 files changed, 548 insertions(+), 46 deletions(-) create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/rbs-matrixindex-regclass-c [...] create mode 100644 llvm/test/CodeGen/AArch64/machine-outliner-patchable.ll create mode 100644 llvm/test/CodeGen/RISCV/machine-outliner-patchable.ll create mode 100644 llvm/test/Transforms/DeadStoreElimination/store-after-loop.ll create mode 100644 llvm/test/Transforms/InstCombine/malloc-free.ll