[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (d56203201f8 -> 437e0e5191c)

23 Oct 2019


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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig
in repository toolchain/ci/llvm-project.
from  d56203201f8 Fix lld detection in standalone compiler-rt.
      adds  b94ac8a2632 [lit] Move increase_process_limit to ParallelRun
      adds  04edd1893c2 remove multi-argument form of PythonObject::Reset()
      adds  d602e0d0cab fix PythonDataObjectsTest.TestExceptions on windows
      adds  114de1eab29 Minor coding style fix. NFC.
      adds  fb042b094fd Refactor DependencyScanningTool to its own file
      adds  4e039e2720f gn build: Merge r375483
      adds  e659fff2fb7 [CMake] Allow overriding MSVC_DIA_SDK_DIR via CMake
      adds  3fe1c88bb2b [CMake] [WinMsvc] Look for includes and libs in ${MSVC_BASE [...]
      adds  64226b2df66 [clang-fuzzer] Update proto fuzzer example for r375453.
      adds  3ca2b17f847 [FrontendTests] Don't actually run the full compiler, parsi [...]
      adds  2108a974f78 Revert "[FrontendTests] Don't actually run the full compile [...]
      adds  1876e6c83c7 [builtins][test] Avoid unportable mmap call in clear_cache_test.c
      adds  ecc999101aa [FrontendTests] Try again to make test not write an output file
      adds  78d632d1055 [LLVMDebugInfoPDB] - Use cantFail() instead of assert().
      adds  0f4186779e0 [ThinLTO] Don't internalize during promotion
      adds  17f5d2b1a5c [Alignment][NFC] Attributes use Align/MaybeAlign
      adds  8e050e41a4b [Alignment][NFC] Use MaybeAlign in AttrBuilder
      adds  f2c8f3b181e [PowerPC] Turn on CR-Logical reducer pass
      adds  734c74ba14b [Alignment][NFC] Convert LoadInst to MaybeAlign
      adds  5b99c189b3b [Alignment][NFC] Convert StoreInst to MaybeAlign
      adds  e5dd30f77e1 [ThinLTO] Add code comment. NFC
      adds  e4af9de36ca [MIPS GlobalISel] Select MSA vector generic and builtin add
      adds  95290827d7d [MIParser] Set RegClassOrRegBank during instruction parsing
      adds  3ef017d0669 [InstCombine] Signed saturation tests. NFC
      adds  40c47680eb2     [libcxx] Remove shared_ptr::make_shared
      adds  186155b89c2 [InstCombine] Signed saturation patterns
      adds  3bf7fddeb05 Update git-llvm script to push to GitHub
      adds  0bff9bd26e3 [lldb] Adjust for the new class_rw_t layout.
      adds  19ca80ef057 gn build: make sync build work with git revs now that svn is gone
      adds  48f57138be5 [AMDGPU] Allow tied operand subreg folding
      adds  8be5827f856 Test commit - add clarification to README regarding Darwin.
      adds  a7cebfe9c03 Relax assertions when there's really no entries. [NFC]
      adds  f9b1dc5553c [AMDGPU] Updated fold-vgpr-copy.mir test. NFC.
      adds  9b1419a9e50 [NFC][LVI][CVP] Tests where pre-specified `add` no-wrap fla [...]
      adds  4334892e7b0 [DAGCombine][ARM] x ==/!= c  ->  (x - c) ==/!= 0  iff '-c'  [...]
      adds  68f5ca4e19c [HIP] Add option -fgpu-allow-device-init
      adds  aed9d6d64a3 [RISCV] Add support for -ffixed-xX flags
      adds  e0e7d06df3e fix a few typos to test git committing
      adds  70316d3174d Revert "Fix lld detection in standalone compiler-rt."
      adds  1c98ff49a30 Fix name of warn_ignored_hip_only_option
      adds  4c539e8da1b Revert r374202"[ObjC generics] Fix not inheriting type boun [...]
      adds  f86dc64bad4 typo fix test commit
      adds  cf57be9d349 [PowerPC][NFC] Remove deprecated Function Attrs comments
      adds  efd7caaa4ec Fix broken sphinx link in CMake.rst.
      adds  31d3c1d8b70 [PowerPC][NFC] Remove deprecated Function Attrs comments #2
      adds  19e95ab4210 [NFC] Strip trailing whitespace in test to test Github committing
       new  437e0e5191c [libcxx][test][NFC] Fix comment typos.
The 1 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
 clang/include/clang/AST/Type.h                     |   2 +-
 clang/include/clang/Basic/DiagnosticCommonKinds.td |   5 +
 clang/include/clang/Basic/DiagnosticGroups.td      |   4 +
 clang/include/clang/Basic/LangOptions.def          |   1 +
 clang/include/clang/Driver/Options.td              |   9 +-
 .../DependencyScanning/DependencyScanningTool.h    |  48 ++
 clang/lib/AST/Type.cpp                             |   4 -
 clang/lib/CodeGen/CGDeclCXX.cpp                    |   7 +-
 clang/lib/Driver/ToolChains/Arch/RISCV.cpp         |  64 +++
 clang/lib/Driver/ToolChains/HIP.cpp                |   4 +
 clang/lib/Frontend/CompilerInvocation.cpp          |   7 +
 clang/lib/Sema/SemaCUDA.cpp                        |   2 +
 clang/lib/Sema/SemaLambda.cpp                      |   3 +-
 .../lib/Tooling/DependencyScanning/CMakeLists.txt  |   1 +
 .../DependencyScanning/DependencyScanningTool.cpp  |  71 +++
 clang/test/CodeGenCUDA/device-init-fun.cu          |  19 +
 clang/test/Driver/riscv-fixed-x-register.c         | 341 ++++++++++++++
 clang/test/Frontend/warn-device-init-fun.cu        |   8 +
 clang/test/SemaObjC/parameterized_classes_subst.m  |  14 -
 .../tools/clang-fuzzer/ExampleClangProtoFuzzer.cpp |   2 +-
 clang/tools/clang-scan-deps/ClangScanDeps.cpp      | 125 ++---
 clang/unittests/Frontend/OutputStreamTest.cpp      |   2 +
 compiler-rt/CMakeLists.txt                         |   2 +-
 compiler-rt/cmake/config-ix.cmake                  |   1 -
 compiler-rt/test/builtins/Unit/clear_cache_test.c  |   2 +-
 libcxx/include/memory                              |  45 +-
 .../memory/aligned_allocation_macro.pass.cpp       |   2 +-
 .../array/array.cons/initializer_list.pass.cpp     |   2 +-
 .../lexically_relative_and_proximate.pass.cpp      |   2 +-
 .../fs.op.funcs/fs.op.relative/relative.pass.cpp   |   2 +-
 .../weakly_canonical.pass.cpp                      |   2 +-
 .../fpos/fpos.operations/difference.pass.cpp       |   2 +-
 .../fpos/fpos.operations/subtraction.pass.cpp      |   2 +-
 libcxx/test/std/numerics/c.math/abs.pass.cpp       |   4 +-
 .../string_compare/size_size_string_view.pass.cpp  |   2 +-
 .../opge.string_view.pointer.pass.cpp              |   4 +-
 .../opgt.string_view.pointer.pass.cpp              |   4 +-
 .../ople.string_view.pointer.pass.cpp              |   4 +-
 .../oplt.string_view.pointer.pass.cpp              |   4 +-
 .../meta.const.eval/is_constant_evaluated.pass.cpp |   2 +-
 .../meta/meta.rel/is_convertible.pass.cpp          |   2 +-
 .../optional/optional.specalg/swap.pass.cpp        |   2 +-
 .../unique.ptr.asgn/move_convert.pass.cpp          |   2 +-
 .../unique.ptr.class/unique.ptr.ctor/move.pass.cpp |   4 +-
 .../unique.ptr.ctor/move_convert.pass.cpp          |   2 +-
 .../unique.ptr.ctor/nullptr.pass.cpp               |   2 +-
 .../unique.ptr.ctor/pointer.pass.cpp               |   2 +-
 .../time.cal.weekday.members/ok.pass.cpp           |   2 +-
 .../tuple.tuple/tuple.assign/convert_copy.pass.cpp |   2 +-
 .../tuple.tuple/tuple.assign/convert_move.pass.cpp |   2 +-
 lld/include/lld/Core/Error.h                       |   4 +-
 lld/include/lld/Core/UndefinedAtom.h               |   2 +-
 lldb/include/lldb/Interpreter/ScriptInterpreter.h  |   3 +
 lldb/scripts/Python/python-extensions.swig         | 205 ++-------
 lldb/scripts/Python/python-typemaps.swig           |  21 +-
 lldb/scripts/Python/python-wrapper.swig            |  43 --
 lldb/scripts/lldb.swig                             |   5 +
 .../AppleObjCClassDescriptorV2.cpp                 |  12 +
 .../ScriptInterpreter/Python/CMakeLists.txt        |   1 -
 .../ScriptInterpreter/Python/PythonDataObjects.cpp | 137 ++++--
 .../ScriptInterpreter/Python/PythonDataObjects.h   | 115 +++--
 .../Python/PythonExceptionState.cpp                | 169 -------
 .../Python/PythonExceptionState.h                  |  56 ---
 .../Python/ScriptInterpreterPython.cpp             | 291 +++++-------
 .../Python/ScriptInterpreterPythonImpl.h           |  26 +-
 .../ScriptInterpreter/Python/CMakeLists.txt        |   1 -
 .../Python/PythonDataObjectsTests.cpp              |  84 ++++
 .../Python/PythonExceptionStateTests.cpp           | 164 -------
 llvm/cmake/config-ix.cmake                         |   3 +-
 llvm/cmake/platforms/WinMsvc.cmake                 |   4 +
 llvm/docs/CMake.rst                                |   2 +-
 llvm/include/llvm/CodeGen/TargetLowering.h         |   7 +
 llvm/include/llvm/IR/Attributes.h                  |  40 +-
 llvm/include/llvm/IR/Function.h                    |   9 +-
 llvm/include/llvm/IR/InstrTypes.h                  |  10 +-
 llvm/include/llvm/IR/Instructions.h                |  32 +-
 llvm/lib/AsmParser/LLParser.cpp                    |  43 +-
 llvm/lib/AsmParser/LLParser.h                      |   4 +-
 llvm/lib/Bitcode/Reader/BitcodeReader.cpp          |  12 +-
 llvm/lib/CodeGen/MIRParser/MIParser.cpp            |   2 +
 llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp   |  61 +++
 .../PDB/Native/NativeEnumInjectedSources.cpp       |  25 +-
 llvm/lib/IR/AttributeImpl.h                        |   4 +-
 llvm/lib/IR/Attributes.cpp                         |  51 +--
 llvm/lib/IR/Instructions.cpp                       |  59 ++-
 llvm/lib/Target/AMDGPU/SIFoldOperands.cpp          |  12 -
 llvm/lib/Target/Mips/MipsLegalizerInfo.cpp         |  60 ++-
 llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp      |   6 +-
 llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp          |  18 +-
 llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp    |   9 +-
 llvm/lib/Target/PowerPC/PPCTargetMachine.cpp       |   2 +-
 llvm/lib/Target/PowerPC/README.txt                 |   3 +
 llvm/lib/Target/RISCV/RISCV.td                     |   5 +
 llvm/lib/Target/RISCV/RISCVFrameLowering.cpp       |  11 +
 llvm/lib/Target/RISCV/RISCVISelLowering.cpp        |  38 ++
 llvm/lib/Target/RISCV/RISCVISelLowering.h          |   6 +
 llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp        |  11 +
 llvm/lib/Target/RISCV/RISCVRegisterInfo.h          |   2 +
 llvm/lib/Target/RISCV/RISCVSubtarget.cpp           |   1 +
 llvm/lib/Target/RISCV/RISCVSubtarget.h             |   5 +
 llvm/lib/Transforms/IPO/FunctionImport.cpp         |   4 +
 llvm/lib/Transforms/IPO/GlobalOpt.cpp              |  16 +-
 .../Transforms/InstCombine/InstCombineCalls.cpp    |   7 +-
 .../Transforms/InstCombine/InstCombineInternal.h   |   1 +
 .../InstCombine/InstCombineLoadStoreAlloca.cpp     |   4 +-
 llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp |   6 +-
 .../Transforms/InstCombine/InstCombineSelect.cpp   |  67 +++
 .../lib/Transforms/Scalar/DeadStoreElimination.cpp |   5 +-
 llvm/lib/Transforms/Scalar/GVN.cpp                 |   8 +-
 llvm/lib/Transforms/Scalar/JumpThreading.cpp       |   2 +-
 llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp |   3 +-
 llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir        |  35 +-
 llvm/test/CodeGen/ARM/addsubcarry-promotion.ll     |  62 +--
 llvm/test/CodeGen/MIR/Mips/setRegClassOrRegBank.ll |  27 ++
 .../test/CodeGen/MIR/Mips/setRegClassOrRegBank.mir |  39 ++
 .../Mips/GlobalISel/instruction-select/add_vec.mir | 130 ++++++
 .../CodeGen/Mips/GlobalISel/legalizer/add_vec.mir  | 122 +++++
 .../Mips/GlobalISel/legalizer/add_vec_builtin.mir  | 237 ++++++++++
 .../GlobalISel/legalizer/sitofp_and_uitofp.mir     |  20 +-
 .../CodeGen/Mips/GlobalISel/llvm-ir/add_vec.ll     |  70 +++
 .../Mips/GlobalISel/llvm-ir/add_vec_builtin.ll     | 138 ++++++
 .../Mips/GlobalISel/regbankselect/add_vec.mir      | 126 +++++
 llvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll   |  39 +-
 llvm/test/CodeGen/PowerPC/brcond.ll                |   6 +-
 llvm/test/CodeGen/PowerPC/build-vector-tests.ll    | 131 +-----
 llvm/test/CodeGen/PowerPC/pr42492.ll               |  14 +-
 llvm/test/CodeGen/PowerPC/sms-simple.ll            |   6 +-
 llvm/test/CodeGen/PowerPC/tocSaveInPrologue.ll     |  15 +-
 llvm/test/CodeGen/PowerPC/vec-min-max.ll           |  23 +-
 llvm/test/CodeGen/RISCV/reserved-reg-errors.ll     |  36 ++
 llvm/test/CodeGen/RISCV/reserved-regs.ll           | 130 ++++++
 llvm/test/ThinLTO/X86/not-internalized.ll          |  34 ++
 llvm/test/ThinLTO/X86/weak_externals.ll            |   4 +-
 .../Transforms/CorrelatedValuePropagation/icmp.ll  | 136 ++++++
 llvm/test/Transforms/InstCombine/sadd_sat.ll       | 503 ++++++++++++++++++++
 llvm/unittests/IR/AttributesTest.cpp               |   8 +-
 llvm/utils/TableGen/SequenceToOffsetTable.h        |   4 +-
 llvm/utils/git-svn/git-llvm                        | 510 ++++-----------------
 .../utils/gn/build/sync_source_lists_from_cmake.py |  24 +-
 .../clang/lib/Tooling/DependencyScanning/BUILD.gn  |   1 +
 llvm/utils/lit/lit/main.py                         |  25 -
 llvm/utils/lit/lit/run.py                          |  24 +
 142 files changed, 3586 insertions(+), 1965 deletions(-)
 create mode 100644 clang/include/clang/Tooling/DependencyScanning/DependencyScanni [...]
 create mode 100644 clang/lib/Tooling/DependencyScanning/DependencyScanningTool.cpp
 create mode 100644 clang/test/CodeGenCUDA/device-init-fun.cu
 create mode 100644 clang/test/Driver/riscv-fixed-x-register.c
 create mode 100644 clang/test/Frontend/warn-device-init-fun.cu
 delete mode 100644 lldb/source/Plugins/ScriptInterpreter/Python/PythonExceptionState.cpp
 delete mode 100644 lldb/source/Plugins/ScriptInterpreter/Python/PythonExceptionState.h
 delete mode 100644 lldb/unittests/ScriptInterpreter/Python/PythonExceptionStateTests.cpp
 create mode 100644 llvm/test/CodeGen/MIR/Mips/setRegClassOrRegBank.ll
 create mode 100644 llvm/test/CodeGen/MIR/Mips/setRegClassOrRegBank.mir
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/add_vec.mir
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/add_vec.mir
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/add_vec_builtin.mir
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec.ll
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec_builtin.ll
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/regbankselect/add_vec.mir
 create mode 100644 llvm/test/CodeGen/RISCV/reserved-reg-errors.ll
 create mode 100644 llvm/test/CodeGen/RISCV/reserved-regs.ll
 create mode 100644 llvm/test/ThinLTO/X86/not-internalized.ll
 create mode 100644 llvm/test/Transforms/InstCombine/sadd_sat.ll
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[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (d56203201f8 -> 437e0e5191c)