[Tcwg-commits] [gcc] branch rsandifo/sve-rebase updated (1194edef4c5 -> 177960d125f)

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discards 1194edef4c5 Work around PR81082 discards 56cac150ce5 Use conditional internal functions in if-conversion discards 571f8152b77 Implement SLP of internal functions discards 37c4434f0a5 Handle vector boolean types when calculating the SLP unroll factor discards b83ef105ceb Remove unnecessary temporary in tree-if-conv.c discards 3c09bebbbaa Don't require an integer mode for PARALLELs discards e6b55fa8438 Add early rematerialisation pass discards d30577fad8c Record equivalences for spill registers discards 87e9d41425e Support fused multiply-adds in fully-masked reductions discards 393e83a78b0 Replace FMA_EXPR with one internal fn per optab discards 93b508b8b4a Use single-iteration epilogues when peeling for gaps discards a563591bb2b Allow single-element interleaving for non-power-of-2 strides discards 8447f4d0a5d Add support for first-faulting loads discards 4f7add366dd Add support for speculative loads discards 78d05edf637 Support for aliasing with variable strides discards 857764c9041 Fix for big field stores discards 4cccc5da881 Avoid pessimistic check for overlapping groups discards 82383d43c0f Add support for gather loads and scatter stores discards 81eae38310a Add support for FADDA discards 0ec2c9fc35b Add support for CLASTB discards 58c3cfc4a9c Add support for BRKA and LASTB discards 27833eac9f0 Allow capped vectorisation factors discards a02083ceae8 Reuse results of vect_create_addr_base_for_vector_ref discards 41c61ca4b15 Add an empty_mask_is_expensive hook discards 2d95cd7a7ab Predicated arithmetic folds discards c7fc84169bd Predicated comparison folds discards 4facf5df6d8 Allow combine to reorder statements discards c1272426587 Rework the legitimize_address_displacement hook discards b66b3360685 Improve ivopts handling of offset multiples discards b571c3b0252 Handle peeling for alignment with masking discards bcaa08695bf Allow the number of iterations to be smaller than VF discards d49cf7f1f0a Make ivopts handle calls to internal functions discards 3e5f1e3de01 Improve VIEW_CONVERT_EXPR for vector booleans discards b8909e1644a Add support for fully-predicated loops discards 0a07ca4ca8e Protect against min_profitable_iters going negative discards 186510699ea SLP reductions with variable-length vectors discards a6ee36074fd Handle more SLP constant and extern definitions for variable VF discards 293de6c6d04 Add optabs for common types of permutation discards 6d3c0c80532 Add support for bitwise reductions discards ec7f16574ce Add support for masked load/store_lanes discards e5961e3e42d [AArch64] SVE load/store_lanes support discards 1e7b7aa7f05 Fix folding of vector mask EQ/NE expressions discards 6e61c8b1aba [AArch64] Testsuite markup for SVE discards de2ea7955cd [AArch64] Add SVE support discards 0b2816878d6 Revert DECL_USER_ALIGN patch discards e23ec9dad86 vect_masked_store discards 20a7bd15f6c vect_align_stack_vars discards 8bf1c9c0a03 vect_variable_length discards 02f9a01aade target_vect_unaligned_possible discards c9d40003243 vect_element_align_preferred discards 3b9ab440cd5 vect_permN discards 4739e84566c available_vector_sizes discards 736b6826217 Include phis in SLP unrolling calculation discards 7e35dc0a4cd mask load/store for external masks discards 87c7066731a Add VECTOR_BITS to tree-vect.h discards 12e91f3bfcf Use asm volatile ("" ::: "memory") discards 2e9decfa821 Add copy_rtx call to RTL loop unroller discards 46ccce1d2ee [AArch64] Generate permute patterns using rtx builders discards 8bbff76af71 [AArch64] Rewrite aarch64_simd_valid_immediate discards 14c167705e9 [AArch64] Add const_offset field to aarch64_address_info discards 0a160ce23a3 [AArch64] Rename the internal "Upl" constraint discards edde69cff46 [AArch64] Set NUM_POLY_INT_COEFFS to 2 discards 6021c26b290 [AArch64] Rework interface to add constant/offset routines discards acd918df726 [AArch64] Move code around discards 0128e8e7447 SUBREG_PROMOTED_VAR_P handling in expand_direct_optab_fn discards 4367f5bf60e Fix a failure in the Fortran matmul* tests discards 7af9a859710 Improve ivopts handling of forced scales discards 2bac4ca4418 Improve vector mask pattern handling discards e0f8cc3629e Improve canonicalisation of TARGET_MEM_REFs discards 0b4388ad940 Prevent invalid register mode changes in combine discards 4c44020ddb9 Fix infinite loop in simplify_operand_subreg discards 1d9d2273d05 Use extract_bit_field_as_subreg for vectors discards b49252af6b0 Allow the target to set MAX_BITSIZE_MODE_ANY_MODE discards a56b53471c1 Add support for adjusting the number of units in a mode discards 965be7a657e Add support for MODE_VECTOR_BOOL discards 86ec0ae2673 Improve spilling for variable-width slots discards 5f9431c6912 Don't query the frontend for unsupported types discards 64a2a1633b1 Make more use of simplify_gen_binary discards be8bf9c81f8 Use poly_int rtx accessors instead of hwi accessors discards b7057260c30 Use poly_int tree accessors instead of hwi accessors discards 3cd0f81d0dc Base subreg rules on REGMODE_NATURAL_SIZE rather than UNITS [...] discards 2b9f5c0d0a0 poly_int: GET_MODE_SIZE discards 2941a09faa2 poly_int: GET_MODE_BITSIZE discards c6c5fb8f209 poly_int: GET_MODE_PRECISION discards 43f6919f4b3 Fix vectorizable_live_operation handling of vector booleans discards 828e90b8ce6 poly_int: TYPE_VECTOR_SUBPARTS discards dc8f6196fd5 poly_int: GET_MODE_NUNITS discards c7e7a707262 poly_int: vect_no_alias_p discards 43b91584c02 poly_int: current_vector_size and TARGET_AUTOVECTORIZE_VECT [...] discards b992d7dd341 poly_int: get_mask_mode discards d3244c323fc poly_int: omp_max_vf discards 6844aafd898 poly_int: vectoriser vf and uf discards 4dcf201cb5b poly_int: prune_runtime_alias_test_list discards c2499903c72 poly_int: loop versioning threshold discards c50b244b3d7 poly_int: tree-ssa-loop-ivopts.c:iv_use discards b9a97106fc9 poly_int: get_binfo_at_offset discards 6ff053ef376 poly_int: build_ref_for_offset discards 609cafede17 poly_int: MEM_REF offsets discards 31448bb9b8f poly_int: bit_field_size/offset discards 600543bebd4 poly_int: int_size_in_bytes discards d598195e428 poly_int: emit_group_load/store discards b330bed7c34 poly_int: reload<->ira interface discards a1604ae11fb poly_int: emit_inc discards d0a672e2e71 poly_int: cfgexpand stack variables discards 04688e47738 poly_int: argument sizes discards 574d5c949f0 poly_int: REG_ARGS_SIZE discards 1c5dcdbe287 poly_int: push_block/emit_push_insn discards a4bdcdb55aa poly_int: frame allocations discards 032b1e9235a poly_int: reload1.c discards 7170c0f4435 poly_int: reload.c discards dc3372973e1 poly_int: get_inner_reference & co. discards cc9642053e7 poly_int: get_inner_reference_aff discards a545f37cda2 poly_int: pointer_may_wrap_p discards fa84b42ea9b poly_int: symbolic_number discards f2da546912c poly_int: aff_tree discards 5fb035a4c19 poly_int: get_addr_unit_base_and_extent discards 80e40f880f8 poly_int: get_ref_base_and_extent discards f50003fc032 poly_int: ipa_parm_adjustment discards acbc0f9da6c poly_int: DWARF CFA offsets discards d232120804a poly_int: operand_subword discards b9707361624 poly_int: SUBREG_BYTE discards d27af5f5ace poly_int: store_field & co discards 44d7a750691 poly_int: C++ bitfield regions discards 13d2afb3c6b poly_int: extract_bit_field bitrange discards 3682d889213 poly_int: store_bit_field bitrange discards 876b5807358 poly_int: create_integer_operand discards a0dd46a0ef9 poly_int: lra frame offsets discards 525e2287ff9 poly_int: MEM_OFFSET and MEM_SIZE discards df85a802172 poly_int: rtx_addr_can_trap_p_1 discards b3650f8f7d3 poly_int: dse.c discards 103e17cf39f poly_int: ao_ref and vn_reference_op_t discards e795789b559 poly_int: same_addr_size_stores_p discards 48678500d77 poly_int: fold_ctor_reference discards 545dd9824f7 Add DWARF support for polynomial offsets discards 61d1ee0e4aa Make REG_OFFSET a poly_int64 discards 4dc0411f4aa poly_int: compute_data_ref_aligment discards 8e128f04959 Add poly_int dump routines discards a73198ac2ad Add polynomial tree constants discards 8f327766306 Add polynomial rtx constants discards 5e6706ee10b Make mode query functions accept poly_ints discards e8102e99984 Add poly-int.h discards 6b0165da2d0 Move computation of SLP_TREE_NUMBER_OF_VEC_STMTS discards 0f7e25f1ec4 Add LOOP_VINFO_MAX_VECT_FACTOR discards a6074dd98de Fix type of bitstart in vectorizable_live_operation discards 2de57d26f82 Fix for match.pd handling of three-constant bitops discards 84ca7bf2899 [AArch64] Add an endian_lane_rtx helper routine discards 9ae21cca941 Treat VEC_{DUPLICATE,SERIES}_EXPR as gimple constants discards 20ecd91335a Add VEC_SERIES_EXPR and associated optab discards 3d85e9e365d Add a VEC_DUPLICATE_EXPR tree code and associated optab discards fc865e76a32 Add a VEC_SERIES rtl code discards 761367ca653 Fix unguarded uses of tree_to_uhwi discards 9e51688e9a4 Tighten tree-ssa-ccp.c:get_value_for_expr condition discards e7fd531c4bd Add missing int_cst_rangeN checks to tree-vrp.c discards a4c2a6f9c64 compare_values use in extract_range_from_multiplicative_op_1 discards e57376c2e8f Allow vector CONSTs discards a27014c2157 Add rtx const vec_duplicate helpers discards 8dbe5d89b53 Invoke vectorizable_live_operation in a consistent way discards d6f6c239faa Let the target choose a vectorisation alignment discards 1892e471487 Add a vect_get_dr_size helper function discards 80fba7c0d3a Make more use of gimple-fold.h discards 3bbd3c25fb2 Add gimple_build_vector* helpers discards e2fd28a2b69 Pass number of elements alongside tree* when constructing vectors discards bbf6e8ec430 Store VECTOR_CST_NELTS directly in tree node discards 7c36a40bfe7 Add a vect_worthwhile_without_simd_p helper routine discards 7b853403367 Add a vect_get_num_copies helper routine discards e717436cf07 Factor out the mode handling in lower-subreg.c discards 3b74158a855 Use MACRO_MODE for FUNCTION_ARG_OFFSET discards 8ae1b447f79 Use MACRO_MODE for TRULY_NOOP_TRUNCATION_MODES_P discards c05e268cac5 Use MACRO_MODE for CANNOT_CHANGE_MODE_CLASS discards 046c23eab60 Use MACRO_MODE for SECONDARY_MEMORY_NEEDED discards a8d9427799b Use MACRO_MODE for SECONDARY_MEMORY_NEEDED_MODE discards 5b7698d5031 Use MACRO_MODE for HARD_REGNO_NREGS discards 4966c07417a Turn SLOW_UNALIGNED_ACCESS into a target hook discards 945dd77e44f Use MACRO_MODE for targhooks.c and address.h wrappers discards 59f9745d7a1 Add helpers for shift count modes discards fed76150418 Use scalar_mode in expand_shift_1 discards 4577c0bb0fe Widening optab cleanup discards 280490f88c0 Add a fixed_size_mode_pod class discards f3fe4658903 Add a fixed_size_mode class discards 2d4a6c7172b Add a mem_alias_size helper class discards 6362156b96b [AArch64] Fix address check in SIMD mov expander discards 1043c4e4a4a Test failures discards 8fb1a05e15e Remove DOS file formatting discards a4ddef8bb30 :: AArch64 scalar_float_mode discards 76f725940f6 [75/77] Use scalar_mode in the AArch64 port discards 0b7a57a2d6c [61/77] Use scalar_int_mode in the AArch64 port discards ea2560e6b6d Turn FUNCTION_ARG_PADDING into a target hook discards 855e91178c1 Turn MODES_TIEABLE_P into a target hook discards 9e1f04aa57b Turn HARD_REGNO_MODE_OK into a target hook discards 47720772d67 Turn HARD_REGNO_CALL_PART_CLOBBERED into a target hook discards 00cc7e135ab Add wider_subreg_mode helper functions discards 44a8e2019b2 Add subreg_memory_offset helper functions discards a1ec398ba3a Make more use of GET_MODE_UNIT_PRECISION discards 9c6733a1269 Make more use of GET_MODE_UNIT_BITSIZE discards 59b8c099c77 Make more use of GET_MODE_UNIT_SIZE discards e58b93347b4 Make more use of byte_lowpart_offset discards a58403dd02e Make more use of subreg_size_lowpart_offset discards 15b2e027a83 Make more use of subreg_lowpart_offset discards d31d0c71c7d Make more use of df_read_modify_subreg_p discards 622ac6b1277 Make more use of HWI_COMPUTABLE_MODE_P discards 6f8d28e16be [AArch64] Tighten address register subreg checks discards 5613f2c7f2b [AArch64] Tweak aarch64_classify_address interface discards ae382fc0e21 [AArch64] Rename cmp_result iterator discards c573f170327 [AArch64] Remove use of wider vector modes discards 134bca922b9 PR81635: Use chrecs to help find related data refs discards 9184379d377 Document machine_mode wrapper classes adds 0270ff0d842 * tree-vect-patterns.c (vect_pattern_recog_1): Use VECTOR_ [...] adds 000d15786d2 2017-08-30 Michael Meissner meissner@linux.vnet.ibm.com adds d273b4460fe * configure.ac: Substitute GOC_FOR_TARGET and GCC_FOR_TARG [...] adds 87bb39da148 Fix e-mail address. adds 7271c48ab70 * config/rs6000/rs6000.c (rs6000_emit_prologue_move_from_c [...] adds f46e5437023 * varasm.c (decode_addr_const): Deal with INDIRECT_REF <IN [...] adds eb8aa2788e4 * tree-eh.c (lower_try_finally_switch): Set the location o [...] adds 83464023d60 [gcc] adds 0a60ad455b0 Make taking the address of an overloaded function a non-ded [...] adds 54ebe9c2801 PR c++/82030 - ICE inheriting from multiple lambdas adds 0e15a39d64a Daily bump. adds 63756d1102b [TESTSUITE]Use memcpy instead of strcpy in testsuite/gcc.dg [...] adds 0444c2ea423 [AArch64] Remove use of wider vector modes adds 5920913469a [AArch64] Rename cmp_result iterator adds eec23e8fbe2 [AArch64] Tighten address register subreg checks adds eff2295ad9d 2017-08-31 Tamar Christina tamar.christina@arm.com adds bc3e9c9df58 2017-08-31 Richard Biener rguenther@suse.de adds cb194cb7e74 2017-08-31 Richard Biener rguenther@suse.de adds e8e4c25bca7 [ARC] Improves and fixes for small data support. adds 2d293522610 [ARC] Use -G option to control sdata behavior adds 43c5a401a79 [ARC] Update can_follow_jump hook helper. adds 683fb446459 PR c++/82029 - __PRETTY_FUNCTION__ in lambda in template adds 728a719e21b [AArch64 obvious] Fix register constraints for aarch64_ml[a [...] adds 671b72d2c68 PR c++/82039 suppress -Wzero-as-null-pointer-constant warning adds 061339f2081 2017-08-31 Olivier Hainque hainque@adacore.com adds b8405b7ee83 mksysinfo: fix in6_addr in mld_hdr_t for Solaris adds 70764430063 Daily bump. adds e55400ddb65 PR c++/82040 * typeck.c (cp_build_unary_op): Avoid re-ent [...] adds 2301d121eea Fix warning for simple-object-elf.c. adds 1e52a582103 PR c/81887 c-family/ * c-pragma.c (omp_pragmas): Move "or [...] adds 46e21f534be [ARC] Use TARGET_USE_ANCHORS_FOR_SYMBOL_P. adds a5f8ade69b3 [ARC] Update various patterns adds 208d1b220c9 [ARC] Fix errors in arc_ifcvt. adds f1885171a83 [ARC] Reimplement ZOL support. adds 52030270530 Fix profile update in tree-ssa-isolate-paths.c (PR tree-opt [...] adds a7dd9a0d453 Revert 2017-08-28 Nathan Sidwell nathan@acm.org Resto [...] adds 0c11960eaee 2017-09-01 Olivier Hainque hainque@adacore.com adds 377dc1bdefc PR sanitizer/81923 * asan.c (create_odr_indicator): Strip [...] adds 364c265c348 PR sanitizer/81902 * doc/invoke.texi: Document -fsanitize [...] adds fe78223a693 retire mem_signal_fence pattern adds 85f11a8902c PR tree-optimization/82052 * tree-ssa-scopedtables.c (ava [...] adds d5a90e9944d S/390: PR82012: Implement CAN_INLINE_P target hook. adds 371072bf395 * varasm.c (bss_initializer_p): Do not put constants into [...] adds de7757ed8ba Fix excess precision handling of compound assignments (PR c [...] adds bb20d9b68f2 * class.c (finish_struct_methods): Done clear DECL_IN_AGGR [...] adds 9b766c33ac1 * c-opts.c (c_common_finish): Write dependency information [...] adds c5fd8334707 PR target/81766 * config/i386/i386.c (ix86_init_large_pic [...] adds 5dd6bc993eb combine: Fix for PR82024 adds 14b3ed188bc * class.c (finish_struct): Call set_class_bindings for the [...] adds 7904fe55553 * cp-tree.h (resort_type_method_vec): Move declaration to [...] adds 2686fc3f315 2017-09-01 Michael Meissner meissner@linux.vnet.ibm.com adds a542ef840cc Daily bump. adds 5a3763032ae Daily bump. adds 1727fbdd70d * config/i386/i386.md (*bt<mode>): Use nonimmediate_operan [...] adds 4750dcdd812 * doc/generic.texi (OpenACC): Adjust URL. * doc/invoke.te [...] adds a89fcaa4ac3 * gcc.target/i386/mpx/mpx-check.h (main): Use __get_cpuid_ [...] adds 3c824e45209 * gcc.target/i386/adx-check.h (main): Use __get_cpuid_coun [...] adds f303ddea8f6 Daily bump. adds 9e9e5c15ab8 PR82045: Avoid passing machine modes through "..." adds 71387a5fab1 PR tree-optimization/70043 PR testsuite/82093 * gfortran [...] adds a93cfb1fe25 * lra-remat.c (reg_overlap_for_remat_p): Fix a pasto. adds ae534c0a0cf * gdbhooks.py (OptMachineModePrinter.to_string): Use 8 spa [...] adds 1f02dadaa01 PR sanitizer/81981 * gimple-fold.c (gimple_fold_call): Op [...] adds 4126c37d8d6 Fix call arguments mismatch in gcc.c-torture/compile/pr82052.c adds 31d7a9b35fe optabs: ensure atomic_load/stores have compiler barriers adds 57689c1061f Add subreg_memory_offset helper functions adds 5da94e606ba Turn HARD_REGNO_CALL_PART_CLOBBERED into a target hook adds b395382ffa9 Turn HARD_REGNO_MODE_OK into a target hook adds 5f6dcf1ab36 Turn MODES_TIEABLE_P into a target hook adds d7ab0e3d8dc Turn FUNCTION_ARG_PADDING into a target hook adds f5e1594f883 2017-09-04 Richard Biener rguenther@suse.de adds 16414c649cb PR sanitizer/82072 * convert.c (do_narrow): When sanitizi [...] adds b17ce62f45e 2017-09-03 Jeff Law law@redhat.com adds 45d3a9aa9be PR c/81783 * c-warn.c (warn_tautological_bitwise_comparis [...] adds fd500157b76 2017-09-04 Richard Biener rguenther@suse.de adds 83520389d97 * config/i386/i386-protos.h (ix86_tls_address_pattern_p) N [...] adds 0d84c6e5068 2017-09-04 Bernd Edlinger bernd.edlinger@hotmail.de adds 7c78f2e6727 PR libstdc++/79162 implement LWG 2946 and LWG 2758 adds 0d58671cf9b Fix ldrd offsets adds 2f59511740d PR target/82098 * config/i386/i386.md (*<btsc><mode>_mask [...] adds 55f23069c74 * gcc.target/i386/mpx/mpx-os-support.h: New file. * gcc.t [...] adds ae74ed7c4c6 Daily bump. adds baab4554d44 Learn CFG cleanup to transform single case switches to gcond. adds 05b127f6b4c * gcc-interface/trans.c (pos_to_constructor): Skip convers [...] adds 9b53a7514a4 2017-09-05 Richard Biener rguenther@suse.de adds 9c2c00d63ea * gcc-interface/trans.c (Call_to_gnu): If this is a functi [...] adds f7c0889d898 * repinfo.ads: Document new treatment of dynamic values. [...] adds 0870dec2cbd * gcc-interface/trans.c (adjust_for_implicit_deref): New f [...] adds 404455fef97 * gcc-interface/gigi.h (renaming_from_generic_instantiatio [...] adds b141a84244c * gcc-interface/utils.c (unchecked_convert): When the resu [...] adds 7a4fb11f087 * gcc-interface/trans.c (Attribute_to_gnu) <Attr_Address>: [...] adds 27e8da7e351 * gcc-interface/trans.c (convert_with_check): Use a custom [...] adds ae182cb54f4 PR ada/62235 * gcc-interface/decl.c (gnat_to_gnu_entity): [...] adds 3daf52f7842 2017-09-05 Richard Biener rguenther@suse.de adds ef653372751 Improve alloca alignment adds d29e4e8c5da /cp 2017-09-05 Paolo Carlini paolo.carlini@oracle.com adds b0e3c082a4b PR sanitizer/82072 * convert.c (convert_to_integer_1) <ca [...] adds d960aadf72c i386: Avoid stack realignment if possible adds 988ae4ee37e Improve max_insns_skipped logic adds 1694a564a16 [gcc] adds 17f6e81c7cb * class.c (unreverse_member_declarations): Remove extraneo [...] adds e2cd4ccd1e0 Make more use of int_mode_for_mode adds 517be012cd0 Make more use of int_mode_for_size adds 98ec37cffe2 (decimal_)float_mode_for_size in real.h adds ef379746656 Make mode_for_size return an opt_mode adds 12bdf7c0dc4 Add mode_for_int_vector helper functions adds ab53cba72b4 Make mode_for_vector return an opt_mode adds 38d5f204c04 Make targetm.get_mask_mode return an opt_mode adds 8155505863a Make mode_for_size_tree return an opt_mode adds e6dbd7c2769 Make bitsize_mode_for_mode return an opt_mode adds 8b46f76d925 * cp-tree.h (lang_decl_base): Rename template_conv_p to u [...] adds 2a2ad9a1ce2 [61/77] Use scalar_int_mode in the AArch64 port adds 724582b924e [75/77] Use scalar_mode in the AArch64 port adds c682337fd9f * class.c (add_method): Move slot search and insertion to [...] adds 67622d5322f * name-lookup.c (do_class_using_decl): Elide read-once tem [...] adds 26300b200f2 * tree-ssa-threadupdate.c (duplicate_thread_path): Remove [...] adds 87ae84ee9cd PR middle-end/81768 * omp-expand.c (expand_omp_simd): For [...] adds 36ac6a87680 PR middle-end/81768 * omp-low.c (lower_omp_for): Recomput [...] adds 376cc4e8459 Daily bump. adds 077cf883c3e PR tree-optimization/64910 * tree-ssa-reassoc.c (reassoci [...] adds 206f0a3fc74 2017-09-06 Bernd Edlinger bernd.edlinger@hotmail.de adds 27a8aead2f3 2017-09-06 Richard Biener rguenther@suse.de adds 5add6acda5a PR middle-end/82095 * varasm.c (categorize_decl_for_secti [...] adds 2a801d206ae 2017-09-06 Ed Schonberg schonberg@adacore.com adds 1bbccea8309 Enqueue all SRA links for write flag propagation adds c80119a0877 2017-09-06 Raphael Amiard amiard@adacore.com adds 87a108bc1bd 2017-09-06 Hristian Kirtchev kirtchev@adacore.com adds bf5f89dc474 2017-09-06 Ed Schonberg schonberg@adacore.com adds 3645e9c5fc9 2017-09-06 Eric Botcazou ebotcazou@adacore.com adds 499c86e9744 2017-09-06 Ed Schonberg schonberg@adacore.com adds 0958a52357c 2017-09-06 Hristian Kirtchev kirtchev@adacore.com adds 9600e6893ee 2017-09-06 Eric Botcazou ebotcazou@adacore.com adds de6b1105943 Fix typo. adds 8ae779b8ac3 2017-09-06 Yannick Moy moy@adacore.com adds 15d28dc7beb 2017-09-06 Ed Schonberg schonberg@adacore.com adds a740d7fac16 2017-09-06 Hristian Kirtchev kirtchev@adacore.com adds 8b6ac63a79a 2017-09-06 Yannick Moy moy@adacore.com adds 00dd0c23be0 Minor reformatting. adds 7205cd8f174 2017-09-06 Gary Dismukes dismukes@adacore.com adds 7e2ecd6cc00 2017-09-06 Ed Schonberg schonberg@adacore.com adds d2654eada15 2017-09-06 Hristian Kirtchev kirtchev@adacore.com adds a1c1139c893 2017-09-06 Yannick Moy moy@adacore.com adds 983d292f7e3 2017-09-06 Bob Duff duff@adacore.com adds f4264652f90 2017-09-06 Gary Dismukes dismukes@adacore.com adds d49bc1d926e 2017-09-06 Bob Duff duff@adacore.com adds b2e61b1a74c 2017-09-06 Bob Duff duff@adacore.com adds 6c1f5e1eaf2 2017-09-06 Yannick Moy moy@adacore.com adds 521a77a1eb2 2017-09-06 Yannick Moy moy@adacore.com adds e12c5305ef4 * name-lookup.h (lookup_fnfields_slot_nolazy, lookup_fnfi [...] adds a613cd8ac36 2017-09-06 Hristian Kirtchev kirtchev@adacore.com adds bfed3e04034 2017-09-06 Eric Botcazou ebotcazou@adacore.com adds 5535eed40a9 2017-09-06 Steve Baird baird@adacore.com adds 32075f9e15a 2017-09-06 Eric Botcazou ebotcazou@adacore.com adds 53b51b7a48a 2017-09-06 Bob Duff duff@adacore.com adds 79119fb8e9b 2017-09-06 Vincent Celier celier@adacore.com adds 8a2477a68af 2017-09-06 Eric Botcazou ebotcazou@adacore.com adds 2f29736b270 2017-09-06 Ed Schonberg schonberg@adacore.com adds 13a1bbd30de 2017-09-06 Richard Biener rguenther@suse.de adds 61a4b85cc15 2017-09-06 Richard Biener rguenther@suse.de adds 0ac176ba086 2017-09-06 Richard Biener rguenther@suse.de adds e3b910d895a 2017-09-06 Ed Schonberg schonberg@adacore.com adds b6a9b2f6a62 * name-lookup.c (count_fields): Rename to ... (count_clas [...] adds 4d26487b5a2 * class.c (warn_hidden): Don't barf on non-functions. * d [...] adds 02464020999 2017-09-06 Olivier Hainque hainque@adacore.com adds bf7f6ad074f 2017-09-06 Hristian Kirtchev kirtchev@adacore.com adds b75ceb30d72 2017-09-06 Richard Biener rguenther@suse.de adds 2b4051ed9c0 [arm] auto-generate arm-isa.h from CPU descriptions adds 64560951def [arm] Improve error checking in parsecpu.awk adds ccec7674911 * asan.c (initialize_sanitizer_builtins): Add BT_FN_VOID_ [...] adds fd890137ae3 2017-09-06 Gary Dismukes dismukes@adacore.com adds 446b42cad48 * name-lookup.h (lookup_field_1): Delete. (get_class_bind [...] adds 9ee1c277941 2017-09-06 Olivier Hainque hainque@adacore.com adds 5eeb71626c0 PR78468 - add alloca alignment test new 1930b2658c1 Document machine_mode wrapper classes new bd8ff4e8acc [AArch64] Tweak aarch64_classify_address interface new c434435d603 PR81635: Use chrecs to help find related data refs new fde4c5b66b2 Make more use of HWI_COMPUTABLE_MODE_P new 1d7ae6cb47e Make more use of df_read_modify_subreg_p new fba0f7c2c56 Make more use of subreg_lowpart_offset new 461308d2948 Make more use of subreg_size_lowpart_offset new a4ad1bee699 Make more use of byte_lowpart_offset new 755eb963746 Add wider_subreg_mode helper functions new b5a2ad98a14 Make more use of GET_MODE_UNIT_SIZE new eca2b6a6f89 Make more use of GET_MODE_UNIT_BITSIZE new 55f6257a02c Make more use of GET_MODE_UNIT_PRECISION new 80447963beb :: AArch64 scalar_float_mode new f46128ff363 Add poly-int.h new f6e9bb53488 TARGET_C_FILE new be756a82c4d Revert r251538 new 7fe064fdc8b Remove DOS file formatting new f0355833340 Test failures new 18904d1bb86 [AArch64] Fix address check in SIMD mov expander new b5309864e05 Add a mem_alias_size helper class new b7148037b50 Add a fixed_size_mode class new 7ad76b3d087 Add a fixed_size_mode_pod class new 0d54be45f8f Widening optab cleanup new 8e4585a3480 Use scalar_mode in expand_shift_1 new 495850961d6 Add helpers for shift count modes new 098af172e36 Use MACRO_MODE for targhooks.c and address.h wrappers new d29991acf7f Turn SLOW_UNALIGNED_ACCESS into a target hook new 5a217e3558d Use MACRO_MODE for HARD_REGNO_NREGS new 325b37cfe7c Use MACRO_MODE for SECONDARY_MEMORY_NEEDED_MODE new df7bab4c6d2 Use MACRO_MODE for SECONDARY_MEMORY_NEEDED new 6a0d1227461 Use MACRO_MODE for CANNOT_CHANGE_MODE_CLASS new 0a767b4c079 Use MACRO_MODE for TRULY_NOOP_TRUNCATION_MODES_P new 419f7649cae Use MACRO_MODE for FUNCTION_ARG_OFFSET new 168eac7f21b Store VECTOR_CST_NELTS directly in tree node new 2c7df4e1757 Pass number of elements alongside tree* when constructing vectors new 0110e13d3dd Add gimple_build_vector* helpers new 0757fe4c9d3 Make more use of gimple-fold.h new cd2e62112ca Add a vect_get_num_copies helper routine new 2038ad5f588 Add a vect_worthwhile_without_simd_p helper routine new e55ad216cb8 Add a vect_get_dr_size helper function new 9ebff4f2cdb Add LOOP_VINFO_MAX_VECT_FACTOR new 6583bdb69c5 Move computation of SLP_TREE_NUMBER_OF_VEC_STMTS new 44a4cd0dd1d Invoke vectorizable_live_operation in a consistent way new b8fc0a07e4e Fix vectorizable_live_operation handling of vector booleans new c0561923e33 Fix type of bitstart in vectorizable_live_operation new 35dd7922338 mask load/store for external masks new eaedcf87d32 Include phis in SLP unrolling calculation new a6c2f2a7a86 Fix a failure in the Fortran matmul* tests new b0f02b546cf Let the target choose a vectorisation alignment new 81b2ab128ea Base subreg rules on REGMODE_NATURAL_SIZE rather than UNITS [...] new 93cd489261e compare_values use in extract_range_from_multiplicative_op_1 new ee1b69e160a Add missing int_cst_rangeN checks to tree-vrp.c new 2cf39d91827 Tighten tree-ssa-ccp.c:get_value_for_expr condition new cfc4094aab6 Fix unguarded uses of tree_to_uhwi new c1b2c238ebe Fix for match.pd handling of three-constant bitops new 92d9215eb6b Fix infinite loop in simplify_operand_subreg new e78c3a2aa3f Prevent invalid register mode changes in combine new 276fb73f2c3 SUBREG_PROMOTED_VAR_P handling in expand_direct_optab_fn new 5dd12a15f9b Add copy_rtx call to RTL loop unroller new f31ea06145b [AArch64] Add an endian_lane_rtx helper routine new 80201e16a7d Factor out the mode handling in lower-subreg.c new 33c1600d9f1 Add rtx const vec_duplicate helpers new 3ca5d1f5ad5 Allow vector CONSTs new dc76ed88892 Add a VEC_SERIES rtl code new de5955c4af3 Add a VEC_DUPLICATE_EXPR tree code and associated optab new fc20343bcf9 Add VEC_SERIES_EXPR and associated optab new 694c680b812 Treat VEC_{DUPLICATE,SERIES}_EXPR as gimple constants new c2c764b0399 Make mode query functions accept poly_ints new 08b8a21beff Add polynomial rtx constants new bba059dbdc8 Add polynomial tree constants new 339cf948e6e Add poly_int dump routines new 8c6c56c3a66 poly_int: compute_data_ref_aligment new 29db1015377 Make REG_OFFSET a poly_int64 new 6797ae2afa2 Add DWARF support for polynomial offsets new 16b1d69d3e1 poly_int: fold_ctor_reference new 320afa842b8 poly_int: same_addr_size_stores_p new b9deb0f5dc6 poly_int: ao_ref and vn_reference_op_t new 2bd2c0a8e7c poly_int: dse.c new e88b3cfa10c poly_int: rtx_addr_can_trap_p_1 new 13dc3386576 poly_int: MEM_OFFSET and MEM_SIZE new d8edd0edb2e poly_int: lra frame offsets new eead231a701 poly_int: create_integer_operand new 24531eec59a poly_int: store_bit_field bitrange new 7d1ea3340c5 poly_int: extract_bit_field bitrange new ea07cbac225 poly_int: C++ bitfield regions new 53bed29190e poly_int: store_field & co new e602dfb02e2 poly_int: SUBREG_BYTE new bfc2efc8796 poly_int: operand_subword new ca33f391fdb poly_int: DWARF CFA offsets new ddb62024e1d poly_int: ipa_parm_adjustment new eb88485cf1d poly_int: get_ref_base_and_extent new 972d6dbed61 poly_int: get_addr_unit_base_and_extent new 2696aaa247c poly_int: aff_tree new 96ccc0ffde3 poly_int: symbolic_number new a627dff5b0b poly_int: pointer_may_wrap_p new a4f2ec57a88 poly_int: get_inner_reference_aff new 8e1c9917897 poly_int: get_inner_reference & co. new 0400e0369d3 poly_int: reload.c new c60c26faf6f poly_int: reload1.c new 31c50b594f3 poly_int: frame allocations new bad4a90b13d poly_int: push_block/emit_push_insn new cc55f1093fd poly_int: REG_ARGS_SIZE new 3528764f40d poly_int: argument sizes new afc02c6d8da poly_int: cfgexpand stack variables new ad656ce43b4 poly_int: emit_inc new 52fcd2915b8 poly_int: reload<->ira interface new 02db4c3a54c poly_int: emit_group_load/store new 22f2a96cdba poly_int: int_size_in_bytes new 1ae2823cbef poly_int: bit_field_size/offset new 6b604621ecf poly_int: MEM_REF offsets new 08d62f1e048 poly_int: build_ref_for_offset new 0c6a894e099 poly_int: get_binfo_at_offset new 0765dd04818 poly_int: tree-ssa-loop-ivopts.c:iv_use new 3ee5e177725 poly_int: loop versioning threshold new 59f590bb86f poly_int: prune_runtime_alias_test_list new db3cc4dfe08 poly_int: vectoriser vf and uf new 021d5f1ae69 poly_int: omp_max_vf new 07563fd1d57 poly_int: get_mask_mode new 51aa7b4399c poly_int: current_vector_size and TARGET_AUTOVECTORIZE_VECT [...] new 0768d9b6e29 poly_int: vect_no_alias_p new 1fe09a2e1f0 poly_int: GET_MODE_NUNITS new dd08b0b7036 poly_int: TYPE_VECTOR_SUBPARTS new fae46ebbc9c poly_int: GET_MODE_PRECISION new 10e5bdfb39b poly_int: GET_MODE_BITSIZE new 22dabb2b12b poly_int: GET_MODE_SIZE new 82fe36e7800 Use poly_int tree accessors instead of hwi accessors new 24664896c77 Use poly_int rtx accessors instead of hwi accessors new 7b2f08e3d5d Make more use of simplify_gen_binary new 4f1910420bc Don't query the frontend for unsupported types new 1fb9fb3b984 Add support for MODE_VECTOR_BOOL new b8ac46e7f92 Add support for adjusting the number of units in a mode new 83089a07ac0 Allow the target to set MAX_BITSIZE_MODE_ANY_MODE new be1e3304cf5 [AArch64] Move code around new 1bc7d6dfcc1 [AArch64] Rework interface to add constant/offset routines new a3a1ca1ae4a [AArch64] Set NUM_POLY_INT_COEFFS to 2 new 5a620fd09d3 [AArch64] Rename the internal "Upl" constraint new 7e005720e80 [AArch64] Add const_offset field to aarch64_address_info new d67d491a144 [AArch64] Rewrite aarch64_simd_valid_immediate new eebfd6df60c [AArch64] Generate permute patterns using rtx builders new 54dedce8a8b Improve vector mask pattern handling new 07261597c2f Improve ivopts handling of forced scales new 4d118127687 Improve canonicalisation of TARGET_MEM_REFs new 188ec7f09c4 Improve spilling for variable-width slots new 513424be113 Use extract_bit_field_as_subreg for vectors new 8755c781353 Use asm volatile ("" ::: "memory") new 4a8ac7dabb2 Add VECTOR_BITS to tree-vect.h new 3498dd0a23f available_vector_sizes new 5c18a9963db vect_permN new 7035c33e90b vect_element_align_preferred new 8ddb3912127 target_vect_unaligned_possible new aa29cef42ba vect_variable_length new 6f971bbe077 vect_align_stack_vars new 85fcfe5d34a vect_masked_store new 7e72ebf292e Revert DECL_USER_ALIGN patch new b9adb798350 [AArch64] Add SVE support new aac737bc8e7 [AArch64] Testsuite markup for SVE new af3dd6f0977 Fix folding of vector mask EQ/NE expressions new 5554c972348 [AArch64] SVE load/store_lanes support new 82192d164f4 Add support for masked load/store_lanes new 10515c3259e Add support for bitwise reductions new 6fec6d2fc57 Add optabs for common types of permutation new 64d6df9984a Handle more SLP constant and extern definitions for variable VF new f07d2565c2c SLP reductions with variable-length vectors new b016ee14732 Protect against min_profitable_iters going negative new 249248d3c14 Add support for fully-predicated loops new b0c750f8609 Improve VIEW_CONVERT_EXPR for vector booleans new 233d390c4ea Make ivopts handle calls to internal functions new 361cbf2997a Allow the number of iterations to be smaller than VF new 3d7e31b4d78 Handle peeling for alignment with masking new bd601cf2e43 Improve ivopts handling of offset multiples new 2c10c5cf870 Rework the legitimize_address_displacement hook new 3bf65415228 Allow combine to reorder statements new d1e4c744bdc Predicated comparison folds new 732eff2973c Predicated arithmetic folds new 26ef82e3618 Add an empty_mask_is_expensive hook new 80a0901f868 Reuse results of vect_create_addr_base_for_vector_ref new 4445deeba8e Allow capped vectorisation factors new 0296146662f Add support for BRKA and LASTB new f0051cd19e5 Add support for CLASTB new af2db18adca Add support for FADDA new ae378521a8f Add support for gather loads and scatter stores new 29eed380e44 Avoid pessimistic check for overlapping groups new d448846d7fe Fix for big field stores new c092fdb9932 Support for aliasing with variable strides new 98d4366f61d Add support for speculative loads new 90b2d2609ed Add support for first-faulting loads new ff96746a4ae Allow single-element interleaving for non-power-of-2 strides new ec18574a642 Use single-iteration epilogues when peeling for gaps new 3737b05aac9 Replace FMA_EXPR with one internal fn per optab new acb3c9d2491 Support fused multiply-adds in fully-masked reductions new 560665e67be Record equivalences for spill registers new 8610e671bd4 Add early rematerialisation pass new adaacac36e5 Don't require an integer mode for PARALLELs new aced0fe83d2 Remove unnecessary temporary in tree-if-conv.c new c548ba751f0 Handle vector boolean types when calculating the SLP unroll factor new eb54cd0e094 Implement SLP of internal functions new 786b4eb1b04 Use conditional internal functions in if-conversion new 177960d125f Work around PR81082

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Summary of changes: gcc/ChangeLog | 1538 +++- gcc/DATESTAMP | 2 +- gcc/Makefile.in | 2 +- gcc/ada/ChangeLog | 975 +++ gcc/ada/Makefile.rtl | 3 +- gcc/ada/a-chtgop.adb | 49 +- gcc/ada/a-chtgop.ads | 20 +- gcc/ada/a-cihama.adb | 32 +- gcc/ada/a-cihama.ads | 6 +- gcc/ada/a-clrefi.adb | 497 +- gcc/ada/a-clrefi.ads | 73 +- gcc/ada/a-cohama.adb | 34 +- gcc/ada/a-cohama.ads | 12 +- gcc/ada/a-cohase.adb | 33 +- gcc/ada/a-cohase.ads | 6 +- gcc/ada/a-comlin.adb | 14 +- gcc/ada/a-comlin.ads | 13 +- gcc/ada/ali.adb | 12 +- gcc/ada/ali.ads | 13 +- gcc/ada/bcheck.adb | 70 +- gcc/ada/binde.adb | 229 +- gcc/ada/checks.adb | 44 +- gcc/ada/clean.adb | 1165 +-- gcc/ada/debug.adb | 10 +- gcc/ada/einfo.adb | 104 +- gcc/ada/einfo.ads | 49 +- gcc/ada/errout.adb | 14 +- gcc/ada/exp_aggr.adb | 35 +- gcc/ada/exp_attr.adb | 19 +- gcc/ada/exp_ch3.adb | 6 +- gcc/ada/exp_ch4.adb | 199 +- gcc/ada/exp_ch5.adb | 126 +- gcc/ada/exp_ch6.adb | 33 +- gcc/ada/exp_ch7.adb | 9 - gcc/ada/exp_dbug.adb | 15 +- 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