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from b5aa63b1c81 [PATCH 4/7] RISC-V: Honour -mrvv-max-lmul in riscv_vector:: [...] new 12deddebf63 [PATCH 5/7] RISC-V: Move vector memcpy decision making to s [...] new 72ceddbfb78 [PATCH 7/7] RISC-V: Disable by pieces for vector setmem len [...]
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Summary of changes: gcc/config/riscv/riscv-string.cc | 143 +++++++++++++-------- gcc/config/riscv/riscv.cc | 19 +++ .../gcc.target/riscv/rvv/autovec/pr113469.c | 3 +- gcc/testsuite/gcc.target/riscv/rvv/base/setmem-2.c | 12 +- gcc/testsuite/gcc.target/riscv/rvv/base/setmem-3.c | 12 +- 5 files changed, 122 insertions(+), 67 deletions(-)