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unknown user pushed a change to branch users/jhb/cheri-gdb-12-branch in repository binutils-gdb.
at f7eb074720f RISC-V: Handle capability return values.
This branch includes the following new commits:
new 260ff4143af Remove USE_SIGTRAP_SIGINFO condition for FreeBSD/x86 debug [...] new 907d277ba5f x86-nat: Use an unordered_map to store per-pid debug reg state. new ea5565ec24b x86-nat: Add x86_lookup_debug_reg_state. new 68f5e8f6e51 Add an x86_fbsd_nat_target mixin class for FreeBSD x86 nati [...] new a4b3aa82425 fbsd-nat: Add a low_new_fork virtual method. new a5abe3e43fc x86-fbsd-nat: Copy debug register state on fork. new 57c76a60d46 nat: Split out platform-independent aarch64 debug register [...] new 0edf57037aa aarch64: Add an aarch64_nat_target mixin class. new ec1e7569d12 fbsd-nat: Add helper routine to fetch siginfo_t for a ptid. new 564c823ba30 fbsd-nat: Add a low_delete_thread virtual method. new 6b25b731c97 fbsd-nat: Add a low_prepare_to_resume virtual method. new 83d2d401e13 Add support for hardware breakpoints/watchpoints on FreeBSD [...] new d03a638a13f elfcore_grok_freebsd_note: Remove checks of note->namesz. new 15401e52c6e Recognize FreeBSD core dump note for x86 segment base registers. new 0256feda23e Use pseudosections for NT_FREEBSD_X86_SEGBASES core dump notes. new f9ef5da6957 FreeBSD/x86: Read segment base registers from NT_X86_SEGBASES. new 5e38d039ead Use I386_GSBASE_REGNUM in i386fbsd_get_thread_local_address. new 6f60336f9ae Remove unused variable. new 128a9c3e0a2 Create pseudo sections for NT_ARM_TLS notes on FreeBSD. new 0c539231fb6 fbsd-nat: Add helper routines for register sets using PT_[G [...] new 93c4f7e2e1d Add an arm-tls feature which includes the tpidruro register [...] new e554a6e94f4 Read the tpidruro register from NT_ARM_TLS core dump notes [...] new 57588edd96f Support TLS variables on FreeBSD/arm. new 15488e7b9e0 Fetch the NT_ARM_TLS register set for native FreeBSD/arm pr [...] new f4e571e03b3 Add an aarch64-tls feature which includes the tpidr register. new b841a878603 Read the tpidr register from NT_ARM_TLS core dump notes on [...] new 10dedecb54d Support TLS variables on FreeBSD/Aarch64. new fc313583019 Fetch the NT_ARM_TLS register set for native FreeBSD/Aarch6 [...] new 65a8d6af639 aarch64-fbsd-nat: Move definition of debug_regs_probed unde [...] new 5c9fe4d5039 Read the tpidr register from NT_ARM_TLS core dump notes on [...] new aa9034c047f gdbserver: Read the tpidr register from NT_ARM_TLS on Linux. new 40fc6525327 Read the tpidr register from NT_ARM_TLS on Linux. new 37cf61d9704 gdbserver: Fix build after adding tls feature to arm tdesc. new 2172283925d Use aarch64_features to describe register features in targe [...] new de1b98af0b9 Tweak the std::hash<> specialization for aarch64_features. new 619dcdd2339 fbsd-nat: Correct the return type of the have_regset method. new f91f6a7601c [AArch64] Support AArch64 MTE memory tag dumps in core files new e9e1cead4f5 Fix include guard naming for arch/aarch64-mte-linux.h new c89063649ac [AArch64] MTE corefile support new 4f46a68bf26 gdb/hurd: pass memory_tagged as false to find_memory_region_ftype new 24ee6981d0d [AArch64] Prefer error messages from opcodes enabled in CPU [...] new c3dca9d1e9e [AArch64] Initial commit for Morello architecture new d72450891ce [Morello] Add mapping symbol to identify C64 code sections new cb633492f2d [Morello] Set LSB for c64 symbols in object code new 753f247ee9a [AArch64] Remove section caches for section data new bd99661a5c5 [Morello] Identify branch source and target using mapping symbols new 23ae9fb71e5 [Morello] Add MOV and CPY instructions for capabilities new f4205219f8b [Morello] ADD and SUB instructions new b8b6c29fb03 [Morello] Add BICFLGS new 0883e2443be [Morello] Branch and return instructions new 92bde626314 [Morello] Miscellaneous Morello Instructions new 68d29f92de3 [Morello] CLRTAG, CLRPERM new 93088e08de1 [Morello] Capability construction and modification instructions new 798ada5456c [Morello] Capability sealing and unsealing instructions new fadea6ae7ef [Morello] Load and branch instructions new cba328b8873 [Morello] Load and store instructions. new 7855d7bd2f9 [Morello] LDR immediate new ccc39bd0955 [Morello] All remaining load and store instructions new cf9e6560fa0 [Morello] Loads and stores with alternate base new d2ff0bdf52a [Morello] altbase: LDR/STR new b95748c01c5 [Morello] altbase: LDUR/STUR new 2043b45d917 [Morello] altbase: Remaining LD/ST new 2c027f56041 [Morello] Implement LDUR/STUR fallback for LDR/STR in altbase mode new 5f15c0bdfe7 [Morello] ADR, ADRP and ADRDP new 6fb2ebe54d4 [Morello] Add Morello system registers new 425bc5c29a2 [Morello] Make DC, IC capability aware in C64. new 5e31b3a16fc [Morello] Add Morello relocations for ADRP new 1f147f5f26f [Morello] Capability data relocations new 2236f6c4349 [Morello] Allow lo12 relocations for alternate base ld/st new 6c19c432c91 [Morello] Expand GOT entry sizes for C64 new a57c4eb9581 [Morello] GOT Relocations new 2692089e552 [Morello] Add symbol markers for reloc section for static binaries new fba8f966caf [Morello] Linker tests for capability data relocations new 3cfebff3bb1 [Morello] Implement branch relocations new 33830710c78 [Morello] Add interworking and range extension veneers new 3595337e357 [Morello] Capability support for exception headers new 9ff4237e3b2 [Morello] Pad section alignment to account for capability r [...] new e1b5fb87b2c [Morello] TLS Descriptor support new 09aeee70f0f [Morello] Initial capability data structure support + Unit testing new e5b477c563b [General] Add new builtin types to support capabilities new acab7d6adc6 [General] Add support for capability types and modifier in GDB new d3d6b2a0ec3 [General] gdbarch update to include code_capability_bit, da [...] new 4e1fa8e215f [General] Add target description support for capability types new 4636a629cab [Morello] Add new DWARF defines for capabilities new 4e90d169bde [Morello] Add feature check constant for capabilities new cc9102de0c4 [Morello] Add Morello target description XML and registers new b7e90df871f [Morello] Generate target descriptions based on runtime cap [...] new 57676e18937 [Morello] Add capability register set support new 3dfa60d4a19 [Morello] Capability address_class support and testcase new da8a4f5b99d [General] More capability type handling (merge with others) new 883f5c1d08b [Morello] Add set/show ABI command for AArch64 new e7295ce3799 [Morello] Add capability fault codes and report fault information new b7985998c2e [Morello] Add support for capability/pointer/integer conversions new 8ac1e17b636 [General] Add capability casts to scalar types new 9dbfbf0614a [General] Accept capabilities as a type of pointer new 31eb749d1c1 [Morello] Mask the LSB from cap mode addresses new 62af9386bd9 [Morello] Add support for Morello sigreturn/sigcontext frame new f281d14e9cc [Morello] Fix displaced stepping LSB adjustment and add deb [...] new 6c3c2477366 [Morello] Disable displaced stepping for Morello new 291b52aee4f [Morello] Add register aliases for Morello (cfp, clr, c31, [...] new 61d311016f8 [Morello] Add static ABI detection based on the __cap_reloc [...] new da94cb3cfed [Morello] Record mapping symbols and mark C64 function symb [...] new 2a3a7940b57 [General/Morello] Fetch and display register capability tag [...] new c47190a2c3b [Morello] Add 'C' augmentation character support new 2fbc2276242 [Morello] Enable DWARF unwinding with C registers new 0b943453688 [Morello] Unwinding: Restore CLR and PCC properly new 3609ea43d48 [Morello] Fixup manual unwinding without DWARF new 7ee6a165450 [Morello] Add preliminary core file register set support new 8048f911abd [Morello] Add iclass to add/sub instructions new b13dd5c79a9 [Morello] Add top-level README-morello new 1aca3a8ed2c Guard places using Morello C registers new ed96a7a577f Invert CSP/PCC and simplify access to C register numbers new 1369f4c005e Don't ignore pointer sizes when printing new c6a26c89d54 Support data_capability and code_capability types + update [...] new 951515fc160 Support casting capabilities/capability pointers to other types new b0d32c0644f Adjust capability string for printing new 558d76c626a Print shorter version of decoded capabilities new 3f7b6f76046 Print capability pointers as capabilities new fd9a12dca21 Use CLR DWARF register and PCC/CSP new ef9da044fd3 CHERI-style compact printing format new 6d833267116 Add switch to control compact/verbose printing of capabilities new f099d97aa36 Fix incorrect length for capabilities new 508748fef6b Fix attribute printing bug new 9b414634f8d Fix compact printing format and sealed check new 4d27c73d60c Don't print parenthesis if there are no capability attributes new fa2e6e6a04e Don't show extra __capability modifier new 9fa32fe0685 Adjust testcase for new CHERI printing option new 7c89baad0ad Fix include file define. new d15d8378839 Add PTRACE_POKECAP request and move things to a Morello-spe [...] new b9914a01926 Handle unavailable LR/PC new de798e03c79 Read capability tags from memory new 3c69f4f9e5f Remove spurious newline in fault message new 39934dda804 Enable Morello register set writes new cfd2c4eb808 Fix disassembly of C64 instructions in GDB new 4353c8e3fa6 Fix extracting tags from PCC and CSP new 69de3d06cf6 Enable capability writes to memory new 6c68d4ddb27 Support for passing/returning parameters new e1beef3c4b4 Remove stale test new 7eb6c78e2b9 Core file support (C registers) new 0d4db51c0af Print additional information on capability store errors new 4213f6df5d0 Make capability maintenance command available to cross GDB new 21ff4803088 Fix ABI check new 3f191bf6bf0 Improve maintenance command output format new 059cd0884c8 gas: Fix uninitialized c64 member of aarch64_fix struct new a68a54f598b gas: Use correct data type in parse_operands new 4190921ca86 gas: aarch64: Fixing expression calculation using C64 symbols new 5bb7075b8e5 gas: aarch64: Introduce the chericap directive new fac4bdbd57c gas: aarch64: Require 16 bytes for Morello capinit relocation new bbd81753039 Fixing missed ChangeLog entries. new b7f68b41966 gas: aarch64: Make chericap and capinit auto-align new 095b8d28180 gas: aarch64: Accept `purecap` and `hybrid` ABI parameters new b944cc65b57 Apply changes to allow compiling with -ansi new 9bc9924f288 gas: Allow MORELLO branch relocations to addresses with LSB set new 187e653b57a gas: Remove requirement of getting a target symbol new 8ab713a77c0 gas: ADR_LO21_PCREL accounts for LSB in symbol new deb7f372ee5 gas: Add whitespace in morello-capinit test output regexp new 3fda97fb602 Support linkmap offsets for the AAPCS64-CAP ABI new 139991d392c aarch64: Correct feature bits for Morello new 81c4eb38b2f morello-binutils: Adjust c64_valid_cap_range calculation new fe51282b058 morello: Fix encoding of ldtr/sttr new 9450f09787c aarch64: Mark purecap object files with EF_AARCH64_CHERI_PURECAP new 4b9a164ea99 Harden checks for capability maintenance commands new afc62fdf46a aarch64: Fix scbnds validation new 7593e4c70ce New --enable-threading configure option to control use of t [...] new b0740c3f757 Handle bitfield instructions in the prologue new 49295e420a3 Handle C regset write warnings better in GDBServer new 5096a9b0162 Workaround GDBserver register cache management new 84d7d92544f Fix segfault when creating builtin types new 1db97dc20b3 Introduce capability pseudo registers new 7e3d91f8199 Adjust PCC bounds when calling a function by hand in AAPCS64-CAP new 5900b71471e Improve GDBserver ptrace error message new 1372df2e143 Improve error messages for capability reads/writes to memory new 871cde60db9 Support assignment of capabilities to C registers new b82df50b7a6 Code cleanup and refactoring new 40e60df8239 Preserve tag when passing pointers/capabilities as parameters new 8e7352b83bd Simplify tag management in value structs new 792a11d0f2f Display tags for internal variable values new 1eb855e322d ld: Ignore TLS relocs against weak undef symbols new de2bc88712e Switch __cap_dynrelocs* to __rela_dyn* symbols new 6c8dc870660 Bugfixes in MORELLO GOT relocations new 7df44b98ae8 ld: Adjust bounds, base, and size for various symbols new 46025ce7452 Fixing cap_meta new 2478c950a85 Only warn on badly sized symbols new 00ef0d31ac9 Error linking binaries with differing e_flags. new c140b104081 Provide default permissions if section has no permission flags new cc6c6660510 Return the alignment required from c64_valid_cap_range new f7d7aa1f1b3 PCC bounds now span READONLY and RELRO sections new 197aecdf78b Add padding with an expression rather than a hard-address new cdb61d60edc elfNN_c64_resize_section always sets alignment new 32b8b7e3d19 Always ensure that the PCC bounds are precise for Morello new 6e76955f50a Pad and align sections in more cases new 397dbafc91c Rework the resize_sections function new 65366b5a7f7 resize_sections Add testsuite changes new 88e4c4a400d Adjust which sections we resize for precise bounds new 90e0ccd25e1 Account for LSB on c64 e_entry in the same way as Thumb new a020f289ceb Assign correct size on Morello TLS relocations new 744182f113b Account for LSB in more relocations new 0f2e853b5c7 Record and check initial implementation new 5d65fbfdfe0 Treat `start_stop` symbols as having section size new d2a48f43873 Fix c64-ifunc-2 test new 62905c3acfa Add a size to __ehdr_start new bcbdc79c9e8 Accept alternative-base LDRS[BHW] as an alias of LDURS[BHW] new 94d0f06fa33 Allow WZR in alt-base loads and stores new dba0e3214b1 Handle locally-resolving entries in the GOT new 8e87389a289 Account for LSB on DT_INIT/DT_FINI entries new a0e2fb492a1 Predicate fixes around srelcaps and capability GOT relocations new 75d0589d05e Morello do not create RELATIVE relocs for dynamic GOT entries new 8dbd69dd162 Fix fetching of auxv for PCuABI new 5e61a5c9c45 Teach gdbserver about 32-byte auxv entries for the PCuABI new 58969269b95 Conditionally define user_morello_state and user_cap structs new c3f22fe190a Use htab->c64_rel more, do not use GOT_CAP new 0a22ef87678 Emit CAPINIT relocations for dynamically linked PDE's new 4e308470a2c Account for weak undefined symbols in Morello new be3aa1f3c9e Make emit-relocs-morello-6 work on different targets new 6497edeafcf Use global GOT type to determine GOT action new a3b0c285b50 Neaten up a clause in final_link_relocate new 7eb2ec2ab2f [Morello GDB] Fix bug in conditional definition of morello structs new f461ee26589 [Morello GDB] Fix AUXV reading/parsing for corefiles and re [...] new 022cd04c691 [Morello GDB] Fix a couple hardware watchpoint issues aroun [...] new 6e169eb375d Improve Morello feature detection new 32cc7460606 Standardise check for static PDE new 379107f3ec2 Adjust TLS relaxation condition new 319d73f26a0 Add new relocations to GAS new 28e8998a01b Add new relocations to linker (excluding relaxations) new 24bbdcf3e27 Implement Morello TLS relaxations new 228ee1184c2 Remove layout_sections_again argument to size_stubs new 8a9dec7339b Extra error checking around TLS relocations new c0195d34466 Add linker tests for TLS changes new 82dda7aed94 Make various linker tests more robust new 2fbc59b753a Add CPSR C64 bit (26) new 09ed8bbf8e7 make_capability_type: Use gdbarch_capability_bit to set size. new 2c83109da51 struct type: Add TYPE_TAGGED property on types. new 9ba620e8058 regcache: Add support for register tags. new 9777edd0351 aarch64-tdep: Update for register tags in regcache. new a3f3467a683 gdbarch: Remove method for register tags. new 080f4291b4e morello: Remove the tag_map register. new fa7e7c64625 regcache: Add collect/supply_regset variants that accept a [...] new 741d9d49742 fbsd-nat: Use regset supply/collect methods. new 8e25841a293 fbsd-nat: Pass an optional register base to the register se [...] new 3edaefc1cec aarch64-linux: Use tag_map to populate register tags in the [...] new 1347d0e26a8 remote: Assume tagged registers supply tag in a leading byte. new 5f9cbc8ffcc Morello: Initialize morello_capability_pseudo_type to nullptr. new e6799ac9495 Morello: Add macros for cap registers that accept a base register. new 5f55dbc2f8b Morello Linux: Use cap register number macros in regmap. new 7a072476566 value_fetch_lazy_register: Copy tag from fetched register value. new e7668ed9afb trad_frame_set_reg_regmap: Permit a non-zero register base. new 2c6efba10eb Recognize capreg note and add a psuedo-section for GDB to find. new ae2249908ad Teach GDB about SIGPROT. new 41176549f22 Add support for siginfo with CHERI. new d7bebd77459 fbsd-tdep: Report MI details for CHERI signals. new e9a743230e5 fbsd-tdep: Add a custom AUXV parser. new 8f8b4d0ea5e Morello: Set gdbarch_ptr_bit to 128 for purecap. new 55de1de55d7 Update solib*.c to work with CHERI capabilities. new 079ef6a1c16 Make 'info sharedlibrary' more readable with CHERI. new 8310f0eb2e5 frame_unwind_register_unsigned: Return address from capabilities. new 40f7b3f510f Morello: CheriBSD architecture support. new bf3398cb057 Add gdbarch methods for printing capabilities. new f17f05b7940 Use gdbarch_print_cap* methods when printing capabilities. new cbec413578b Add capability::metadata_str. new 9088360ce54 Morello: Add gdbarch_print_cap* methods. new d0b76b1726f capability: Don't print redundant "sealed" for sentries. new fa4c1b42280 Elide "__capability" modifier for purecap ABIs. new 4339421da94 fbsd-nat: Add a have_register_set helper function. new c9160e49422 aarch64-fbsd: Use a static regset for the TLS register set. new 0c5dee0bdd8 aarch64-fbsd-nat: Support the capability register set for Morello. new 5523045f81c Add a 'set program-interpreter' command. new a4f89e9870e Copy ELF header flags from executable to core file. new cabfc6253d9 Read memory capabilities atomically. new 36d1b3bff14 Write memory capabilities atomically. new 085e57a4449 Default gdbarch_capability_bit to 0, not ptr_bit. new c4b319952ea x: Print CHERI memory tags using a similar format to MTE. new 9871dc5976d Use PIOD_READ_CHERI_CAP to read memory capabilities from ru [...] new 73f3aa50043 eXamine: Update to support capabilities. new d176ed7c9af value_primitive_field: Always mark capabilities lazy. new 56309b5dff8 value_fetch_lazy_memory: Fetch tags for *intcap_t as well. new 9f708a5f008 Don't treat *intcap_t as pointers. new 7bc890cf060 bfd/binutils: Handle Morello memory tag core dump segments. new 277941710e6 Retire gdbarch_get/set_cap_tag_from_address. new 4fcabda29af get_next_core_memtag_section: Accept section name as an argument. new 4c0a168738a corelow: Implement the target read_capability method. new 7e23b94e293 Add CHERI-RISC-V ELF header flags. new d960560a448 riscv_parsing_subset_version: Handle "0p0" version strings. new eed5ba5c57d Initial support for disassembling CHERI-RISC-V instructions. new 2f893d4ecca Support for disassembling CHERI-RISC-V capmode instructions. new d6a05f2cbf6 Add RISC-V CHERI register xml files new 2be1bc103fa Add basic CHERI-RISC-V support including CHERI registers. new e8662fc9c8b CHERI-RISC-V: Add basic hybrid and purecap support. new 39cc5fc44cc Handle JALR.CAP in riscv_next_pc(). new fc5c479ddec Don't call tag_map_regno twice for each index. new e4eb6e50f1f fbsd-tdep: Export fbsd_report_signal_info. new 7db238bcb4f riscv-tdep: Export riscv_features_from_bfd. new 039008c7310 Add FreeBSD support for CHERI-RISC-V. new d16bdb3d994 bfd/binutils: Support for CHERI-RISC-V memory tag segments. new 8ff1bd02227 Native support for FreeBSD CHERI-RISC-V. new 2df9f9bf324 git subrepo clone https://github.com/CTSRD-CHERI/cheri-comp [...] new 5ef4317aaf2 CHERI-RISC-V: Support for displaying capability attributes. new ddd1b56a1dc CHERI-RISC-V: Improve handling of hybrid binaries. new 4695a547e1f gdb tdesc: Handle mismatched pointer register types. new 3028b53283d make_pointer_type: Set TYPE_INSTANCE_FLAG_CAPABILITY on cap [...] new 8d9e9641f3f Set tagged and FLAG_CAPABILITY on C++ reference types. new 92dec342061 Set is_tagged and FLAG_CAPABILITY in arch_capability/pointer_type. new f7eb074720f RISC-V: Handle capability return values.
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