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from 542c60c4fb5 Daily bump. new e9f827d7910 RISC-V: Fix riscv_vector_chunks configuration according to [...] new 45f12872682 RISC-V: Fix comment in riscv.h new e8089aff360 RISC-V: Add RVV constraints. new 8fe75147a94 RISC-V: Add csrr vlenb instruction. new e8c83ab9d51 RISC-V: Add vector registers in TARGET_CONDITIONAL_REGISTER_USAGE
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Summary of changes: gcc/config/riscv/constraints.md | 20 +++++++++++ gcc/config/riscv/riscv.cc | 34 ++++++++++++++---- gcc/config/riscv/riscv.h | 4 +-- gcc/config/riscv/riscv.md | 79 +++++++++++++++++++++++++++++------------ 4 files changed, 107 insertions(+), 30 deletions(-)