[Tcwg-commits] [toolchain/ci/llvm-monorepo] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-defconfig updated (c9f4c3129a5 -> 52587b9a1a6)

20 Dec 2018


      This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-defconfig
in repository toolchain/ci/llvm-monorepo.
from  c9f4c3129a5 [gn build] Add build file for clang/lib/Basic and dependenc [...]
      adds  94a360394be [x86] add test to show ddup hole; NFC (PR37502)
      adds  d180757598a [llvm-ar] Simplify string table get-or-insert pattern with  [...]
      adds  591fcf58bcc [analyzer] CStringChecker: Fix a crash on C++ overloads of  [...]
      adds  a7909a56738 [analyzer] CStringChecker: Add the forgotten test file.
      adds  702432c943c Revert "[BDCE][DemandedBits] Detect dead uses of undead ins [...]
      adds  225e3800fc8 [AArch64] Use canonical copy idiom
      adds  c0ca0c407e5 [AArch64] Improve Exynos predicates
      adds  ed50df96d48 [llvm-mca] Update Exynos test cases (NFC)
      adds  da229ba49b6 [llvm-mca] Rename directory for the Cortex tests (NFC)
      adds  75f328b4810 Test commit
      adds  68c45690476 Fix test commit
      adds  df911ca4d31 Disable -faddsig by default for PS4 target.
      adds  b2c4733f222 Fix line endings.
      adds  6d85a0339d3 [CodeGenPrepare] Fix bad IR created by large offset GEP splitting.
      adds  94bdd34c292 AMDGPU: Add patterns for v4i16/v4f16 -> v4i16/v4f16 bitcasts
      adds  fcf0d6e9d7b [X86] Remove TLI variable from ReplaceNodeResults. NFC
      adds  97ea333d636 [analyzer] Improve modeling for returning an object from th [...]
      adds  d7ceb754c16 Simplify. NFC.
      adds  04967130a49 [analyzer] GenericTaint: Fix formatting to prepare for inco [...]
      adds  96e41ee11a7 [sanitizer] Support running without fd 0,1,2.
      adds  5ec8a8fd725 Simplify code for readability. (NFC)
      adds  5f89562bbaa [analyzer] pr38668: Do not attempt to cast loaded values of [...]
      adds  e622b52c944 [gn build] Add check-lld target and make it work
      adds  ed7d8f48ba0 [DwarfExpression] Fix a typo in a doxygen comment. NFC.
      adds  436d4a80a58 [gn build] Make `ninja check-lld` also run LLD's unit tests
      adds  e8107519b6a [asan] Disable test incompatible with new Android
      adds  26981a86e52 [asan] Prevent folding of globals with redzones
      adds  6ed2577872f [asan] Undo special treatment of linkonce_odr and weak_odr
      adds  c67db861af1 AMDGPU/GlobalISel: Legality/regbankselect for atomicrmw/ato [...]
      adds  52a50559edf AMDGPU/GlobalISel: RegBankSelect for fp conversions
      adds  7979c93d4df [binutils] NFC: fix clang-tidy warning: use empty() instead [...]
      adds  1b29d9b274a [lldbsuite] Un-xfail tests on Windows that are now passing (pt.3)
      adds  0a30419e6d3 [AArch64][GlobalISel] Implement selection og G_MERGE of two [...]
      adds  04696f2186b [lldbsuite] Un-xfail tests on Windows that are now passing (pt.4)
      adds  bda90fdab38 [X86] Disable custom widening of signed/unsigned add/sub sa [...]
      adds  2f4e9ed9138 AMDGPU/GlobalISel: Fix ValueMapping tables for i1
      adds  e32d88560ba AMDGPU: Make i1/i64/v2i32 and/or/xor legal
      adds  9ec54ea2cd9 Remove pointless casts.
      adds  6bbb3cfa15d [lldb] Retrieve currently handled Obj-C exception via __cxa [...]
      adds  45bd06b7b6f [lldbsuite] Un-xfail tests on Windows that are now passing (pt.5)
      adds  d420a835d31 [WebAssembly] Gate unimplemented SIMD ops on flag
      adds  63aee2fd65b [lldbsuite] Un-xfail TestDataFormatterSynthVal on Windows
      adds  7374e43cedd [lldbsuite] Un-xfail TestRedefinitionsInInlines on Windows
      adds  00293090ffe Fix build errors introduced by r349712 on aarch64 bots.
      adds  b2aaee2b8de [WebAssembly] Emit a splat for v128 IMPLICIT_DEF
      adds  aa2d8dfbb46 Introduce llvm.loop.parallel_accesses and llvm.access.group [...]
      adds  d24569589d8 [DAGCombiner] Fix a place that was creating a SIGN_EXTEND w [...]
      adds  8367fba0647 [PowerPC] Implement the isSelectSupported() target hook
      adds  91d2797ba4d [HWASAN] Add support for memory intrinsics
      adds  1ce6f5d39ac [Sema] Better static assert diagnostics for expressions inv [...]
      adds  749bd83b08b [HWASAN] Add support for memory intrinsics
      adds  d0d0152f038 [CodeGen][ExpandMemcmp] Add an option for allowing overlapp [...]
      adds  a4113506504 [NFC] Fix trailing comma after function.
      adds  dbd73a154b5 Revert r349731 "[CodeGen][ExpandMemcmp] Add an option for a [...]
      adds  b5b5eea0a2b [MSan] Don't emit __msan_instrument_asm_load() calls
      adds  97725794d4d [InstCombine][AMDGPU] Handle more buffer intrinsics
      adds  486619c0653 [asan] Fix and re-enable few test on Android
      adds  14c65c57b50 [yaml2obj/obj2yaml] - Support dumping/parsing ABI version.
      adds  29786bd94d2 [llvm-objcopy] - Do not drop the OS/ABI and ABIVersion fiel [...]
      adds  22888ec21e5 [X86] Change 'simple nonmem' intrinsic test to not use PADDSW
      adds  27b0b25374a [asan] Revert still Androind incompatible tests enabled in r349736
      adds  c66e58f02a3 [llvm-objcopy] Use ELFOSABI_NONE instead of 0. NFC.
      adds  f98bcf5e352 [X86] Update PADDSW/PSUBSW intrinsic usage with generic sat [...]
      adds  0baa74aaaa3 [X86][SSE] Auto upgrade PADDS/PSUBS intrinsics to SADD_SAT/ [...]
      adds  cc64cee1e4b [X86][SSE] Auto upgrade PADDS/PSUBS intrinsics to SADD_SAT/ [...]
      adds  5e64bc3a75d Revert "[sanitizer] Support running without fd 0,1,2."
      adds  2cae51d8a35 [SystemZ] Make better use of VLDEB
      adds  66247779899 Re-land r349731 "[CodeGen][ExpandMemcmp] Add an option for  [...]
      adds  e2042f65a0a [SystemZ] Make better use of VGEF/VGEG
      adds  298eef742d4 [SystemZ] Make better use of VLLEZ
      adds  9a07b622d5b [clangd] Don't miss the expected type in merge.
      adds  03aeb2ec773 [SystemZ] Fix wrong codegen caused by typos in vecintrin.h
      adds  ea0c6bd2d44 Replace getOS() == llvm::Triple::*BSD with isOS*BSD() [NFCI]
      adds  c9d95371239 [SystemZ] Improve testing of vecintrin.h intrinsics
      adds  4f6df4173e7 [Driver] Fix accidentally reversed condition in r349752
      adds  234d2ae525f [Sema][NFC] Add test for static_assert diagnistics with con [...]
      adds  02091866829 [gn build] Add build files for clang/lib/Lex and clang/lib/AST
      adds  211c535f7cf [gn build] Add build files for clang/lib/{Analysis,Edit,Sema}
      adds  222ebd19c6d [clang-tidy] Use translationUnitDecl() instead of a custom  [...]
      adds  521f49acabc [InstCombine] Make x86 PADDS/PSUBS constant folding tests generic
      adds  ad714fd8575 Fix gcc7 -Wdangling-else warning. NFCI.
      adds  2afeeec3b1a [SystemZ] "Generic" vector assembler instructions shoud clobber CC
      adds  e786aab0859 [Sanitizer] Enable vis api on FreeBSD
      adds  316253326c3 [X86][AVX512] Don't custom lower v16i8 rotations.
      adds  870cc8bb285 [RISCV] Properly evaluate fixup_riscv_pcrel_lo12
      adds  a792a86e390 [SelectionDAGBuilder] Enable funnel shift building to custo [...]
      adds  7979d065a63 Replace MemoryRegionInfoSP with values and cleanup related code
      adds  d2690d6263f Overload GetMemoryRegions for the ProcessMinidump
      adds  5aae4643a21 [clangd] Expose FileStatus to LSP.
      adds  610bbe6caed [clangd] Try to workaround test failure by increasing the timeouts
      adds  e423dfef4c0 [Hexagon] Add patterns for funnel shifts
      adds  227090455b9 Test commit
       new  c992a1008f8 [PPC64] Add toc-optimizations for got based relocations.
       new  54901cc890f [x86] add test to show missed movddup load fold; NFC
       new  c776a2c8fdf [InstCombine] Preserve access-group metadata.
       new  8cb0a6b5bb0 [lldbsuite] Skip TestConflictingSymbol (test_shadowed) on Windows
       new  c8994b841c2 Correct the diagnose_if attribute documentation. Fixes PR35845.
       new  52587b9a1a6 [CodeView] Emit global variables within lexical scopes to l [...]
The 6 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
 .../readability/SimplifyBooleanExprCheck.cpp       |   22 +-
 .../readability/SimplifyBooleanExprCheck.h         |    1 -
 clang-tools-extra/clangd/ClangdLSPServer.cpp       |   15 +-
 clang-tools-extra/clangd/ClangdLSPServer.h         |    6 +-
 clang-tools-extra/clangd/Protocol.cpp              |    7 +
 clang-tools-extra/clangd/Protocol.h                |   15 +
 clang-tools-extra/clangd/TUScheduler.cpp           |   34 +
 clang-tools-extra/clangd/TUScheduler.h             |    2 +
 clang-tools-extra/clangd/index/Merge.cpp           |    2 +
 clang-tools-extra/test/clangd/filestatus.test      |   13 +
 .../unittests/clangd/BackgroundIndexTests.cpp      |    6 +-
 clang-tools-extra/unittests/clangd/IndexTests.cpp  |    2 +
 clang/include/clang/AST/PrettyPrinter.h            |    5 +-
 clang/include/clang/AST/Type.h                     |    8 +-
 clang/include/clang/Basic/AttrDocs.td              |    4 +-
 clang/lib/AST/TypePrinter.cpp                      |   31 +-
 clang/lib/Basic/Targets/AArch64.cpp                |    4 +-
 clang/lib/Basic/Targets/ARM.cpp                    |   12 +-
 clang/lib/Basic/Targets/Mips.h                     |    8 +-
 clang/lib/Basic/Targets/PPC.cpp                    |    4 +-
 clang/lib/Basic/Targets/PPC.h                      |    2 +-
 clang/lib/Basic/Targets/Sparc.h                    |    2 +-
 clang/lib/CodeGen/CGBuiltin.cpp                    |   27 +-
 clang/lib/Driver/ToolChains/Arch/Mips.cpp          |    4 +-
 clang/lib/Driver/ToolChains/Clang.cpp              |   11 +-
 clang/lib/Driver/ToolChains/CommonArgs.cpp         |   24 +-
 clang/lib/Driver/ToolChains/Gnu.cpp                |    2 +-
 clang/lib/Driver/XRayArgs.cpp                      |    6 +-
 clang/lib/Headers/vecintrin.h                      |    6 +-
 clang/lib/Sema/SemaTemplate.cpp                    |    6 +-
 .../lib/StaticAnalyzer/Checkers/CStringChecker.cpp |   90 +-
 .../Checkers/CheckSecuritySyntaxOnly.cpp           |    8 +-
 .../Checkers/GenericTaintChecker.cpp               |  214 +--
 clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp    |   31 +-
 clang/lib/StaticAnalyzer/Core/Store.cpp            |   26 +-
 clang/test/Analysis/casts.c                        |   11 +
 clang/test/Analysis/pointer-to-member.cpp          |    7 +-
 clang/test/Analysis/string.cpp                     |   28 +
 clang/test/Analysis/temporaries.cpp                |   96 +-
 clang/test/CodeGen/avx2-builtins.c                 |    8 +-
 clang/test/CodeGen/avx512bw-builtins.c             |   24 +-
 clang/test/CodeGen/avx512vlbw-builtins.c           |   32 +-
 clang/test/CodeGen/builtins-systemz-zvector.c      | 1529 +++++++++++++++++-
 clang/test/CodeGen/builtins-systemz-zvector2.c     |  303 +++-
 clang/test/CodeGen/sse2-builtins.c                 |    8 +-
 clang/test/Driver/addrsig.c                        |    1 +
 clang/test/SemaCXX/static-assert-cxx17.cpp         |   48 +
 clang/test/SemaCXX/static-assert.cpp               |   15 +
 compiler-rt/lib/asan/asan_thread.cc                |    4 +-
 compiler-rt/lib/hwasan/CMakeLists.txt              |    1 +
 compiler-rt/lib/hwasan/hwasan.cc                   |   63 +-
 compiler-rt/lib/hwasan/hwasan_checks.h             |   79 +
 compiler-rt/lib/hwasan/hwasan_interface_internal.h |    7 +
 compiler-rt/lib/hwasan/hwasan_memintrinsics.cc     |   45 +
 .../sanitizer_platform_interceptors.h              |    2 +-
 .../sanitizer_platform_limits_freebsd.cc           |    3 +
 .../sanitizer_platform_limits_freebsd.h            |    2 +
 .../asan/TestCases/Linux/asan_rt_confict_test-2.cc |    4 +-
 .../test/asan/TestCases/Linux/local_alias.cc       |    9 +-
 .../test/asan/TestCases/Linux/odr-violation.cc     |   20 +-
 .../test/asan/TestCases/Linux/odr-vtable.cc        |    9 +-
 compiler-rt/test/asan/TestCases/Linux/odr_c_test.c |    8 +-
 .../test/asan/TestCases/Linux/preinit_test.cc      |    7 +-
 compiler-rt/test/asan/TestCases/printf-3.c         |    4 +
 compiler-rt/test/hwasan/TestCases/mem-intrinsics.c |   37 +
 .../TestCases/{NetBSD => Posix}/vis.cc             |    2 +
 lld/ELF/Arch/PPC64.cpp                             |   22 +-
 lld/ELF/SymbolTable.cpp                            |   19 +-
 lld/test/ELF/ppc64-got-off.s                       |   17 +
 lldb/include/lldb/API/SBMemoryRegionInfo.h         |    1 +
 lldb/include/lldb/API/SBMemoryRegionInfoList.h     |    6 +
 lldb/include/lldb/API/SBThread.h                   |    3 +-
 lldb/include/lldb/Target/LanguageRuntime.h         |   11 +
 lldb/include/lldb/Target/MemoryRegionInfo.h        |    6 +
 lldb/include/lldb/Target/Process.h                 |    2 +-
 lldb/include/lldb/Target/Thread.h                  |    3 +-
 lldb/include/lldb/lldb-forward.h                   |    4 +-
 lldb/lit/SymbolFile/NativePDB/nested-types.cpp     |    4 +-
 .../rdar44436068/Test128BitsInteger.py             |    5 +-
 .../unwind_expression/TestUnwindExpression.py      |    1 -
 .../conditional_break/TestConditionalBreak.py      |    3 -
 .../data-formatter-cpp/TestDataFormatterCpp.py     |    3 -
 .../TestDataFormatterSmartArray.py                 |    3 -
 .../TestDataFormatterSynthVal.py                   |    3 -
 .../disassembly/TestDisassembleBreakpoint.py       |    3 -
 .../recursive-inferior/TestRecursiveInferior.py    |    5 +-
 .../memory/cache/TestMemoryCache.py                |    3 -
 .../functionalities/memory/find/TestMemoryFind.py  |    1 -
 .../postmortem/minidump-new/TestMiniDumpNew.py     |   62 +
 .../crash_during_step/TestCrashDuringStep.py       |    1 -
 .../thread/exit_during_step/TestExitDuringStep.py  |    9 -
 .../thread/thread_exit/TestThreadExit.py           |    3 -
 .../test/lang/c/anonymous/TestAnonymous.py         |    1 -
 .../c/conflicting-symbol/TestConflictingSymbol.py  |    1 +
 .../lang/c/inlines/TestRedefinitionsInInlines.py   |   10 +-
 .../test/lang/c/shared_lib/TestSharedLib.py        |    2 -
 .../test/lang/c/struct_types/TestStructTypes.py    |    5 +-
 .../TestClassTemplateParameterPack.py              |    2 -
 .../lang/cpp/class_static/TestStaticVariables.py   |    4 +-
 .../lldbsuite/test/lang/cpp/lambdas/TestLambdas.py |    5 +-
 .../test/lang/cpp/llvm-style/TestLLVMStyle.py      |    5 +-
 .../test/lang/cpp/namespace/TestNamespaceLookup.py |    7 +-
 .../namespace_conflicts/TestNamespaceConflicts.py  |    5 +-
 .../lldbsuite/test/lang/cpp/scope/TestCppScope.py  |    2 +-
 .../lldbsuite/test/lang/objc/exceptions/Makefile   |    2 +-
 .../lang/objc/exceptions/TestObjCExceptions.py     |  108 +-
 .../test/lang/objc/exceptions/{main.m => main.mm}  |   35 +-
 .../lldbsuite/test/python_api/frame/TestFrames.py  |    1 -
 .../test/python_api/hello_world/TestHelloWorld.py  |    2 -
 .../watchlocation/TestTargetWatchAddress.py        |    1 -
 lldb/scripts/interface/SBMemoryRegionInfo.i        |    3 +
 lldb/scripts/interface/SBThread.i                  |   18 +
 lldb/source/API/SBMemoryRegionInfoList.cpp         |   32 +-
 lldb/source/API/SBProcess.cpp                      |   46 +-
 lldb/source/API/SBThread.cpp                       |    3 +-
 lldb/source/Commands/CommandObjectThread.cpp       |    5 +-
 lldb/source/Core/ValueObjectChild.cpp              |    9 +-
 .../ItaniumABI/ItaniumABILanguageRuntime.cpp       |   58 +
 .../ItaniumABI/ItaniumABILanguageRuntime.h         |    3 +
 .../ObjC/AppleObjCRuntime/AppleObjCRuntime.cpp     |  102 ++
 .../ObjC/AppleObjCRuntime/AppleObjCRuntime.h       |    6 +
 .../Plugins/Process/minidump/MinidumpParser.cpp    |    9 +-
 .../Plugins/Process/minidump/MinidumpParser.h      |    5 +-
 .../Plugins/Process/minidump/MinidumpTypes.cpp     |    2 +
 .../Plugins/Process/minidump/ProcessMinidump.cpp   |    6 +
 .../Plugins/Process/minidump/ProcessMinidump.h     |    3 +
 lldb/source/Target/Process.cpp                     |   12 +-
 lldb/source/Target/Thread.cpp                      |   33 +-
 llvm/docs/LangRef.rst                              |  132 +-
 llvm/include/llvm/Analysis/DemandedBits.h          |    6 -
 llvm/include/llvm/Analysis/LoopInfo.h              |   26 +
 llvm/include/llvm/Analysis/LoopInfoImpl.h          |    5 +-
 llvm/include/llvm/Analysis/TargetTransformInfo.h   |    8 +-
 llvm/include/llvm/Analysis/VectorUtils.h           |   20 +-
 llvm/include/llvm/IR/IntrinsicsX86.td              |   24 +-
 llvm/include/llvm/IR/LLVMContext.h                 |    1 +
 llvm/include/llvm/ObjectYAML/ELFYAML.h             |    1 +
 llvm/include/llvm/Transforms/Utils/LoopUtils.h     |    2 +-
 llvm/lib/Analysis/DemandedBits.cpp                 |   47 +-
 llvm/lib/Analysis/LoopInfo.cpp                     |   72 +-
 llvm/lib/Analysis/VectorUtils.cpp                  |   95 +-
 llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp      |  201 ++-
 llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h        |   29 +-
 llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h      |    2 +-
 llvm/lib/CodeGen/CodeGenPrepare.cpp                |    7 +-
 llvm/lib/CodeGen/ExpandMemCmp.cpp                  |  233 +--
 llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp      |    2 +-
 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp      |    2 +-
 .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp   |    6 +-
 llvm/lib/IR/LLVMContext.cpp                        |    1 +
 llvm/lib/Object/ArchiveWriter.cpp                  |   10 +-
 llvm/lib/ObjectYAML/ELFYAML.cpp                    |    1 +
 .../Target/AArch64/AArch64InstructionSelector.cpp  |   49 +
 llvm/lib/Target/AArch64/AArch64SchedPredExynos.td  |   13 +-
 llvm/lib/Target/AArch64/AArch64SchedPredicates.td  |    4 +-
 .../Target/AMDGPU/AMDGPUGenRegisterBankInfo.def    |   63 +-
 llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp     |   24 +-
 llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp  |   53 +-
 llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h    |    2 +
 llvm/lib/Target/AMDGPU/SIInstructions.td           |    2 +
 llvm/lib/Target/Hexagon/HexagonISelLowering.cpp    |   11 +-
 llvm/lib/Target/Hexagon/HexagonPatterns.td         |   88 +-
 llvm/lib/Target/PowerPC/PPCISelLowering.h          |    5 +
 .../Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp  |   39 +
 .../Target/RISCV/MCTargetDesc/RISCVAsmBackend.h    |    7 +-
 llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp |   82 +
 llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h   |   10 +
 llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp    |    2 +-
 llvm/lib/Target/SystemZ/SystemZISelLowering.cpp    |   51 +-
 llvm/lib/Target/SystemZ/SystemZISelLowering.h      |    1 +
 llvm/lib/Target/SystemZ/SystemZInstrFormats.td     |   23 +-
 llvm/lib/Target/SystemZ/SystemZInstrVector.td      |    6 +-
 llvm/lib/Target/SystemZ/SystemZOperators.td        |   42 +-
 .../lib/Target/WebAssembly/WebAssemblyFastISel.cpp |    2 +
 .../Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp |    2 +
 .../Target/WebAssembly/WebAssemblyISelLowering.cpp |    6 +
 .../lib/Target/WebAssembly/WebAssemblyInstrInfo.td |    1 +
 .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td |   13 +-
 .../Target/WebAssembly/WebAssemblyRegStackify.cpp  |   16 +-
 llvm/lib/Target/X86/X86ISelLowering.cpp            |   26 +-
 llvm/lib/Target/X86/X86TargetTransformInfo.cpp     |    5 +-
 .../Transforms/InstCombine/InstCombineCalls.cpp    |    5 +
 .../InstCombine/InstCombineLoadStoreAlloca.cpp     |    3 +-
 llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp |    1 +
 .../InstCombine/InstCombineSimplifyDemanded.cpp    |    4 +
 .../Instrumentation/AddressSanitizer.cpp           |   10 +-
 .../Instrumentation/HWAddressSanitizer.cpp         |   42 +
 .../Transforms/Instrumentation/MemorySanitizer.cpp |   14 +-
 llvm/lib/Transforms/Scalar/BDCE.cpp                |   38 +-
 llvm/lib/Transforms/Scalar/GVNHoist.cpp            |    2 +-
 llvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp  |    2 +
 llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp     |    3 +-
 llvm/lib/Transforms/Scalar/SROA.cpp                |   12 +-
 llvm/lib/Transforms/Scalar/Scalarizer.cpp          |    3 +-
 llvm/lib/Transforms/Utils/InlineFunction.cpp       |   26 +-
 llvm/lib/Transforms/Utils/Local.cpp                |   11 +-
 llvm/lib/Transforms/Utils/LoopUtils.cpp            |   49 +-
 llvm/lib/Transforms/Utils/SimplifyCFG.cpp          |    3 +-
 .../LoopInfo/annotated-parallel-complex.ll         |   91 ++
 .../Analysis/LoopInfo/annotated-parallel-simple.ll |   37 +
 .../GlobalISel/legalizer-info-validation.mir       |    2 +-
 .../AArch64/GlobalISel/select-scalar-merge.mir     |   34 +
 .../CodeGen/AMDGPU/GlobalISel/legalize-and.mir     |   59 +-
 .../AMDGPU/GlobalISel/legalize-atomic-cmpxchg.mir  |   71 +
 .../AMDGPU/GlobalISel/legalize-atomicrmw-add.mir   |   63 +
 .../AMDGPU/GlobalISel/legalize-atomicrmw-and.mir   |   63 +
 .../AMDGPU/GlobalISel/legalize-atomicrmw-max.mir   |   63 +
 .../AMDGPU/GlobalISel/legalize-atomicrmw-min.mir   |   63 +
 .../AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir  |   22 +
 .../AMDGPU/GlobalISel/legalize-atomicrmw-or.mir    |   63 +
 .../AMDGPU/GlobalISel/legalize-atomicrmw-sub.mir   |   63 +
 .../AMDGPU/GlobalISel/legalize-atomicrmw-umax.mir  |   63 +
 .../AMDGPU/GlobalISel/legalize-atomicrmw-umin.mir  |   63 +
 .../GlobalISel/legalize-atomicrmw-xchg-flat.mir    |   36 +
 .../AMDGPU/GlobalISel/legalize-atomicrmw-xchg.mir  |   63 +
 .../AMDGPU/GlobalISel/legalize-atomicrmw-xor.mir   |   63 +
 .../CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir |   17 +
 .../test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir |   59 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-xor.mir     |   59 +-
 .../AMDGPU/GlobalISel/regbankselect-and.mir        |  156 +-
 .../GlobalISel/regbankselect-atomic-cmpxchg.mir    |   66 +
 .../GlobalISel/regbankselect-atomicrmw-add.mir     |   57 +
 .../GlobalISel/regbankselect-atomicrmw-and.mir     |   57 +
 .../GlobalISel/regbankselect-atomicrmw-max.mir     |   57 +
 .../GlobalISel/regbankselect-atomicrmw-min.mir     |   57 +
 .../GlobalISel/regbankselect-atomicrmw-or.mir      |   57 +
 .../GlobalISel/regbankselect-atomicrmw-sub.mir     |   57 +
 .../GlobalISel/regbankselect-atomicrmw-umax.mir    |   57 +
 .../GlobalISel/regbankselect-atomicrmw-umin.mir    |   57 +
 .../GlobalISel/regbankselect-atomicrmw-xchg.mir    |   57 +
 .../GlobalISel/regbankselect-atomicrmw-xor.mir     |   57 +
 ...kselect-trunc.mir => regbankselect-fptrunc.mir} |   20 +-
 .../CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir |   16 +-
 .../AMDGPU/GlobalISel/regbankselect-sitofp.mir     |   31 +
 .../AMDGPU/GlobalISel/regbankselect-trunc.mir      |   59 +-
 .../AMDGPU/GlobalISel/regbankselect-uitofp.mir     |   31 +
 .../AMDGPU/GlobalISel/regbankselect-xor.mir        |   16 +-
 llvm/test/CodeGen/AMDGPU/bitcast-v4f16-v4i16.ll    |   35 +
 llvm/test/CodeGen/Hexagon/funnel-shift.ll          |  265 ++++
 llvm/test/CodeGen/Hexagon/rotate.ll                |   41 +-
 llvm/test/CodeGen/PowerPC/memcmpIR.ll              |   24 +-
 llvm/test/CodeGen/PowerPC/select-i1-vs-i1.ll       |   20 +-
 llvm/test/CodeGen/SystemZ/vec-conv-02.ll           |   17 +-
 llvm/test/CodeGen/SystemZ/vec-move-08.ll           |   32 +
 llvm/test/CodeGen/SystemZ/vec-move-14.ll           |   42 +
 llvm/test/CodeGen/SystemZ/vec-move-18.ll           |   12 +
 llvm/test/CodeGen/WebAssembly/implicit-def.ll      |    4 +-
 llvm/test/CodeGen/WebAssembly/simd-arith.ll        |   18 +-
 llvm/test/CodeGen/WebAssembly/simd.ll              |   13 +-
 llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll |   16 +-
 .../CodeGen/X86/avx512bw-intrinsics-canonical.ll   |  286 +++-
 .../CodeGen/X86/avx512bwvl-intrinsics-canonical.ll |  586 ++++++-
 llvm/test/CodeGen/X86/build-vector-128.ll          |  113 ++
 llvm/test/CodeGen/X86/funnel-shift-rot.ll          |  105 +-
 llvm/test/CodeGen/X86/memcmp-optsize.ll            |   73 +-
 llvm/test/CodeGen/X86/memcmp.ll                    |  161 +-
 llvm/test/CodeGen/X86/pic-load-remat.ll            |   22 +-
 llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll |   16 +-
 llvm/test/CodeGen/X86/vector-fshl-rot-128.ll       | 1450 +++++++----------
 llvm/test/CodeGen/X86/vector-fshl-rot-256.ll       | 1295 ++++++---------
 llvm/test/CodeGen/X86/vector-fshl-rot-512.ll       |   38 +-
 llvm/test/CodeGen/X86/vector-fshr-rot-128.ll       | 1653 ++++++++------------
 llvm/test/CodeGen/X86/vector-fshr-rot-256.ll       | 1404 ++++++++---------
 llvm/test/CodeGen/X86/vector-fshr-rot-512.ll       |   46 +-
 llvm/test/CodeGen/X86/vector-rotate-128.ll         |  186 +--
 llvm/test/DebugInfo/COFF/global_visibility.ll      |  276 ++++
 llvm/test/DebugInfo/COFF/type-quals.ll             |   82 +-
 .../AddressSanitizer/global_cstring_darwin.ll      |   10 +-
 .../AddressSanitizer/global_metadata.ll            |    2 +-
 .../AddressSanitizer/global_metadata_array.ll      |    2 +-
 .../AddressSanitizer/global_metadata_windows.ll    |    4 +-
 .../AddressSanitizer/win-string-literal.ll         |    4 +-
 .../HWAddressSanitizer/mem-intrinsics.ll           |   40 +
 .../MemorySanitizer/msan_asm_conservative.ll       |    6 -
 .../MemorySanitizer/msan_x86intrinsics.ll          |   10 +-
 llvm/test/MC/RISCV/fixups.s                        |   15 +-
 llvm/test/MC/RISCV/pcrel-lo12-invalid.s            |    5 +
 llvm/test/MC/RISCV/relocations.s                   |   27 +-
 llvm/test/ThinLTO/X86/lazyload_metadata.ll         |    4 +-
 llvm/test/Transforms/BDCE/dead-uses.ll             |    4 +-
 .../CodeGenPrepare/AArch64/large-offset-gep.ll     |   13 +-
 llvm/test/Transforms/ExpandMemCmp/X86/memcmp.ll    |  424 +++--
 .../Transforms/Inline/parallel-loop-md-callee.ll   |   56 +
 .../Transforms/Inline/parallel-loop-md-merge.ll    |   78 +
 llvm/test/Transforms/Inline/parallel-loop-md.ll    |   18 +-
 .../AMDGPU/amdgcn-demanded-vector-elts.ll          |  960 ++++++++++++
 .../Transforms/InstCombine/X86/x86-adds-subs.ll    |  399 -----
 llvm/test/Transforms/InstCombine/bitcast-store.ll  |    5 +-
 .../InstCombine/intersect-accessgroup.ll           |  113 ++
 .../Transforms/InstCombine/loadstore-metadata.ll   |   17 +-
 .../InstCombine/mem-par-metadata-memcpy.ll         |   11 +-
 .../InstCombine/saturating-add-sub-vector.ll       |  411 +++++
 .../Transforms/LoopVectorize/X86/force-ifcvt.ll    |   11 +-
 .../X86/parallel-loops-after-reg2mem.ll            |   13 +-
 .../Transforms/LoopVectorize/X86/parallel-loops.ll |   34 +-
 llvm/test/Transforms/LoopVectorize/X86/pr34438.ll  |    9 +-
 .../Transforms/LoopVectorize/X86/vect.omp.force.ll |   14 +-
 .../LoopVectorize/X86/vect.omp.force.small-tc.ll   |   46 +-
 .../LoopVectorize/X86/vector_max_bandwidth.ll      |    9 +-
 llvm/test/Transforms/SROA/mem-par-metadata-sroa.ll |   33 +-
 llvm/test/Transforms/Scalarizer/basic.ll           |   25 +-
 .../SimplifyCFG/combine-parallel-mem-md.ll         |   21 +-
 .../AArch64/{CortexA57 => Cortex}/direct-branch.s  |    0
 .../{CortexA57 => Cortex}/shifted-register.s       |    0
 .../llvm-mca/AArch64/Exynos/load-register-offset.s |   61 -
 .../AArch64/Exynos/store-register-offset.s         |   47 -
 llvm/test/tools/llvm-objcopy/ELF/copy-osabi.test   |   16 +
 llvm/test/tools/yaml2obj/elf-abiversion.yaml       |   16 +
 llvm/tools/llvm-ar/llvm-ar.cpp                     |   16 +-
 llvm/tools/llvm-cov/CodeCoverage.cpp               |    2 +-
 llvm/tools/llvm-cov/SourceCoverageView.cpp         |    2 +-
 llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp     |    2 +-
 llvm/tools/llvm-nm/llvm-nm.cpp                     |    8 +-
 llvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp         |    2 +-
 llvm/tools/llvm-objcopy/ELF/Object.cpp             |    8 +-
 llvm/tools/llvm-objcopy/ELF/Object.h               |    2 +
 llvm/tools/llvm-objdump/MachODump.cpp              |   17 +-
 llvm/tools/llvm-objdump/llvm-objdump.cpp           |    6 +-
 llvm/tools/llvm-readobj/ELFDumper.cpp              |    2 +-
 llvm/tools/llvm-readobj/llvm-readobj.cpp           |    2 +-
 llvm/tools/llvm-size/llvm-size.cpp                 |    2 +-
 llvm/tools/obj2yaml/elf2yaml.cpp                   |    1 +
 llvm/tools/yaml2obj/yaml2elf.cpp                   |    2 +-
 llvm/unittests/ProfileData/SampleProfTest.cpp      |    6 +-
 llvm/utils/gn/build/write_cmake_config.py          |    2 +-
 llvm/utils/gn/secondary/BUILD.gn                   |   26 +-
 .../gn/secondary/clang/include/clang/AST/BUILD.gn  |   79 +
 .../gn/secondary/clang/include/clang/Sema/BUILD.gn |   46 +
 llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn     |  101 ++
 .../utils/gn/secondary/clang/lib/Analysis/BUILD.gn |   36 +
 llvm/utils/gn/secondary/clang/lib/Edit/BUILD.gn    |   15 +
 llvm/utils/gn/secondary/clang/lib/Lex/BUILD.gn     |   31 +
 llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn    |   66 +
 llvm/utils/gn/secondary/lld/test/BUILD.gn          |  136 ++
 .../secondary/lld/test/lld_lit_site_cfg_files.gni  |    2 +
 llvm/utils/gn/secondary/lld/unittests/BUILD.gn     |    7 +
 .../secondary/lld/unittests/DriverTests/BUILD.gn   |   15 +
 .../gn/secondary/lld/unittests/MachOTests/BUILD.gn |   19 +
 .../gn/secondary/llvm/tools/llvm-config/BUILD.gn   |  138 ++
 .../gn/secondary/llvm/utils/llvm-lit/BUILD.gn      |   51 +
 .../gn/secondary/llvm/utils/unittest/BUILD.gn      |   40 +
 .../llvm/utils/unittest/UnitTestMain/BUILD.gn      |   25 +
 342 files changed, 14067 insertions(+), 5895 deletions(-)
 create mode 100644 clang-tools-extra/test/clangd/filestatus.test
 create mode 100644 clang/test/Analysis/string.cpp
 create mode 100644 compiler-rt/lib/hwasan/hwasan_checks.h
 create mode 100644 compiler-rt/lib/hwasan/hwasan_memintrinsics.cc
 create mode 100644 compiler-rt/test/hwasan/TestCases/mem-intrinsics.c
 rename compiler-rt/test/sanitizer_common/TestCases/{NetBSD => Posix}/vis.cc (99%)
 rename lldb/packages/Python/lldbsuite/test/lang/objc/exceptions/{main.m => main.mm} (57%)
 create mode 100644 llvm/test/Analysis/LoopInfo/annotated-parallel-complex.ll
 create mode 100644 llvm/test/Analysis/LoopInfo/annotated-parallel-simple.ll
 create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/select-scalar-merge.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomic-cmpxchg.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-add.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-and.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-max.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-min.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-or.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-sub.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-umax.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-umin.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg-flat.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xor.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomic-cmpxchg.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-add.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-and.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-max.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-min.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-or.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-sub.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-umax.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-umin.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-xchg.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-xor.mir
 copy llvm/test/CodeGen/AMDGPU/GlobalISel/{regbankselect-trunc.mir => regbankselect [...]
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/bitcast-v4f16-v4i16.ll
 create mode 100644 llvm/test/CodeGen/Hexagon/funnel-shift.ll
 create mode 100644 llvm/test/DebugInfo/COFF/global_visibility.ll
 create mode 100644 llvm/test/Instrumentation/HWAddressSanitizer/mem-intrinsics.ll
 create mode 100644 llvm/test/MC/RISCV/pcrel-lo12-invalid.s
 create mode 100644 llvm/test/Transforms/Inline/parallel-loop-md-callee.ll
 create mode 100644 llvm/test/Transforms/Inline/parallel-loop-md-merge.ll
 delete mode 100644 llvm/test/Transforms/InstCombine/X86/x86-adds-subs.ll
 create mode 100644 llvm/test/Transforms/InstCombine/intersect-accessgroup.ll
 create mode 100644 llvm/test/Transforms/InstCombine/saturating-add-sub-vector.ll
 rename llvm/test/tools/llvm-mca/AArch64/{CortexA57 => Cortex}/direct-branch.s (100%)
 rename llvm/test/tools/llvm-mca/AArch64/{CortexA57 => Cortex}/shifted-register.s (100%)
 delete mode 100644 llvm/test/tools/llvm-mca/AArch64/Exynos/load-register-offset.s
 delete mode 100644 llvm/test/tools/llvm-mca/AArch64/Exynos/store-register-offset.s
 create mode 100644 llvm/test/tools/llvm-objcopy/ELF/copy-osabi.test
 create mode 100644 llvm/test/tools/yaml2obj/elf-abiversion.yaml
 create mode 100644 llvm/utils/gn/secondary/clang/include/clang/AST/BUILD.gn
 create mode 100644 llvm/utils/gn/secondary/clang/include/clang/Sema/BUILD.gn
 create mode 100644 llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
 create mode 100644 llvm/utils/gn/secondary/clang/lib/Analysis/BUILD.gn
 create mode 100644 llvm/utils/gn/secondary/clang/lib/Edit/BUILD.gn
 create mode 100644 llvm/utils/gn/secondary/clang/lib/Lex/BUILD.gn
 create mode 100644 llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
 create mode 100644 llvm/utils/gn/secondary/lld/test/BUILD.gn
 create mode 100644 llvm/utils/gn/secondary/lld/test/lld_lit_site_cfg_files.gni
 create mode 100644 llvm/utils/gn/secondary/lld/unittests/BUILD.gn
 create mode 100644 llvm/utils/gn/secondary/lld/unittests/DriverTests/BUILD.gn
 create mode 100644 llvm/utils/gn/secondary/lld/unittests/MachOTests/BUILD.gn
 create mode 100644 llvm/utils/gn/secondary/llvm/tools/llvm-config/BUILD.gn
 create mode 100644 llvm/utils/gn/secondary/llvm/utils/llvm-lit/BUILD.gn
 create mode 100644 llvm/utils/gn/secondary/llvm/utils/unittest/BUILD.gn
 create mode 100644 llvm/utils/gn/secondary/llvm/utils/unittest/UnitTestMain/BUILD.gn
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[Tcwg-commits] [toolchain/ci/llvm-monorepo] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-defconfig updated (c9f4c3129a5 -> 52587b9a1a6)