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from 372c5da2153 fortran/intrinsic.texi: Add 'intrinsic' to SIGNAL example new c51040cb434 RISC-V: Optimize consecutive permutation index pattern by v [...]
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Summary of changes: gcc/config/riscv/riscv-v.cc | 85 +++++++++++++++++++ .../vls-vlmax/{compress-1.c => consecutive-1.c} | 4 +- .../vls-vlmax/{compress-2.c => consecutive-2.c} | 7 +- .../{compress_run-1.c => consecutive_run-1.c} | 10 +-- .../{compress_run-2.c => consecutive_run-2.c} | 12 +-- .../riscv/rvv/autovec/vls/consecutive-1.c | 94 ++++++++++++++++++++++ .../riscv/rvv/autovec/vls/consecutive-2.c | 68 ++++++++++++++++ .../riscv/rvv/autovec/vls/consecutive-3.c | 68 ++++++++++++++++ .../gcc.target/riscv/rvv/autovec/vls/def.h | 6 ++ 9 files changed, 337 insertions(+), 17 deletions(-) copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/{compress-1.c => consecu [...] copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/{compress-2.c => consecu [...] copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/{compress_run-1.c => con [...] copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/{compress_run-2.c => con [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/consecutive-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/consecutive-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/consecutive-3.c