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from c15acfb [InstCombine] add 'exact' to lshr to show that it got dropped; NFC new f406e81 [InstCombine] fixed to propagate 'exact' on lshr new 430953e DAG: Constant fold fp16_to_fp/fp16_to_fp new 549b31f [X86][SSE] Add support for combining PINSRW+ASSERTZEXT+PEXTRW [...]
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Summary of changes: lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 19 +++++++ lib/Target/X86/X86ISelLowering.cpp | 20 ++++++++ lib/Transforms/InstCombine/InstCombineShifts.cpp | 2 +- test/CodeGen/AMDGPU/br_cc.f16.ll | 27 +++++----- test/CodeGen/AMDGPU/fadd.f16.ll | 19 +++---- test/CodeGen/AMDGPU/fmul.f16.ll | 19 +++---- test/CodeGen/AMDGPU/fsub.f16.ll | 30 +++++------ test/CodeGen/AMDGPU/llvm.fma.f16.ll | 13 ++--- test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll | 6 +-- test/CodeGen/AMDGPU/llvm.maxnum.f16.ll | 30 +++++------ test/CodeGen/AMDGPU/llvm.minnum.f16.ll | 30 +++++------ test/CodeGen/AMDGPU/select.f16.ll | 58 ++++++++++------------ test/CodeGen/AMDGPU/v_mac.ll | 8 ++- test/CodeGen/AMDGPU/v_mac_f16.ll | 34 ++++++------- test/CodeGen/ARM/fp16-promote.ll | 10 ++-- test/CodeGen/ARM/fp16-v3.ll | 2 +- .../CodeGen/X86/clear_upper_vector_element_bits.ll | 16 +----- test/Transforms/InstCombine/shift.ll | 2 +- 18 files changed, 165 insertions(+), 180 deletions(-)