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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/binutils-gdb.
from 2749ac1339 Automatic date update in version.in adds abb6af934c C++-ify path substitution code adds 0ca813c3d5 Automatic date update in version.in adds a96eadd871 gdb: only include mips and riscv targets if building with 64 [...] adds 8b8b05a454 gdb: have mips_nbsd_nat_target inherit from nbsd_nat_target adds 200fd2874d gdb: make post_startup_inferior a virtual method on inf_ptra [...] adds f24791b72e gdbserver: introduce scoped_restore_current_thread and switc [...] adds 24583e45ef gdbserver: replace direct assignments to current_thread adds 20ac1cdb8c gdbserver/linux-low: replace direct assignment to current_thread adds 7eb1526a80 gdb: update gdb-gdb.py.in for latest changes to struct field adds e6582e1b3c gdb: improve reuse of value contents when fetching array elements adds 408db576c9 gdb: Powerpc mark xfail in gdb.base/catch-syscall.exp adds 14aa4ee440 x86: Adjust linker tests for --disable-separate-code adds 527b8861cd Automatic date update in version.in adds fdb2b35b8f RISC-V: Added ld testcases for the medlow and medany code models. adds 3524a83e59 gdb/mi: rename mi_lookup to mi_cmd_lookup adds f76d800be8 gdb/mi: use std::map for MI commands in mi-cmds.c adds 3be0fed62e gdb/mi: int to bool conversion in mi_execute_cli_command adds 1f6c8c3317 gdb/mi: use separate classes for different types of MI command adds 788ec57f0a gdb/mi: rename mi_cmd to mi_command adds 78d4da9ae0 gdb/mi: rename build_table to add_builtin_mi_commands adds 9bc8e54b1f bfd: fix -Wunused errors with clang 13+ adds b2c7007bdd gdbserver/tracepoint.cc: work around -Wstringop-truncation error adds 237f6eac15 gdbserver/tracepoint.cc: use snprintf in gdb_agent_socket_init adds eda0ddeb26 XCOFF C_STSYM test failure on 32-bit host adds a078dd9ce8 loongarch64 build failure on 32-bit host adds 47cf88952a loongarch32 build failure on 32-bit host adds d5c9473176 Automatic date update in version.in adds 161e87d121 PR28694, Out-of-bounds write in stab_xcoff_builtin_type adds 4d3605c8ca Fix an undefined behaviour in the BFD library's DWARF parser. adds 261b07488b New --enable-threading configure option to control use of th [...] adds 161cdabc39 PR28691, validate dwarf attribute form adds da72876cc5 Automatic date update in version.in adds a547eaf18c gdb: re-format with black 21.9b0 adds 37260e0df0 gdb: re-format with black 21.12b0 adds 05f62e0c9a Re: Fix an undefined behaviour in the BFD library's DWARF parser adds 6628ac006d Adjust compare_link_order for unstable qsort adds 4095db4c9c sim: fix mingw builds with replacement gnulib open adds 444cc278b9 bfd: unify texi generation rules adds 7d554943ba sim: mips/or1k: drop redundant arg to bitsize macro adds 23ff54c27d RISC-V: Support svinval extension with frozen version 1.0. adds 3518022233 aarch64: Add support for Armv9.1-A to Armv9.3-A adds b3e4d9326f arm: Add support for Armv8.7-A and Armv8.8-A adds a2b1ea81ba arm: Add support for Armv9.1-A to Armv9.3-A
No new revisions were added by this update.
Summary of changes: bfd/ChangeLog | 5 + bfd/coffcode.h | 4 +- bfd/coffgen.c | 11 +- bfd/config.bfd | 2 +- bfd/doc/Makefile.am | 121 ++--- bfd/doc/Makefile.in | 137 ++--- bfd/dwarf1.c | 10 +- bfd/dwarf2.c | 184 +++++-- bfd/ecofflink.c | 7 - bfd/elf-m10200.c | 6 - bfd/elf-m10300.c | 6 - bfd/elf32-bfin.c | 5 +- bfd/elf32-cr16.c | 5 +- bfd/elf32-lm32.c | 5 +- bfd/elf32-microblaze.c | 14 - bfd/elf32-nds32.c | 12 +- bfd/elf32-nios2.c | 6 +- bfd/elf32-score.c | 13 +- bfd/elf32-score7.c | 11 +- bfd/elf64-ia64-vms.c | 6 - bfd/elfxx-riscv.c | 3 + bfd/version.h | 2 +- binutils/stabs.c | 87 ++-- gas/NEWS | 6 +- gas/config/tc-aarch64.c | 3 + gas/config/tc-arm.c | 19 +- gas/config/tc-loongarch.c | 12 +- gas/doc/c-aarch64.texi | 3 +- gas/doc/c-arm.texi | 2 + gas/testsuite/gas/aarch64/armv9_1.d | 12 + gas/testsuite/gas/aarch64/armv9_1.s | 5 + gas/testsuite/gas/aarch64/armv9_1_invalid.d | 1 + gas/testsuite/gas/aarch64/armv9_1_invalid.l | 2 + gas/testsuite/gas/aarch64/armv9_1_invalid.s | 2 + gas/testsuite/gas/aarch64/armv9_2.d | 13 + gas/testsuite/gas/aarch64/armv9_2.s | 6 + gas/testsuite/gas/aarch64/armv9_2_invalid.d | 1 + gas/testsuite/gas/aarch64/armv9_2_invalid.l | 5 + gas/testsuite/gas/aarch64/armv9_2_invalid.s | 6 + gas/testsuite/gas/aarch64/armv9_3.d | 17 + gas/testsuite/gas/aarch64/armv9_3.s | 11 + gas/testsuite/gas/aarch64/armv9_invalid.d | 1 + gas/testsuite/gas/aarch64/armv9_invalid.l | 3 + gas/testsuite/gas/aarch64/armv9_invalid.s | 3 + gas/testsuite/gas/arm/attr-march-armv8_7-a.d | 17 + gas/testsuite/gas/arm/attr-march-armv8_8-a.d | 17 + gas/testsuite/gas/arm/attr-march-armv9_1-a.d | 17 + gas/testsuite/gas/arm/attr-march-armv9_2-a.d | 17 + gas/testsuite/gas/arm/attr-march-armv9_3-a.d | 17 + gas/testsuite/gas/arm/bfloat16-armv8.7-a.d | 5 + gas/testsuite/gas/arm/bfloat16-armv8.8-a.d | 5 + gas/testsuite/gas/arm/bfloat16-armv9.1-a.d | 5 + gas/testsuite/gas/arm/bfloat16-armv9.2-a.d | 5 + gas/testsuite/gas/arm/bfloat16-armv9.3-a.d | 5 + gas/testsuite/gas/arm/i8mm-armv8.7-a.d | 5 + gas/testsuite/gas/arm/i8mm-armv8.8-a.d | 5 + gas/testsuite/gas/arm/i8mm-armv9.1-a.d | 5 + gas/testsuite/gas/arm/i8mm-armv9.2-a.d | 5 + gas/testsuite/gas/arm/i8mm-armv9.3-a.d | 5 + gas/testsuite/gas/riscv/svinval.d | 15 + gas/testsuite/gas/riscv/svinval.s | 5 + gdb/Makefile.in | 22 +- gdb/NEWS | 11 + gdb/aarch64-linux-nat.c | 2 +- gdb/configure | 24 +- gdb/fbsd-nat.c | 2 +- gdb/fbsd-nat.h | 5 +- gdb/gdb-gdb.py.in | 19 +- gdb/inf-child.c | 7 - gdb/inf-child.h | 2 - gdb/inf-ptrace.c | 2 +- gdb/inf-ptrace.h | 11 + gdb/linux-nat.c | 2 + gdb/linux-nat.h | 6 +- gdb/mi/mi-cmd-info.c | 4 +- gdb/mi/mi-cmds.c | 571 ++++++++++++--------- gdb/mi/mi-cmds.h | 72 ++- gdb/mi/mi-main.c | 51 +- gdb/mi/mi-main.h | 12 + gdb/mi/mi-parse.c | 20 +- gdb/mi/mi-parse.h | 6 +- gdb/mips-netbsd-nat.c | 3 +- gdb/netbsd-nat.c | 2 +- gdb/netbsd-nat.h | 4 +- gdb/obsd-nat.c | 2 + gdb/obsd-nat.h | 5 +- gdb/python/lib/gdb/__init__.py | 1 - gdb/rs6000-aix-nat.c | 5 + gdb/source.c | 173 ++----- gdb/source.h | 2 +- gdb/target-delegates.c | 23 - gdb/target.c | 8 - gdb/target.h | 14 - gdb/testsuite/gdb.base/catch-syscall.exp | 37 +- gdb/testsuite/gdb.base/non-lazy-array-index.c | 31 ++ gdb/testsuite/gdb.base/non-lazy-array-index.exp | 78 +++ gdb/testsuite/gdb.gdb/python-helper.cc | 40 ++ gdb/testsuite/gdb.gdb/python-helper.exp | 153 +++++- .../gdb.multi/multi-target-info-inferiors.py | 14 +- gdb/testsuite/gdb.python/py-events.py | 9 +- gdb/valarith.c | 18 +- gdb/x86-linux-nat.c | 2 + gdb/x86-linux-nat.h | 7 +- gdbserver/configure | 24 +- gdbserver/gdbthread.h | 22 + gdbserver/inferiors.cc | 31 +- gdbserver/linux-low.cc | 120 ++--- gdbserver/linux-x86-low.cc | 6 +- gdbserver/mem-break.cc | 15 +- gdbserver/netbsd-low.cc | 2 +- gdbserver/proc-service.cc | 7 +- gdbserver/regcache.cc | 10 +- gdbserver/remote-utils.cc | 5 +- gdbserver/server.cc | 13 +- gdbserver/target.cc | 4 +- gdbserver/thread-db.cc | 14 +- gdbserver/tracepoint.cc | 21 +- gdbserver/win32-low.cc | 6 +- gdbsupport/common.m4 | 22 +- gdbsupport/configure | 24 +- include/opcode/aarch64.h | 102 ++-- include/opcode/arm.h | 9 + include/opcode/riscv-opc.h | 16 + include/opcode/riscv.h | 1 + ld/ldelfgen.c | 11 +- ld/testsuite/ld-i386/report-reloc-1.l | 4 +- ld/testsuite/ld-riscv-elf/code-model-01.ld | 24 + ld/testsuite/ld-riscv-elf/code-model-02.ld | 24 + ld/testsuite/ld-riscv-elf/code-model-medany-01.d | 4 + ld/testsuite/ld-riscv-elf/code-model-medany-02.d | 17 + .../ld-riscv-elf/code-model-medany-weakref-01.d | 4 + .../ld-riscv-elf/code-model-medany-weakref-02.d | 13 + ld/testsuite/ld-riscv-elf/code-model-medlow-01.d | 4 + ld/testsuite/ld-riscv-elf/code-model-medlow-02.d | 15 + .../ld-riscv-elf/code-model-medlow-weakref-01.d | 13 + .../ld-riscv-elf/code-model-medlow-weakref-02.d | 13 + .../ld-riscv-elf/code-model-relax-medany-01.d | 4 + .../ld-riscv-elf/code-model-relax-medany-02.d | 15 + .../code-model-relax-medany-weakref-01.d | 4 + .../code-model-relax-medany-weakref-02.d | 13 + .../ld-riscv-elf/code-model-relax-medlow-01.d | 13 + .../ld-riscv-elf/code-model-relax-medlow-02.d | 13 + .../code-model-relax-medlow-weakref-01.d | 12 + .../code-model-relax-medlow-weakref-02.d | 12 + ld/testsuite/ld-riscv-elf/code-model.s | 47 ++ ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 16 + ld/testsuite/ld-x86-64/pe-x86-64.exp | 12 +- ld/testsuite/ld-x86-64/pr19609-4e.d | 2 +- ld/testsuite/ld-x86-64/pr19609-6a.d | 2 +- ld/testsuite/ld-x86-64/pr19609-6b.d | 2 +- ld/testsuite/ld-x86-64/pr19609-7b.d | 2 +- ld/testsuite/ld-x86-64/pr19609-7d.d | 2 +- ld/testsuite/ld-x86-64/report-reloc-1.l | 4 +- opcodes/riscv-opc.c | 7 + sim/common/sim-io.c | 4 +- sim/mips/configure | 3 +- sim/mips/configure.ac | 3 +- sim/or1k/configure | 2 +- sim/or1k/configure.ac | 2 +- 159 files changed, 2059 insertions(+), 1189 deletions(-) create mode 100644 gas/testsuite/gas/aarch64/armv9_1.d create mode 100644 gas/testsuite/gas/aarch64/armv9_1.s create mode 100644 gas/testsuite/gas/aarch64/armv9_1_invalid.d create mode 100644 gas/testsuite/gas/aarch64/armv9_1_invalid.l create mode 100644 gas/testsuite/gas/aarch64/armv9_1_invalid.s create mode 100644 gas/testsuite/gas/aarch64/armv9_2.d create mode 100644 gas/testsuite/gas/aarch64/armv9_2.s create mode 100644 gas/testsuite/gas/aarch64/armv9_2_invalid.d create mode 100644 gas/testsuite/gas/aarch64/armv9_2_invalid.l create mode 100644 gas/testsuite/gas/aarch64/armv9_2_invalid.s create mode 100644 gas/testsuite/gas/aarch64/armv9_3.d create mode 100644 gas/testsuite/gas/aarch64/armv9_3.s create mode 100644 gas/testsuite/gas/aarch64/armv9_invalid.d create mode 100644 gas/testsuite/gas/aarch64/armv9_invalid.l create mode 100644 gas/testsuite/gas/aarch64/armv9_invalid.s create mode 100644 gas/testsuite/gas/arm/attr-march-armv8_7-a.d create mode 100644 gas/testsuite/gas/arm/attr-march-armv8_8-a.d create mode 100644 gas/testsuite/gas/arm/attr-march-armv9_1-a.d create mode 100644 gas/testsuite/gas/arm/attr-march-armv9_2-a.d create mode 100644 gas/testsuite/gas/arm/attr-march-armv9_3-a.d create mode 100644 gas/testsuite/gas/arm/bfloat16-armv8.7-a.d create mode 100644 gas/testsuite/gas/arm/bfloat16-armv8.8-a.d create mode 100644 gas/testsuite/gas/arm/bfloat16-armv9.1-a.d create mode 100644 gas/testsuite/gas/arm/bfloat16-armv9.2-a.d create mode 100644 gas/testsuite/gas/arm/bfloat16-armv9.3-a.d create mode 100644 gas/testsuite/gas/arm/i8mm-armv8.7-a.d create mode 100644 gas/testsuite/gas/arm/i8mm-armv8.8-a.d create mode 100644 gas/testsuite/gas/arm/i8mm-armv9.1-a.d create mode 100644 gas/testsuite/gas/arm/i8mm-armv9.2-a.d create mode 100644 gas/testsuite/gas/arm/i8mm-armv9.3-a.d create mode 100644 gas/testsuite/gas/riscv/svinval.d create mode 100644 gas/testsuite/gas/riscv/svinval.s create mode 100644 gdb/testsuite/gdb.base/non-lazy-array-index.c create mode 100644 gdb/testsuite/gdb.base/non-lazy-array-index.exp create mode 100644 gdb/testsuite/gdb.gdb/python-helper.cc create mode 100644 ld/testsuite/ld-riscv-elf/code-model-01.ld create mode 100644 ld/testsuite/ld-riscv-elf/code-model-02.ld create mode 100644 ld/testsuite/ld-riscv-elf/code-model-medany-01.d create mode 100644 ld/testsuite/ld-riscv-elf/code-model-medany-02.d create mode 100644 ld/testsuite/ld-riscv-elf/code-model-medany-weakref-01.d create mode 100644 ld/testsuite/ld-riscv-elf/code-model-medany-weakref-02.d create mode 100644 ld/testsuite/ld-riscv-elf/code-model-medlow-01.d create mode 100644 ld/testsuite/ld-riscv-elf/code-model-medlow-02.d create mode 100644 ld/testsuite/ld-riscv-elf/code-model-medlow-weakref-01.d create mode 100644 ld/testsuite/ld-riscv-elf/code-model-medlow-weakref-02.d create mode 100644 ld/testsuite/ld-riscv-elf/code-model-relax-medany-01.d create mode 100644 ld/testsuite/ld-riscv-elf/code-model-relax-medany-02.d create mode 100644 ld/testsuite/ld-riscv-elf/code-model-relax-medany-weakref-01.d create mode 100644 ld/testsuite/ld-riscv-elf/code-model-relax-medany-weakref-02.d create mode 100644 ld/testsuite/ld-riscv-elf/code-model-relax-medlow-01.d create mode 100644 ld/testsuite/ld-riscv-elf/code-model-relax-medlow-02.d create mode 100644 ld/testsuite/ld-riscv-elf/code-model-relax-medlow-weakref-01.d create mode 100644 ld/testsuite/ld-riscv-elf/code-model-relax-medlow-weakref-02.d create mode 100644 ld/testsuite/ld-riscv-elf/code-model.s