This is an automated email from the git hooks/post-receive script.
unknown user pushed a change to branch aarch64/sve-acle-branch in repository gcc.
from 3a279e3172c [SVE ACLE] Add svrecpe, svrecps and svrecpx new fb9cad4f80e [SVE ACLE] Add svrsqrt[es] new beac435f416 [SVE ACLE] Add svscale new 506bc9fbc96 [SVE ACLE] Add svtsmul and svtssel new 084e166ca3c [SVE ACLE] Add svtmad new 7f45b272c9a [SVE ACLE] Add svexpa new 41c24a8c73c [SVE ACLE] Add svcvt new e98ba57b295 [SVE ACLE] Add svreinterpret new b49f702fb8f [SVE ACLE] Fix ICE when inlining VLA returns
The 8 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: gcc/config/aarch64/aarch64-sve-builtins.c | 396 +++++++++++- gcc/config/aarch64/aarch64-sve-builtins.def | 18 + gcc/config/aarch64/aarch64-sve.md | 423 +++++++++--- gcc/config/aarch64/aarch64.md | 1 - gcc/config/aarch64/iterators.md | 62 +- .../gcc.target/aarch64/sve-acle/asm/cvt_f16.c | 716 +++++++++++++++++++++ .../gcc.target/aarch64/sve-acle/asm/cvt_f32.c | 538 ++++++++++++++++ .../gcc.target/aarch64/sve-acle/asm/cvt_f64.c | 538 ++++++++++++++++ .../gcc.target/aarch64/sve-acle/asm/cvt_s16.c | 73 +++ .../gcc.target/aarch64/sve-acle/asm/cvt_s32.c | 211 ++++++ .../gcc.target/aarch64/sve-acle/asm/cvt_s64.c | 211 ++++++ .../gcc.target/aarch64/sve-acle/asm/cvt_u16.c | 73 +++ .../gcc.target/aarch64/sve-acle/asm/cvt_u32.c | 211 ++++++ .../gcc.target/aarch64/sve-acle/asm/cvt_u64.c | 211 ++++++ .../gcc.target/aarch64/sve-acle/asm/expa_f16.c | 22 + .../gcc.target/aarch64/sve-acle/asm/expa_f32.c | 22 + .../gcc.target/aarch64/sve-acle/asm/expa_f64.c | 22 + .../aarch64/sve-acle/asm/reinterpret_f16.c | 191 ++++++ .../aarch64/sve-acle/asm/reinterpret_f32.c | 191 ++++++ .../aarch64/sve-acle/asm/reinterpret_f64.c | 191 ++++++ .../aarch64/sve-acle/asm/reinterpret_s16.c | 191 ++++++ .../aarch64/sve-acle/asm/reinterpret_s32.c | 191 ++++++ .../aarch64/sve-acle/asm/reinterpret_s64.c | 191 ++++++ .../aarch64/sve-acle/asm/reinterpret_s8.c | 191 ++++++ .../aarch64/sve-acle/asm/reinterpret_u16.c | 191 ++++++ .../aarch64/sve-acle/asm/reinterpret_u32.c | 191 ++++++ .../aarch64/sve-acle/asm/reinterpret_u64.c | 191 ++++++ .../aarch64/sve-acle/asm/reinterpret_u8.c | 191 ++++++ .../gcc.target/aarch64/sve-acle/asm/rsqrte_f16.c | 22 + .../gcc.target/aarch64/sve-acle/asm/rsqrte_f32.c | 22 + .../gcc.target/aarch64/sve-acle/asm/rsqrte_f64.c | 22 + .../gcc.target/aarch64/sve-acle/asm/rsqrts_f16.c | 31 + .../gcc.target/aarch64/sve-acle/asm/rsqrts_f32.c | 31 + .../gcc.target/aarch64/sve-acle/asm/rsqrts_f64.c | 31 + .../gcc.target/aarch64/sve-acle/asm/scale_f16.c | 431 +++++++++++++ .../gcc.target/aarch64/sve-acle/asm/scale_f32.c | 431 +++++++++++++ .../gcc.target/aarch64/sve-acle/asm/scale_f64.c | 431 +++++++++++++ .../gcc.target/aarch64/sve-acle/asm/tmad_f16.c | 97 +++ .../gcc.target/aarch64/sve-acle/asm/tmad_f32.c | 97 +++ .../gcc.target/aarch64/sve-acle/asm/tmad_f64.c | 97 +++ .../gcc.target/aarch64/sve-acle/asm/tsmul_f16.c | 31 + .../gcc.target/aarch64/sve-acle/asm/tsmul_f32.c | 31 + .../gcc.target/aarch64/sve-acle/asm/tsmul_f64.c | 31 + .../gcc.target/aarch64/sve-acle/asm/tssel_f16.c | 31 + .../gcc.target/aarch64/sve-acle/asm/tssel_f32.c | 31 + .../gcc.target/aarch64/sve-acle/asm/tssel_f64.c | 31 + .../gcc.target/aarch64/sve-acle/general-c/cvt_1.c | 73 +++ .../gcc.target/aarch64/sve-acle/general-c/cvt_2.c | 75 +++ .../gcc.target/aarch64/sve-acle/general-c/tmad_1.c | 22 + .../gcc.target/aarch64/sve-acle/general/inline_1.c | 4 + gcc/tree-inline.c | 4 +- 51 files changed, 7836 insertions(+), 120 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/cvt_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/cvt_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/cvt_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/cvt_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/cvt_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/cvt_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/cvt_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/cvt_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/cvt_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/expa_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/expa_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/expa_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/reinterpret_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/reinterpret_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/reinterpret_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/reinterpret_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/reinterpret_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/reinterpret_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/reinterpret_s8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/reinterpret_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/reinterpret_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/reinterpret_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/reinterpret_u8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/rsqrte_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/rsqrte_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/rsqrte_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/rsqrts_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/rsqrts_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/rsqrts_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/scale_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/scale_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/scale_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/tmad_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/tmad_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/tmad_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/tsmul_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/tsmul_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/tsmul_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/tssel_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/tssel_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/tssel_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/cvt_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/cvt_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/tmad_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general/inline_1.c