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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig in repository toolchain/ci/llvm-project.
from e20b388e2f9 [analyzer] Push correct version of 'Track indices of arrays' adds 52500216727 [AMDGPU] gfx10 conditional registers handling adds 490e83cd438 AMDGPU/GFX10: Support DLC bit in llvm.amdgcn.s.buffer.load [...] adds 4d4ef2a1671 [analyzer] ReturnVisitor: more portable test case adds 6d71be4e67e AMDGPU: Be explicit about whether the high-word in SI_PC_AD [...] adds 41abf2766e2 AMDGPU: Prepare for explicit absolute relocations in code g [...] adds 3a92aa29992 [docs] Fix a few problems with clang-tool docs to get the b [...] adds 2da0b89d92f [AsmPrinter] Make EmitLinkage and EmitVisibility public adds 9d8c94dfd76 [docs] Fix another bot warning by adding a blank line to se [...] adds 9b2d96024ae [docs] Fix another bot error by setting highlight language [...] adds 5a663bd77ac [InstSimplify] Fix addo/subo undef folds (PR42209) adds 9f2f1270096 [X86] Add TB_NO_REVERSE to some folding table entries where [...] adds 13de174b4c4 [llvm-objcopy] Add elf32-sparc and elf32-sparcel target adds 4f157320676 [yaml2obj][MachO] Don't fill dummy data for virtual sections adds 1d1cf30b738 PowerPC: Optimize SPE double parameter calling setup adds ee62c40eae9 [SimplifyCFG] Fix prof branch_weights MD while removing unr [...] adds a71ce4f1e8e DWARF: Avoid storing DIERefs in long-lived containers adds a9e5d2f35dd Re-commit r357452 (take 3): "SimplifyCFG SinkCommonCodeFrom [...] adds 966f4e874e0 [ARM] Extract some code from ARMConstantIslandPass adds f7c0b3aeb22 [ARM] Add ARMBasicBlockInfo.cpp adds a059efa885f [ARM] Remove ARMComputeBlockSize adds 5d6ee76c163 Describe stack-id as an enum adds 89d6905c595 [ARM] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off [...] adds 4bde5d3c081 [ARM] Fix another -Wunused-variable in -DLLVM_ENABLE_ASSERT [...] adds 43cf5ae48a0 [lldb] [test] Skip watchpoint tests on NetBSD if userdbregs [...] adds 25a043e78a9 [NFC][Codegen] Standalone tests for icmp eq/ne (urem %x, C) [...] adds ac14f7b10cf [lit] Delete empty lines at the end of lit.local.cfg NFC adds 46f9cbe28d4 [llvm-objdump] Use %08 instead of %016 to print leading add [...] adds 60d6fb2a634 [SCEV] Use NoWrapFlags when expanding a simple mul adds 9d81915fcaa Recommit [OpenCL] Move OpenCLBuiltins.td and remove unused include adds ef78e55205e [SelectionDAG] Fold insert_subvector(undef, extract_subvect [...] adds 5401c2db6ee Fix clang -Wcovered-switch-default after stack-id change by D60137 adds 2e46312ffd1 [DAGCombiner] [CodeGenPrepare] More comprehensive GEP splitting adds d5323f6a707 [libunwind][AArch64] Fix libunwind::Registers_arm64::jumpto adds 74ac20158a0 Test forward references in IntrinsicEmitter on Neon LD(2|3|4) adds 83773b77a5a [LV] Deny irregular types in interleavedAccessCanBeWidened adds 37b75336823 Promote -fdebug-compilation-dir from a cc1 flag to clang an [...] adds d2aab283e25 gn build: Merge r363530 adds 582f2692945 AsmPrinter: add doc-string for EmitLinkage adds d3d2edf901d [lldb] [test] Watchpoint tests can be always run as root on NetBSD adds f1e2827170b [X86][SSE] Avoid unnecessary stack codegen in NT store code [...] adds e40f879eb2c [HIP] Add the interface deriving the stub name of device kernels. adds d53027697ca [clangd] Detect C++ for extension-less source files in vsco [...] adds 7dc917603be [clangd] Bump vscode-clangd v0.0.15. adds 1bd3d00e7e5 [CodeGen] Check for HardwareLoop Latch ExitBlock adds 2dda1ff0380 Fix a '>= 0' test on unsigned that I inadvertantly introduc [...] adds e683eba0ed3 AMDGPU: Cleanup custom PseudoSourceValue definitions adds 29e792659b6 AMDGPU/GlobalISel: Fix default mapping for non-register operands adds f3b64d80bcc AMDGPU: Mark exp/exp.compr as inaccessiblememonly adds b10f0978334 AMDGPU: Ignore subtarget for InferAddressSpaces adds 1df203d78e4 InferAddressSpaces: Fix cloning original addrspacecast new 3c9391aad9e [clang][CodeGen] Remove std::move on temporary new 454e6b9010f [X86][SSE] Prevent misaligned non-temporal vector load/stor [...] new 1c91e63897d [X86][SSE] Add tests for underaligned nt loads new 15b7f5b72d2 PHINode: introduce setIncomingValueForBlock() function, and [...] new 8c82c41262f [lldb] [test] Extend D55859 symbols.enable-external-lookup= [...] new b5ce4e5ea3e [clangd] Perform merge for main file symbols. new e4eadf174cb [scudo][standalone] Introduce the combined allocator new 12cb792d7f4 [X86] combineLoad - begun making the load split code more g [...] new 77bc3b65424 [ScopInliner] Register FunctionAnalysisManagerModuleProxy. new 34667519dc1 [Remarks] Extend -fsave-optimization-record to specify the format new 1f50697abc7 Various improvements to Clang MSVC Visualizer new a8dcd476887 Update the meeting page with papers/issues that are ready f [...]
The 12 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: .../clangd/clients/clangd-vscode/package.json | 6 +- clang-tools-extra/clangd/index/FileIndex.cpp | 2 +- .../clangd/unittests/FileIndexTests.cpp | 22 + clang-tools-extra/docs/ReleaseNotes.rst | 5 +- .../clang-tidy/checks/android-cloexec-pipe.rst | 1 + .../cppcoreguidelines-pro-type-member-init.rst | 1 + clang/docs/ReleaseNotes.rst | 2 +- clang/docs/UsersManual.rst | 18 +- clang/include/clang/Basic/CMakeLists.txt | 6 - clang/include/clang/Basic/CodeGenOptions.h | 3 + clang/include/clang/Basic/DiagnosticDriverKinds.td | 2 + clang/include/clang/Driver/CC1Options.td | 4 +- clang/include/clang/Driver/Options.td | 13 +- clang/lib/CodeGen/BackendUtil.cpp | 1 + clang/lib/CodeGen/CGCUDANV.cpp | 26 +- clang/lib/CodeGen/CGCUDARuntime.h | 5 + clang/lib/CodeGen/CodeGenAction.cpp | 5 + clang/lib/CodeGen/CodeGenModule.cpp | 10 +- clang/lib/Driver/ToolChains/Clang.cpp | 17 +- clang/lib/Driver/ToolChains/Darwin.cpp | 9 + clang/lib/Frontend/CompilerInvocation.cpp | 5 + clang/lib/Sema/CMakeLists.txt | 8 + .../clang/Basic => lib/Sema}/OpenCLBuiltins.td | 0 clang/lib/Sema/SemaLookup.cpp | 2 +- .../inlining/placement-new-fp-suppression.cpp | 3 +- clang/test/CodeGen/opt-record-MIR.c | 2 + clang/test/CodeGen/opt-record.c | 5 + clang/test/CodeGenCXX/nrvo.cpp | 1 - clang/test/CodeGenCXX/stack-reuse-exceptions.cpp | 2 +- clang/test/CodeGenObjC/exceptions.m | 2 +- clang/test/Driver/cl-options.c | 1 + clang/test/Driver/clang_f_opts.c | 6 +- clang/test/Driver/darwin-ld.c | 4 + clang/test/Driver/opt-record.c | 8 + clang/utils/ClangVisualizers/clang.natvis | 181 ++- compiler-rt/lib/scudo/standalone/CMakeLists.txt | 2 + .../lib/scudo/standalone/allocator_config.h | 80 ++ compiler-rt/lib/scudo/standalone/combined.h | 550 ++++++++ .../lib/scudo/standalone/tests/CMakeLists.txt | 1 + .../lib/scudo/standalone/tests/combined_test.cc | 237 ++++ libcxx/src/locale.cpp | 2 +- libcxx/www/upcoming_meeting.html | 84 +- libunwind/src/UnwindRegistersRestore.S | 11 +- lld/ELF/Config.h | 1 + lld/ELF/Driver.cpp | 1 + lld/ELF/LTO.cpp | 1 + lld/ELF/Options.td | 2 + lld/test/ELF/arm-thunk-multipass-plt.s | 14 +- lld/test/ELF/arm-tls-gd32.s | 2 +- lld/test/ELF/gnu-ifunc-noplt-i386.s | 12 +- lld/test/ELF/lto/opt-remarks.ll | 3 + lld/test/ELF/ppc32-call-stub-nopic.s | 2 +- lld/test/ELF/ppc32-call-stub-pic.s | 2 +- lldb/include/lldb/Core/ModuleList.h | 1 + .../breakpoint/break-insert-enable-pending.test | 3 + .../lit/tools/lldb-mi/breakpoint/break-insert.test | 3 + lldb/lit/tools/lldb-mi/data/data-info-line.test | 3 + lldb/lit/tools/lldb-mi/exec/exec-continue.test | 3 + lldb/lit/tools/lldb-mi/exec/exec-finish.test | 3 + lldb/lit/tools/lldb-mi/exec/exec-interrupt.test | 3 + .../tools/lldb-mi/exec/exec-next-instruction.test | 3 + lldb/lit/tools/lldb-mi/exec/exec-next.test | 3 + .../tools/lldb-mi/exec/exec-step-instruction.test | 3 + lldb/lit/tools/lldb-mi/exec/exec-step.test | 3 + .../test/api/multithreaded/driver.cpp.template | 1 + lldb/packages/Python/lldbsuite/test/dotest.py | 27 + lldb/packages/Python/lldbsuite/test/lldbtest.py | 8 +- .../lldbsuite/test/tools/lldb-vscode/vscode.py | 8 +- lldb/source/Core/ModuleList.cpp | 5 + lldb/source/Plugins/SymbolFile/DWARF/DIERef.h | 4 - .../SymbolFile/DWARF/DWARFASTParserClang.cpp | 2 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 70 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 7 +- lldb/tools/lldb-test/lldb-test.cpp | 1 + llvm/include/llvm/Analysis/TargetTransformInfo.h | 10 +- llvm/include/llvm/CodeGen/AsmPrinter.h | 16 +- llvm/include/llvm/CodeGen/MIRYamlMapping.h | 18 +- llvm/include/llvm/CodeGen/TargetFrameLowering.h | 19 + llvm/include/llvm/IR/Instructions.h | 14 +- llvm/include/llvm/IR/IntrinsicsAArch64.td | 20 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 6 +- llvm/include/llvm/IR/RemarkStreamer.h | 12 +- llvm/include/llvm/LTO/Config.h | 3 + llvm/include/llvm/LTO/LTO.h | 5 +- llvm/include/llvm/MC/MCExpr.h | 2 + llvm/lib/Analysis/InstructionSimplify.cpp | 19 +- llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 4 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 13 +- llvm/lib/CodeGen/HardwareLoops.cpp | 16 +- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 9 + llvm/lib/CodeGen/MIRPrinter.cpp | 5 +- llvm/lib/CodeGen/MachineFrameInfo.cpp | 4 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 22 +- llvm/lib/CodeGen/SafeStack.cpp | 10 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 66 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 6 + llvm/lib/IR/RemarkStreamer.cpp | 37 +- llvm/lib/LTO/LTO.cpp | 6 +- llvm/lib/LTO/LTOBackend.cpp | 8 +- llvm/lib/LTO/LTOCodeGenerator.cpp | 10 +- llvm/lib/LTO/ThinLTOCodeGenerator.cpp | 3 +- llvm/lib/MC/MCExpr.cpp | 4 + llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 13 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 6 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 4 + llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 3 +- .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 8 +- llvm/lib/Target/AMDGPU/SIDefines.h | 7 - llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 34 +- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 2 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 135 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 2 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 20 +- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 6 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 229 +++- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 9 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 3 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 7 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 7 +- llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 81 +- llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 68 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 39 +- llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 87 +- .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 51 +- llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 5 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 29 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 15 + llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 25 +- llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 50 +- llvm/lib/Target/AMDGPU/SMInstructions.td | 14 +- llvm/lib/Target/ARM/ARM.h | 5 - llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp | 146 ++ llvm/lib/Target/ARM/ARMBasicBlockInfo.h | 48 + llvm/lib/Target/ARM/ARMComputeBlockSize.cpp | 80 -- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 158 +-- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 4 - llvm/lib/Target/ARM/CMakeLists.txt | 2 +- llvm/lib/Target/PowerPC/PPCCallingConv.cpp | 54 + llvm/lib/Target/PowerPC/PPCCallingConv.td | 7 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 119 +- llvm/lib/Target/PowerPC/PPCISelLowering.h | 17 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 12 + llvm/lib/Target/PowerPC/PPCInstrSPE.td | 12 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 1 + llvm/lib/Target/X86/X86ISelLowering.cpp | 42 +- llvm/lib/Target/X86/X86InstrFoldTables.cpp | 18 +- llvm/lib/Transforms/Scalar/GVN.cpp | 3 +- .../Scalar/InductiveRangeCheckElimination.cpp | 5 +- llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp | 8 +- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp | 3 +- llvm/lib/Transforms/Scalar/StructurizeCFG.cpp | 7 +- llvm/lib/Transforms/Utils/LoopUnrollPeel.cpp | 2 +- llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp | 9 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 41 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 13 +- llvm/test/Analysis/CostModel/ARM/lit.local.cfg | 1 - llvm/test/Analysis/CostModel/PowerPC/lit.local.cfg | 1 - llvm/test/Analysis/CostModel/RISCV/lit.local.cfg | 1 - llvm/test/Analysis/CostModel/X86/lit.local.cfg | 1 - .../AArch64/GlobalISel/arm64-irtranslator.ll | 6 +- .../AArch64/GlobalISel/arm64-regbankselect.mir | 2 +- .../CodeGen/AArch64/GlobalISel/call-translator.ll | 2 +- .../GlobalISel/fp128-legalize-crash-pr35690.mir | 2 +- .../AArch64/GlobalISel/select-gv-cmodel-large.mir | 2 +- .../AArch64/GlobalISel/select-gv-cmodel-tiny.mir | 2 +- .../CodeGen/AArch64/aarch64-mov-debug-locs.mir | 12 +- .../CodeGen/AArch64/branch-target-enforcment.mir | 4 +- llvm/test/CodeGen/AArch64/cfi_restore.mir | 4 +- .../dont-shrink-wrap-stack-mayloadorstore.mir | 4 +- llvm/test/CodeGen/AArch64/max-jump-table.ll | 48 +- llvm/test/CodeGen/AArch64/min-jump-table.ll | 30 +- .../CodeGen/AArch64/reverse-csr-restore-seq.mir | 2 +- .../CodeGen/AArch64/spill-stack-realignment.mir | 4 +- llvm/test/CodeGen/AArch64/stack-id-pei-alloc.mir | 20 +- .../AArch64/stack-id-stackslot-scavenging.mir | 2 +- llvm/test/CodeGen/AArch64/win64-jumptable.ll | 52 +- llvm/test/CodeGen/AArch64/wineh-frame5.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame6.mir | 14 +- llvm/test/CodeGen/AArch64/wineh-frame7.mir | 14 +- llvm/test/CodeGen/AArch64/wineh-frame8.mir | 4 +- llvm/test/CodeGen/AArch64/wineh1.mir | 20 +- llvm/test/CodeGen/AArch64/wineh2.mir | 30 +- llvm/test/CodeGen/AArch64/wineh3.mir | 28 +- llvm/test/CodeGen/AArch64/wineh4.mir | 28 +- llvm/test/CodeGen/AArch64/wineh5.mir | 20 +- llvm/test/CodeGen/AArch64/wineh6.mir | 18 +- llvm/test/CodeGen/AArch64/wineh7.mir | 14 +- llvm/test/CodeGen/AArch64/wineh8.mir | 28 +- llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir | 2 +- llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll | 2 +- ...galizer-multiple-mem-operands-nontemporal-1.mir | 6 +- ...galizer-multiple-mem-operands-nontemporal-2.mir | 6 +- .../CodeGen/AMDGPU/mubuf-legalize-operands.mir | 285 ++-- .../AMDGPU/no-initializer-constant-addrspace.ll | 2 +- llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | 30 +- llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir | 2 +- .../CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir | 14 +- llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll | 37 + llvm/test/CodeGen/AMDGPU/smrd.ll | 85 +- .../AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir | 4 +- .../AMDGPU/undefined-physreg-sgpr-spill.mir | 4 +- llvm/test/CodeGen/ARC/lit.local.cfg | 1 - llvm/test/CodeGen/ARM/cmpxchg-idioms.ll | 4 +- llvm/test/CodeGen/ARM/constant-island-movwt.mir | 20 +- llvm/test/CodeGen/ARM/fp16-litpool-arm.mir | 2 +- llvm/test/CodeGen/ARM/fp16-litpool-thumb.mir | 4 +- llvm/test/CodeGen/ARM/fp16-litpool2-arm.mir | 2 +- llvm/test/CodeGen/ARM/fp16-litpool3-arm.mir | 2 +- llvm/test/CodeGen/ARM/lit.local.cfg | 1 - llvm/test/CodeGen/ARM/misched-fusion-aes.ll | 17 +- .../CodeGen/ARM/register-scavenger-exceptions.mir | 6 +- llvm/test/CodeGen/ARM/vector-spilling.ll | 4 +- llvm/test/CodeGen/AVR/lit.local.cfg | 1 - llvm/test/CodeGen/Generic/lit.local.cfg | 1 - llvm/test/CodeGen/Hexagon/lit.local.cfg | 1 - .../CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll | 2 +- llvm/test/CodeGen/Lanai/lit.local.cfg | 1 - .../CodeGen/MIR/AArch64/mirCanonCopyCopyProp.mir | 14 +- .../CodeGen/MIR/AArch64/mirCanonIdempotent.mir | 14 +- .../MIR/AArch64/stack-object-local-offset.mir | 2 +- llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir | 20 +- llvm/test/CodeGen/MIR/AMDGPU/target-flags.mir | 4 +- llvm/test/CodeGen/MIR/Generic/lit.local.cfg | 1 - .../CodeGen/MIR/X86/branch-folder-with-label.mir | 8 +- llvm/test/CodeGen/MIR/X86/diexpr-win32.mir | 10 +- llvm/test/CodeGen/MIR/X86/fixed-stack-di.mir | 2 +- llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir | 2 +- .../MIR/X86/spill-slot-fixed-stack-objects.mir | 2 +- llvm/test/CodeGen/MIR/X86/stack-objects.mir | 6 +- .../MIR/X86/variable-sized-stack-objects.mir | 4 +- llvm/test/CodeGen/MSP430/lit.local.cfg | 1 - .../GlobalISel/instruction-select/pointers.mir | 2 +- .../GlobalISel/instruction-select/stack_args.mir | 2 +- .../test/CodeGen/Mips/GlobalISel/legalizer/add.mir | 8 +- .../test/CodeGen/Mips/GlobalISel/legalizer/mul.mir | 8 +- .../CodeGen/Mips/GlobalISel/legalizer/pointers.mir | 2 +- .../Mips/GlobalISel/legalizer/stack_args.mir | 2 +- .../test/CodeGen/Mips/GlobalISel/legalizer/sub.mir | 8 +- .../Mips/GlobalISel/regbankselect/pointers.mir | 2 +- .../Mips/GlobalISel/regbankselect/stack_args.mir | 2 +- llvm/test/CodeGen/Mips/lit.local.cfg | 1 - llvm/test/CodeGen/Mips/micromips-eva.mir | 2 +- .../CodeGen/Mips/micromips-short-delay-slot.mir | 2 +- .../micromips-sizereduction/micromips-lwp-swp.mir | 24 +- .../micromips-sizereduction/micromips-movep.mir | 4 +- .../micromips-no-lwp-swp.mir | 16 +- .../PowerPC/NoCRFieldRedefWhenSpillingCRBIT.mir | 6 +- .../CodeGen/PowerPC/convert-rr-to-ri-instrs.mir | 10 +- llvm/test/CodeGen/PowerPC/lit.local.cfg | 1 - llvm/test/CodeGen/PowerPC/setcr_bc.mir | 2 +- llvm/test/CodeGen/PowerPC/setcr_bc2.mir | 2 +- llvm/test/CodeGen/PowerPC/setcr_bc3.mir | 2 +- llvm/test/CodeGen/PowerPC/spe.ll | 8 +- llvm/test/CodeGen/RISCV/split-offsets.ll | 126 ++ llvm/test/CodeGen/SPARC/lit.local.cfg | 1 - llvm/test/CodeGen/SystemZ/debuginstr-02.mir | 2 +- llvm/test/CodeGen/SystemZ/int-add-08.ll | 10 +- llvm/test/CodeGen/SystemZ/int-sub-05.ll | 10 +- llvm/test/CodeGen/SystemZ/lit.local.cfg | 1 - llvm/test/CodeGen/SystemZ/subregliveness-06.mir | 4 +- llvm/test/CodeGen/Thumb/PR36658.mir | 4 +- llvm/test/CodeGen/Thumb/lit.local.cfg | 1 - llvm/test/CodeGen/Thumb2/high-reg-spill.mir | 2 +- llvm/test/CodeGen/Thumb2/ifcvt-cbz.mir | 12 +- llvm/test/CodeGen/Thumb2/lit.local.cfg | 1 - llvm/test/CodeGen/Thumb2/peephole-cmp.mir | 2 +- llvm/test/CodeGen/WinEH/lit.local.cfg | 1 - llvm/test/CodeGen/X86/GC/lit.local.cfg | 1 - .../X86/GlobalISel/x32-select-frameIndex.mir | 2 +- .../X86/GlobalISel/x86-legalize-inttoptr.mir | 2 +- .../X86/GlobalISel/x86-legalize-ptrtoint.mir | 8 +- .../CodeGen/X86/GlobalISel/x86-legalize-srem.mir | 12 +- .../CodeGen/X86/GlobalISel/x86-legalize-urem.mir | 12 +- .../X86/GlobalISel/x86-select-frameIndex.mir | 2 +- .../CodeGen/X86/GlobalISel/x86-select-inttoptr.mir | 2 +- .../CodeGen/X86/GlobalISel/x86-select-ptrtoint.mir | 8 +- .../CodeGen/X86/GlobalISel/x86-select-srem.mir | 12 +- .../CodeGen/X86/GlobalISel/x86-select-udiv.mir | 12 +- .../CodeGen/X86/GlobalISel/x86-select-urem.mir | 12 +- .../X86/GlobalISel/x86_64-select-frameIndex.mir | 2 +- llvm/test/CodeGen/X86/PR37310.mir | 4 +- llvm/test/CodeGen/X86/avoid-sfb-offset.mir | 4 +- .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 48 +- llvm/test/CodeGen/X86/lit.local.cfg | 1 - .../CodeGen/X86/merge-consecutive-stores-nt.ll | 152 ++- llvm/test/CodeGen/X86/movtopush.mir | 6 +- llvm/test/CodeGen/X86/nontemporal-3.ll | 708 ++++++++-- llvm/test/CodeGen/X86/nontemporal-loads-2.ll | 1395 ++++++++++++++++++++ ...ower-of-two-or-zero-when-comparing-with-zero.ll | 256 ++++ llvm/test/CodeGen/X86/pr30821.mir | 6 +- llvm/test/CodeGen/X86/prologepilog_deref_size.mir | 2 +- llvm/test/CodeGen/X86/regalloc-copy-hints.mir | 2 +- llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir | 4 +- .../CodeGen/X86/win_coreclr_chkstk_liveins.mir | 2 +- llvm/test/CodeGen/XCore/lit.local.cfg | 1 - llvm/test/DebugInfo/AArch64/asan-stack-vars.mir | 60 +- .../AArch64/compiler-gen-bbs-livedebugvalues.mir | 6 +- llvm/test/DebugInfo/AArch64/lit.local.cfg | 1 - llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir | 8 +- llvm/test/DebugInfo/ARM/lit.local.cfg | 1 - llvm/test/DebugInfo/Generic/lit.local.cfg | 1 - llvm/test/DebugInfo/MIR/AArch64/lit.local.cfg | 1 - llvm/test/DebugInfo/MIR/ARM/lit.local.cfg | 1 - .../MIR/ARM/live-debug-values-reg-copy.mir | 8 +- llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir | 6 +- llvm/test/DebugInfo/MIR/Mips/lit.local.cfg | 1 - .../MIR/Mips/live-debug-values-reg-copy.mir | 8 +- .../DebugInfo/MIR/X86/dbg-stack-value-range.mir | 4 +- llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir | 2 +- llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir | 16 +- .../MIR/X86/live-debug-values-reg-copy.mir | 6 +- .../MIR/X86/live-debug-values-restore.mir | 14 +- llvm/test/DebugInfo/MIR/lit.local.cfg | 1 - llvm/test/DebugInfo/SystemZ/lit.local.cfg | 1 - llvm/test/DebugInfo/X86/debug-loc-asan.mir | 22 +- llvm/test/DebugInfo/X86/debug-loc-offset.mir | 14 +- llvm/test/DebugInfo/X86/dw_op_minus.mir | 4 +- llvm/test/DebugInfo/X86/live-debug-vars-dse.mir | 2 +- llvm/test/DebugInfo/X86/pr19307.mir | 10 +- llvm/test/DebugInfo/X86/prolog-params.mir | 8 +- .../test/ExecutionEngine/JITLink/X86/lit.local.cfg | 1 - .../RuntimeDyld/AArch64/lit.local.cfg | 1 - .../ExecutionEngine/RuntimeDyld/ARM/lit.local.cfg | 1 - .../ExecutionEngine/RuntimeDyld/Mips/lit.local.cfg | 1 - .../RuntimeDyld/PowerPC/lit.local.cfg | 1 - .../RuntimeDyld/SystemZ/lit.local.cfg | 1 - .../ExecutionEngine/RuntimeDyld/X86/lit.local.cfg | 1 - .../AddressSanitizer/X86/lit.local.cfg | 1 - .../InstrProfiling/X86/lit.local.cfg | 1 - llvm/test/JitListener/lit.local.cfg | 1 - llvm/test/MC/ARM/AlignedBundling/lit.local.cfg | 1 - llvm/test/MC/ARM/lit.local.cfg | 1 - llvm/test/MC/AVR/lit.local.cfg | 1 - llvm/test/MC/AsmParser/lit.local.cfg | 1 - llvm/test/MC/BPF/lit.local.cfg | 1 - llvm/test/MC/COFF/ARM/lit.local.cfg | 1 - llvm/test/MC/COFF/cv-loc-unreachable-2.s | 2 +- llvm/test/MC/COFF/cv-loc-unreachable.s | 2 +- llvm/test/MC/COFF/lit.local.cfg | 1 - llvm/test/MC/Disassembler/AArch64/lit.local.cfg | 1 - llvm/test/MC/Disassembler/ARC/lit.local.cfg | 1 - llvm/test/MC/Disassembler/ARM/lit.local.cfg | 1 - llvm/test/MC/Disassembler/Hexagon/lit.local.cfg | 1 - llvm/test/MC/Disassembler/Lanai/lit.local.cfg | 1 - llvm/test/MC/Disassembler/MSP430/lit.local.cfg | 1 - llvm/test/MC/Disassembler/Mips/lit.local.cfg | 1 - llvm/test/MC/Disassembler/PowerPC/lit.local.cfg | 1 - llvm/test/MC/Disassembler/RISCV/lit.local.cfg | 1 - llvm/test/MC/Disassembler/Sparc/lit.local.cfg | 1 - llvm/test/MC/Disassembler/SystemZ/lit.local.cfg | 1 - .../test/MC/Disassembler/WebAssembly/lit.local.cfg | 1 - llvm/test/MC/Disassembler/X86/lit.local.cfg | 1 - llvm/test/MC/ELF/lit.local.cfg | 1 - llvm/test/MC/Hexagon/lit.local.cfg | 1 - llvm/test/MC/Lanai/lit.local.cfg | 1 - llvm/test/MC/MSP430/lit.local.cfg | 1 - llvm/test/MC/MachO/AArch64/lit.local.cfg | 1 - llvm/test/MC/MachO/ARM/lit.local.cfg | 1 - llvm/test/MC/MachO/lit.local.cfg | 1 - llvm/test/MC/Mips/lit.local.cfg | 1 - llvm/test/MC/RISCV/lit.local.cfg | 1 - llvm/test/MC/Sparc/lit.local.cfg | 1 - llvm/test/MC/X86/AlignedBundling/lit.local.cfg | 1 - llvm/test/Object/X86/lit.local.cfg | 1 - llvm/test/ObjectYAML/MachO/virtual_section.yaml | 226 ++++ llvm/test/Other/X86/lit.local.cfg | 1 - .../test/ThinLTO/X86/diagnostic-handler-remarks.ll | 1 + llvm/test/ThinLTO/X86/lit.local.cfg | 1 - .../Transforms/ArgumentPromotion/X86/lit.local.cfg | 1 - .../Transforms/AtomicExpand/AArch64/lit.local.cfg | 1 - .../test/Transforms/AtomicExpand/ARM/lit.local.cfg | 1 - .../Transforms/CodeExtractor/X86/lit.local.cfg | 1 - .../CodeGenPrepare/AArch64/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/AMDGPU/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/ARM/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/X86/lit.local.cfg | 1 - .../ConstantHoisting/PowerPC/lit.local.cfg | 1 - .../Transforms/ConstantHoisting/X86/lit.local.cfg | 1 - .../Transforms/DivRemPairs/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/DivRemPairs/X86/lit.local.cfg | 1 - .../test/Transforms/ExpandMemCmp/X86/lit.local.cfg | 1 - .../Transforms/GlobalOpt/PowerPC/lit.local.cfg | 1 - .../Transforms/HardwareLoops/ARM/lit.local.cfg | 1 - .../test/Transforms/HardwareLoops/ARM/structure.ll | 76 ++ .../HardwareLoops/unconditional-latch.ll | 46 + .../test/Transforms/HotColdSplit/X86/lit.local.cfg | 1 - .../Transforms/InferAddressSpaces/AMDGPU/icmp.ll | 26 +- .../AMDGPU/infer-addrspacecast.ll | 4 +- .../InferAddressSpaces/AMDGPU/intrinsics.ll | 20 +- .../InferAddressSpaces/AMDGPU/lit.local.cfg | 1 - .../InferAddressSpaces/AMDGPU/no-flat-addrspace.ll | 13 + .../AMDGPU/redundant-addrspacecast.ll | 27 + .../Transforms/InferAddressSpaces/AMDGPU/select.ll | 18 +- .../InferAddressSpaces/AMDGPU/volatile.ll | 9 +- llvm/test/Transforms/Inline/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/Inline/X86/lit.local.cfg | 1 - .../InstCombine/AMDGPU/amdgcn-intrinsics.ll | 38 +- .../Transforms/InstCombine/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/InstCombine/with_overflow.ll | 1 + llvm/test/Transforms/InstSimplify/call.ll | 16 +- .../LoadStoreVectorizer/AMDGPU/lit.local.cfg | 1 - .../LoadStoreVectorizer/NVPTX/lit.local.cfg | 1 - .../LoadStoreVectorizer/X86/lit.local.cfg | 1 - .../test/Transforms/LoopIdiom/AMDGPU/lit.local.cfg | 1 - llvm/test/Transforms/LoopIdiom/X86/lit.local.cfg | 1 - .../LoopIdiom/X86/unordered-atomic-memcpy.ll | 8 +- llvm/test/Transforms/LoopIdiom/basic.ll | 12 +- .../LoopIdiom/memcpy-debugify-remarks.ll | 2 +- llvm/test/Transforms/LoopReroll/basic.ll | 2 +- llvm/test/Transforms/LoopReroll/complex_reroll.ll | 2 +- llvm/test/Transforms/LoopReroll/nonconst_lb.ll | 4 +- llvm/test/Transforms/LoopReroll/ptrindvar.ll | 2 +- .../LoopStrengthReduce/2011-10-06-ReusePhi.ll | 4 +- .../LoopStrengthReduce/AMDGPU/lit.local.cfg | 1 - .../LoopStrengthReduce/ARM/lit.local.cfg | 1 - .../LoopStrengthReduce/X86/lit.local.cfg | 1 - .../LoopStrengthReduce/post-inc-icmpzero.ll | 2 +- .../Transforms/LoopUnroll/AArch64/lit.local.cfg | 1 - .../Transforms/LoopUnroll/AMDGPU/lit.local.cfg | 1 - llvm/test/Transforms/LoopUnroll/ARM/lit.local.cfg | 1 - .../Transforms/LoopUnroll/Hexagon/lit.local.cfg | 1 - .../Transforms/LoopUnroll/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/LoopUnroll/X86/lit.local.cfg | 1 - .../Transforms/LoopVectorize/AArch64/lit.local.cfg | 1 - .../Transforms/LoopVectorize/ARM/lit.local.cfg | 1 - .../Transforms/LoopVectorize/PowerPC/lit.local.cfg | 1 - .../Transforms/LoopVectorize/X86/lit.local.cfg | 1 - .../X86/x86_fp80-interleaved-access.ll | 29 + llvm/test/Transforms/PGOProfile/X86/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/AMDGPU/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/SystemZ/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/X86/lit.local.cfg | 1 - .../Transforms/SafeStack/AArch64/lit.local.cfg | 1 - llvm/test/Transforms/SafeStack/ARM/lit.local.cfg | 1 - llvm/test/Transforms/SafeStack/X86/lit.local.cfg | 1 - .../AMDGPU/lit.local.cfg | 1 - .../SeparateConstOffsetFromGEP/NVPTX/lit.local.cfg | 1 - .../Transforms/SimplifyCFG/SPARC/lit.local.cfg | 1 - llvm/test/Transforms/SimplifyCFG/X86/lit.local.cfg | 1 - .../Transforms/SimplifyCFG/sink-common-code.ll | 44 + llvm/test/Transforms/SimplifyCFG/switch-profmd.ll | 35 + .../Transforms/StackProtector/X86/lit.local.cfg | 1 - .../ThinLTOBitcodeWriter/x86/lit.local.cfg | 1 - .../intrinsic-arg-overloading-struct-ret.ll | 79 ++ llvm/test/tools/dsymutil/ARM/lit.local.cfg | 1 - llvm/test/tools/gold/X86/opt-remarks.ll | 2 + llvm/test/tools/llvm-lib/lit.local.cfg | 1 - llvm/test/tools/llvm-lto2/X86/lit.local.cfg | 1 - llvm/test/tools/llvm-mc/lit.local.cfg | 1 - llvm/test/tools/llvm-mca/SystemZ/lit.local.cfg | 1 - llvm/test/tools/llvm-mca/X86/lit.local.cfg | 1 - llvm/test/tools/llvm-mca/lit.local.cfg | 1 - .../tools/llvm-objcopy/ELF/cross-arch-headers.test | 12 + llvm/test/tools/llvm-objdump/Mips/lit.local.cfg | 1 - .../tools/llvm-objdump/PowerPC/branch-offset.s | 4 +- .../tools/llvm-objdump/X86/print-symbol-addr.s | 35 +- llvm/test/tools/llvm-readobj/AArch64/lit.local.cfg | 1 - llvm/test/tools/llvm-readobj/ARM/lit.local.cfg | 1 - llvm/tools/gold/gold-plugin.cpp | 4 + llvm/tools/llc/llc.cpp | 8 +- llvm/tools/llvm-lto2/llvm-lto2.cpp | 6 + llvm/tools/llvm-objcopy/CopyConfig.cpp | 3 + llvm/tools/llvm-objdump/llvm-objdump.cpp | 13 +- llvm/tools/opt/opt.cpp | 8 +- llvm/tools/yaml2obj/yaml2macho.cpp | 18 +- .../gn/secondary/llvm/lib/Target/ARM/BUILD.gn | 2 +- polly/lib/Transform/ScopInliner.cpp | 1 + 468 files changed, 6947 insertions(+), 1982 deletions(-) rename clang/{include/clang/Basic => lib/Sema}/OpenCLBuiltins.td (100%) create mode 100644 compiler-rt/lib/scudo/standalone/allocator_config.h create mode 100644 compiler-rt/lib/scudo/standalone/combined.h create mode 100644 compiler-rt/lib/scudo/standalone/tests/combined_test.cc create mode 100644 llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp delete mode 100644 llvm/lib/Target/ARM/ARMComputeBlockSize.cpp create mode 100644 llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll create mode 100644 llvm/test/CodeGen/RISCV/split-offsets.ll create mode 100644 llvm/test/CodeGen/X86/nontemporal-loads-2.ll create mode 100644 llvm/test/CodeGen/X86/omit-urem-of-power-of-two-or-zero-when-co [...] create mode 100644 llvm/test/ObjectYAML/MachO/virtual_section.yaml create mode 100644 llvm/test/Transforms/HardwareLoops/unconditional-latch.ll create mode 100644 llvm/test/Transforms/InferAddressSpaces/AMDGPU/no-flat-addrspace.ll create mode 100644 llvm/test/Transforms/InferAddressSpaces/AMDGPU/redundant-addrsp [...] create mode 100644 llvm/test/Transforms/LoopVectorize/X86/x86_fp80-interleaved-access.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/switch-profmd.ll create mode 100644 llvm/test/Verifier/intrinsic-arg-overloading-struct-ret.ll