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from 27612ce3529 RISC-V: Fix one warning of maybe-uninitialized in riscv-vsetvl.cc new ffb87344dd3 aarch64: Reimplement [US]Q(R)SHR(U)N patterns with RTL codes new d20b2ad8458 aarch64: [US]Q(R)SHR(U)N scalar forms refactoring new 207db5d92f9 aarch64: Add ASHIFTRT handling for shrn pattern new c8e9a5ced0d aarch64: [US]Q(R)SHR(U)N2 refactoring new b5ecca346f3 aarch64: Handle ASHIFTRT in patterns for shrn2
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Summary of changes: gcc/config/aarch64/aarch64-simd-builtins.def | 26 +- gcc/config/aarch64/aarch64-simd.md | 712 ++++++++++++++++++--------- gcc/config/aarch64/aarch64.h | 5 + gcc/config/aarch64/arm_neon.h | 60 +-- gcc/config/aarch64/iterators.md | 36 +- gcc/config/aarch64/predicates.md | 11 +- 6 files changed, 536 insertions(+), 314 deletions(-)