[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allnoconfig updated (6085593c128 -> f287bb8cf5e)

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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allnoconfig in repository toolchain/ci/llvm-project.

from 6085593c128 [AMDGPU] simplifyI24 - replace GetDemandedBits with Simplif [...] adds 0e417b034ad [AArch64][SVE] Re-arrange definitions in AArch64SVEInstrInf [...] adds 7b59ff2fa0a [lldb] Add boilerplate to recognize the .debug_tu_index section adds c7b7f76ae6a [lldb]: fix typo in lldb-gdb-remote.txt adds 9ea5d17cc95 [Sema] Demote call-site-based 'alignment is a power of two' [...] adds 2f215cf36ad Revert "Reland "[DebugInfo] Enable the debug entry values f [...] adds bb9e92bad55 [clang][Index] Fix the incomplete instantiations in libindex. adds fa221fc6b8a Regenerate rotate test. NFC. adds 977cd661cf0 [AMDGPU] Don’t marke the .note section as ALLOC adds 15e20dcb8f9 [Utils][x86] add an option to reduce scrubbing of shuffles [...] adds 083717cf499 AMDGPU: Fix v2i64<->v4f32 bitcast adds 659500c0c96 [NFC][RDA] Break-up initialization code adds 45f008704df [PowerPC][NFC] We do not save/restore vrsave for any remain [...] adds 216a6e05249 [x86] regenerate test checks with less shuffle scrubbing; NFC adds 1f984c83a41 Add #include <condition_variable> to fix build after 85fb997659b5 adds fc2b4a02b1a [DAGCombine] visitEXTRACT_VECTOR_ELT - add SimplifyDemanded [...] adds cb54c13c217 [clang][analyzer] Modify include AllocationState.h in Puten [...] adds 12cc105f806 [X86] Add DAG combines to form CVTPH2PS/CVTPS2PH from vXf16 [...] adds ce70e289987 [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations adds 914a97a4e61 [x86] add vector tests for splatted memory ops; NFC adds 9bbf271fc9d [AArch64] Move isOverflowIntrOpRes help function to the ISD [...] adds 3543ac9ab52 [X86] Rewrite LowerBRCOND to remove dead code and handle IS [...] adds e442f38395f [libc++] Fix unintended ADL inside ref(reference_wrapper<T> [...] adds 092a57f5082 [libc++] Fix unqualified call to 'ref' inside shared_ptr(un [...] adds db8911aad72 [clang-tidy] rename_check.py: maintain alphabetical order i [...] adds 0ed7a615438 [X86] Fix a -Wparentheses warning. NFC adds 6fa3894c4e7 [clang] Fix search path logic for C_INCLUDE_DIRS adds af64b31959f Add target.xml support for qXfer request. adds 0ffa6e1a7e1 [lldb] Fix version string when using LLDB_REVISION but not [...] adds f9c326364e7 [DAGCombiner] Use SDValue::getConstantOperandAPInt helper w [...] adds 726c342ce27 [macho][NFC] Extract all CPU_(SUB_)TYPE logic to libObject adds 70d8fec7c94 [mlir] Refactor the structure of the 'verifyConstructionInv [...] adds 3f785212e9c Revert "[macho][NFC] Extract all CPU_(SUB_)TYPE logic to li [...] adds da181d4ba0c [PowerPC][NFC] Cleanup some of the Darwin mentions in the R [...] adds 064cd2ecdb3 [x86] allow peeking through an extract_subvector to find a [...] adds 5d2baa956ac [libc] Add Initial Support for Signals adds 8928c6dbbf7 Fix some typos in the MLIR documentation. adds 6de21c556d1 [ORC][examples] Fix ThinLtoJIT example after changes in 85f [...] adds 813b1b9fd6c [ORC] Add a convenience method for setting the ExecutionSes [...] adds e2c2eb0a550 [X86] Fix NSW/NUW typo in avg test (PR44973) adds a11ff39ba2a [clang-format] Merge name and colon into a single token for [...] adds 7a7c753b0cc libclang: Make shared object symbol exporting by default adds 967eeb109be [AIX] Pack BasicBlockBits adds 2f56789c8fe [clang][doxygen] Fix false -Wdocumentation warning for tag [...] adds e4a9225f5d1 [GISel][KnownBits] Give up on PHI analysis as soon as we do [...] adds 6d34a87bae6 [cxx_status] Update -std= instructions for C++20. adds 0c8fa6db90a [llvm][build] Fix shared lib builds. [NFC] adds 3d0564c7e07 Revert "[NFCI][DebugInfo]: Corrected a Typo." adds 7ddbf802cf6 [ConstantFold] add/move tests for FP with undef operand; NFC adds 6f4d9d10293 Revert "[AArch64][SVE] Add intrinsics for SVE2 bitwise tern [...] adds e84444781aa Revert "libclang: Add static build support for Windows" and [...] adds 714265dabb6 [X86] Replace a bad use of MVT::getVectorVT with EVT::getVectorVT adds 1d8860f90bc Revert 714265dabb606bfef2f85694234f152edbfa91ac "[X86] Repl [...] adds c7b54a196e1 Recommit "[X86] Replace a bad use of MVT::getVectorVT with [...] adds 9e0c95572e5 [AIX] Improve 32/64-bit build configuration adds bf3f427ba23 [ASTImporter] Add linkage check to ASTNodeImporter::hasSame [...] adds 6123074d0c0 [Driver] Escape the program path for -frecord-command-line adds c767cf24e48 [SVE] Add support for lowering GEPs involving scalable vectors. adds 99809f98d7b [SCCP] Do not mark unknown loads as overdefined. adds ee260c1a0f1 [mlir] [VectorOps] Multi-dim reductions for lowering vector [...] adds 6d60d8695d2 [mlir] Use LLJIT::getMainJITDylib instead of hardcoding '<main>' adds 3ee28108273 [lldb/Plugin] Don't mark ProcessNetBSD as a plugin adds 577d9ce3553 Revert "[Driver] Escape the program path for -frecord-comma [...] adds 51bf5d3cc19 [mlir][Parser] Update DenseElementsAttr to print in hex whe [...] adds 0d19b016226 [lldb/Test] Remove stale README in test/API adds 07c559caef9 [libc++] Explain XFAILs with std::uncaught_exceptions test adds d95a10a7f97 [X86] Custom legalize v1i1 add/sub/mul to xor/xor/and with avx512. adds 5228a5544b2 [X86] Fix a couple copy mistakes in v4i1 or/and/xor isel patterns. adds b00ef8951b5 [X86] Custom legalize v1i1 UADDSAT/USUBSAT/SADDSAT/UADDSAT [...] adds 7e927698621 [X86] Expand vselect of v1i1 under avx512. adds e5782377f3f [X86] Add CMOV_VK1 pseudo so we don't crash on v1i1 ISD::SELECT adds 72ce0c8073b [libc++][regex] Validate backreferences in the constructor. adds d4ded05ba85 [libunwind][CMake] Treat S files as C to work around CMake bug. adds 2fe457690da Filter callbr insts from critical edge splitting adds 7593a480dbc [Dominators] Use Instruction::comesBefore for block-local q [...] adds e27b61c1ea3 [XCore] Add instruction pattern for bitrev adds 4b540fa8a1c [OpenMP][NFC] Remove leftover debug messages adds c32c8fd1437 [mlir] Use getOperation()->setAttr when generating attribut [...] adds d8969a1cb96 Split _LIBCPP_STRING_EXTERN_TEMPLATE_LIST up into a V1 and [...] adds 78be6187170 [X86] Add CMOV_VR64 pseudo instruction for MMX. Remove mmx [...] adds efeafa1bdaa libclc: Use acos implementation from amd_builtins adds 45766068315 [X86] Remove unnecessary isNullConstant in LowerSelect. NFC adds df74033ec9f [WebAssembly] Remove unneeded getWasmKindForNamedSection function adds 3bc525af235 [X86] Autogenerate complete checks. NFC adds 263bef2bbcb [X86] Make combineCMov not create unsupported FCMOVs when f [...] adds 97f11600e0b [X86] Don't bother avoiding illegal FCMOVs if we don't have [...] adds e326f524304 [clangd] Fix the incomplete template specialization in findTarget. adds 0e5ed1b2626 [lldb][NFC] Split up ClangASTSource::FindExternalVisibleDecls adds bc498198b55 [clangd] Allow renaming class templates in cross-file rename. adds e5eeb8465f2 Make unittests include path relative adds d0b09f89e0e [NFC][mlir] Adding more operators to EDSC TemplatedIndexedValue adds 32e4e719663 test/CodeGen/AMDGPU: Add a test case that shows a miscompilation adds a24d46318f6 [NFC] Corrected a minor typo in a comment adds 99b03c1c18d Detect and disable openmp tests that require multiple hardw [...] adds d799190851f [ConstantFold] fold fsub -0.0, undef to undef rather than NaN adds b0761bbc763 [DependenceAnalysis] Memory dependence analysis internal ca [...] adds c51b0bede82 [Hexagon] Introduce noop intrinsic to cast between vector p [...] adds 35b685270b4 [mlir] Add a signedness semantics bit to IntegerType adds 86c52af05a6 [TargetLowering] SimplifyDemandedBits - use getValidShiftAm [...] adds d33e96b68c6 [X86] Regenerate hi reg tests adds b55c58a2d56 [Error/unittests] Add a FailedWithMessage gtest matcher adds 4fdaac0e1eb [PowerPC][NFC] Remove Darwin specific logic in frame finalization. adds a49a41e7855 [AST][NFC] Update outdated comments in ASTStructuralEquival [...] adds 175f6e309ab [PowerPC][NFC] Add a test for vrsave usage iinline asm. adds de8793b9184 [lldb/DWARF] Add support for type units in dwp files adds f0c642e8227 Remove unused functions in llvm-ml adds 5125803d344 [mlir] Silence error: call to constructor of 'llvm::APInt' [...] adds b64aa8c7151 AMDGPU/GlobalISel: Fix constant bus violation with source m [...] adds fab4cdea391 AMDGPU/GlobalISel: Select llvm.amdgcn.fmul.legacy adds 79ff188adde AMDGPU/GlobalISel: Legalize G_FPOW adds ac7abe0ba9a AMDGPU/GlobalISel: Manually select G_BUILD_VECTOR_TRUNC adds 83012cb2171 [ARM] Correct Formatting. NFC adds 89dc8fe6222 AMDGPU/GlobalISel: Precommit xnor matching test adds 6ed8e201433 [ELF] Ignore the maximum of input section alignments for two cases adds de0dda54d38 [ELF] Warn changed output section address adds c47e0e2d37d [lldb-vscode] Use libOption with tablegen to parse command [...] adds dbd7281aa77 [ELF] Shuffle .init_array/.fini_array with --shuffle-sections= adds 42ec6fdce92 [TargetLowering] Apply basic shift combines before recursiv [...] adds 043ed2e22ac AMDGPU/GlobalISel: Fix xnor matching adds 6a479220b5e AMDGPU/GlobalISel: Commit test changes I forgot to squash adds cab39e4b8c8 GlobalISel: Fix narrowing of (G_ASHR i64:x, 32) adds 9fff6e823cf [AArch64][SVE] Add +fullfp16 to sve-vector-splat.ll adds 134bab7cd56 [DSE,MSSA] Add debug counter. adds 23444edf30b [AST matchers] Add basic matchers for googletest EXPECT/ASS [...] adds fc4455891c0 [VectorCombine] refactor matching code to reduce duplication; NFC adds db9c40f5624 [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations adds 60023e34711 AMDGPU: Use default operand for VOP3P clamp adds 41bd9ead35f [SystemZ] Return scalarized costs for vector instructions [...] adds 8c70a2597f5 [gn build] Port 23444edf30b adds a8db806d52c [SimplifyLibCalls][IRBuilder] Accept any IRBuilder in Simpl [...] adds c90ea87cfd7 [X86] Fix SDLoc initialization adds 98f5268a729 [VectorUtils] Move ToVectorTy to VectorUtils.h (NFC). adds deb0a8bfc49 [DSE,MSSA] Dbg counters required assertions. Mark test acco [...] adds 656dff9af48 [InstCombine] Use replaceOperand() in more places adds e4df934ca7b [Clang interpreter] Rename Block.{h,cpp} to InterpBlock.{h,cpp} adds 0e3e242209c [BFI] Fix missed BFI updates in MachineSink. adds b178555318c [InstCombine] Improve simplify demanded bits worklist management adds 31ec721516b [llvm][CodeGen] DAG Combiner folds for vscale. adds bc7b26c333f [MLIR] Allow Loop dialect IfOp and ForOp to define values adds 6b4a193defb [XCOFF][AIX] Put undefined symbol name into StringTable whe [...] adds 2769fb90f0a [LoopVectorize][X86] Regenerate tests. NFCI. adds 1723f219939 Fix MSVC "not all control paths return a value" warning. NFCI. adds 72eef820d52 AMDGPU/GlobalISel: Select G_SHUFFLE_VECTOR adds dfce5fd50a0 AMDGPU/GlobalISel: Select VOP3P instructions adds 4c1c9422a3a AMDGPU/GlobalISel: Select llvm.amdgcn.fdot2 adds db06870dbd5 AMDGPU: Move dot intrinsic patterns to instruction def adds 07d2cdae116 [lldb/cmake] Enable more verbose find_package output. adds 00955a62e43 AMDGPU/GlobalISel: Fix SALU mapping for v2s16 min/max adds 73d8d83a6d9 [ARM] Change ARMAttributeParser::Parse to use support::endi [...] adds 7dd6a862e5e [libc++] Do not set the `availability=XXX` feature when not [...] adds 266959c0f72 [AArch64][SVE] Add backend support for splats of immediates adds 0781e93a6ea [CodeGen][RISCV] Fix clang/test/CodeGen/atomic_ops.c for RISC-V adds 29ad9d6b26e [mlir][spirv] Add lowering for load/store zero-rank memref [...] adds 042d97eda9f [MLIR] Remove constexpr from LoopOps.td adds d2b7c09e79a [Hexagon] Simplify intrinsic (vandvrt (vandqrt q b) m) -> q [...] adds 69d757c0e8f Move StandardOps/Ops.h to StandardOps/IR/Ops.h adds e2ed1d14d6c [llvm][aarch64] SVE addressing modes. adds 34e3485560c [VectorCombine] refactor cost calcs to reduce duplication; NFC adds 33bf1196475 [llvm][CodeGen][aarch64] Add contiguous prefetch intrinsics [...] adds 446b150065c [IR] Update BasicBlock::validateInstrOrdering comments, NFC adds 8875ee18d72 [X86] Add a new format type for instructions that represent [...] adds 1874dee5662 [macho][NFC] Extract all CPU_(SUB_)TYPE logic to BinaryFormat adds 0bb90628b5f Allow customized relative PYTHONHOME adds 8fa776b8ed0 [gn build] Port 1874dee5662 adds e9c79a7aef1 [VectorCombine] refactor to reduce duplicated code; NFC adds b72f1448ce4 AMDGPU/GlobalISel: Better code for one case of G_SHUFFLE_VE [...] adds a5b22b768f5 [AArch64][SVE] Add support for DestructiveBinary and Destru [...] adds dc046c70de9 [llvm-objcopy][MachO] Change the storage of sections adds 1f04d1b7069 [lldb/test] Move `platform process list` tests to its own d [...] adds d7c403e6404 [lldb/Plugins] Add ability to fetch crash information on cr [...] adds 5c33a81b7a4 [AArch64][SVE] Fix -Wimplicit-fallthrough after D73711 adds a6c8698924d clang/Modules: Finish renaming CompilerInstance::ModuleMana [...] adds 0ad6fc9928d [SelectionDAG] remove unused isFast() helper function; NFC adds fad1c750f16 [AArch64][SVE] Fix -DBUILD_SHARED_LIBS=on builds after -D74 [...] adds fddbff14735 [AArch64] Delete an unneeded dependency on Object after 187 [...] adds d37cbda5f9a [Hexagon] Define __ELF__ by default. adds 0a70edd6962 [CloneFunction] Update loop headers after cloning all block [...] adds 9708279c725 [Attributor][FIX] Undo 16188f9 until SCC iterator bug is fixed adds 618dec2aeff [GISel][KnownBits] Add a cache mechanism to speed compile time adds 528a6a1d4cc [Attributor][FIX] Disable a test to unblock the builders adds a32d539798e [Target] Remove libObject dependency in lib/Target adds 215a31115f8 Revert "Allow customized relative PYTHONHOME" adds 393f4e8ac26 [Analysis][Docs] Parents of loops documentation. adds 26222db01b0 [mlir][DeclarativeParser] Add support for the TypesMatchWit [...] adds 2d0477a0036 [mlir][DeclarativeParser] Add basic support for optional gr [...] adds ca4ea51c0af [mlir][DeclarativeParser] Add an 'attr-dict-with-keyword' d [...] adds 93813e5feb1 [mlir] Add a utility iterator range that repeats a given va [...] adds b1de971ba8c [mlir][ODS] Add support for specifying the successors of an [...] adds 9eb436feaa7 [mlir][DeclarativeParser] Add support for formatting the su [...] adds 0050e8f0cf5 [mlir][Tutorial] Add a section to Toy Ch.2 detailing the cu [...] adds 266877a2a8b [llvm-objdump] Print method name from debug info in disasse [...] adds 75af9da7557 [MC][ELF] Error for sh_type, sh_flags or sh_entsize change adds 8a0f0e2656a [lldb/test] Tweak libcxx string test on Apple+ARM devices adds d3e170c4388 Revert "[AMDGPU] Don’t marke the .note section as ALLOC" adds 42060c0a987 [mlir][DeclarativeParser][NFC] Use explicit type names in T [...] adds 340feac6721 [Driver] Escape the program path for -frecord-command-line adds bf4933b4ea6 AMDGPU/GlobalISel: Remove dead code adds 3ec3f62f0a0 Allow customized relative PYTHONHOME (Attemp 1) adds d17123b2577 [llvm-objdump][test] Fix source-interleave-function-from-de [...] adds 3648370a792 [WebAssembly] Fix a non-determinism problem in FixIrreducib [...] adds e33c9bb245a Flags for displaying only hot nodes in CFGPrinter graph adds ebee1312597 [lldb][test] Fix sh_type of .debug_cu_index and .debug_tu_index adds 1b1a97e9b55 Remove unused variable adds 228a2bc9b70 [X86] Teach combineCVTPH2PS to shrink v8i16 loads when the [...] adds e29065a1053 [lldb][test] Fix sh_flags and sh_entsize of .debug_str.dwo adds a4f45ee73a9 [libc] Lay out framework for fuzzing libc functions. adds b6d63c92ec3 [GISel][KnownBits] Suppress unused warning on the dump method adds 59a572eb742 [Preprocessor][test] Move AArch64 tests from init.c to init [...] adds 0123744d46a [Preprocessor][test] Fix __VERSION__ in init-aarch64.c adds fc6057e34fb [Frontend] Replace CC1 option -mcode-model with -mcmodel= adds d2e949eed5b [AArch64] Predefine __AARCH64_CMODEL_*__ as GCC does adds 271f9647732 [Preprocessor][X86] Fix __code_model_*__ predefine macros adds d192a4ab2b8 Update Quantization.md adds 453cd2dbe57 Update ShapeInference.md adds 635034f1938 [VE][fix] missing include adds 31f2ad9c368 [yaml2obj] - Automatically assign sh_addr for allocatable s [...] adds a6370d57983 [lldb][test] - Update basic-elf.yaml to fix build bot. adds 837d8129e91 [NFC] Remove some GCC warning from c9e93c84f61400d1aac7d195 [...] adds e48849a2404 [libcxx] [test] Suppress MSVC++ warning 4640 under /Zc:thre [...] adds 7b44f0428af Add a llvm::shuffle and use it in lld adds 56eb15a1c71 [Sema] Fix pointer-to-int-cast diagnostic for _Bool adds 81726894d3c [ORC] Add errors for missing and extraneous symbol definitions. adds 1df947ab403 [ORC] Update LLJIT to automatically run specially named ini [...] adds e7a184fc7c0 [X86] Use movlps for i64 atomic stores on 32-targets with sse1. adds bdb1729c834 [X86] Teach EltsFromConsecutiveLoads that it's ok to form a [...] adds 84cd968f75b [X86] Add AddToWorklist(N) after calls to SimplifyDemandedB [...] adds 57923617181 [X86] Add sse2 command lines to sse-intrinsics-fast-isel.ll. adds 21316f6f928 [NFC] Test commit access. Drop trivial braces. adds 98ac6e76960 [NFC] fix test nan value adds 7d3f8b1e2dc [clangd] Debounce rebuilds responsively to rebuild times. adds a2ce807eb72 [clangd] Reapply b60896fad926 Fall back to selecting token- [...] adds b4b9706d5da Revert "[clangd] Reapply b60896fad926 Fall back to selectin [...] adds af69d5e10eb [DSE] Track overlapping stores. adds a253a2a793c [SDAG] fold fsub -0.0, undef to undef rather than NaN adds 31059ba5eb1 [X86] Regenerate some tests to show FMA4 comments. NFC adds 7769030b931 Recommit "[PatternMatch] Match XOR variant of unsigned-add [...] adds 335e21f9006 [AArch64] Update new test. adds be6d07c9208 [clangd] Reapply b60896fad926 Fall back to selecting token- [...] adds 86cda4c50da Updating a comment to clarify that SkipUntil handles balanc [...] adds e9997cfb4d4 [clangd] Try to fix buildbots - copy elision not happening here? adds 82879c2913d [SystemZ] Support the kernel back chain. adds 2a10f8019dd [X86] Use FIST for i64 atomic stores on 32-bit targets with [...] adds 15b6aa74488 [X86] Enable the use of movlps for i64 atomic load on 32-bi [...] adds 5a705186604 [X86] Remove most X86 specific subclasses of MemSDNode. Jus [...] adds 384d5e33fe2 [SelectionDAG] Remove SelectionDAG::getTargetMemSDNode now [...] adds bae33a7c5a1 IR printing for single function with the new pass manager. adds 8b3a62dc987 [NFC][PowerPC] Refactor the tryAndWithMask() adds 6a3506a208b [Driver][X86] Add helptext for malign-branch*, mbranches-wi [...] adds 4d812acba61 [libc] Add a README to the sub-directories under the utils [...] adds 3a6bb32bd24 [SelectionDAG] Remove ISD::LIFETIME_START/LIFETIME_END from [...] adds f1b8ec3398f [X86] Use custom isel for gather/scatter instructions. adds 7a7146cf72a [X86] When creating X86ISD::MGATHER nodes from AVX2 gather [...] adds 27a79b72162 [JITLink] Add a MachO x86-64 GOT and Stub bypass optimization. adds e657a1eb23f [lldb] Remove all the 'current_id' logging counters from t [...] adds 03756a41979 [ARM][MVE] Combine more extending masked loads adds 0f7cfb25432 [lldb/DWARF] Don't index dwp file multiple times adds be3b448c2e3 [lldb/test] simplify basic-elf.yaml adds c131dfefe2b [lldb] Disable auto fix-its when evaluating expressions in [...] adds c3f36acc924 [MC] Widen the functional unit type from 32 to 64 bits. adds 9b23024c8b5 Use new FailedWithMessage matcher in DWARFDebugLineTest.cpp adds 8f46269f0c1 [profile] Don't dump counters when forking and don't reset [...] adds 6e561d1c94e [Intrinsic] Add fixed point saturating division intrinsics. adds bc1947a6f51 Add a basic tiling pass for parallel loops adds 3ac37eb9a93 Silence compiler warnings new f2ff153401f [AArch64][SVE] Add intrinsics for SVE2 cryptographic instructions new 8c893cac3f6 [ORC] Remove spammy debug print new a4370b2ec46 Use temporary directory for tests in D74346 new eaa41e103c5 [CostModel][X86] Try to check against common prefixes befor [...] new f287bb8cf5e [ARM] FP16 bitcast test. NFC

The 5 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: clang-tools-extra/clang-tidy/add_new_check.py | 10 +- clang-tools-extra/clang-tidy/rename_check.py | 32 +- clang-tools-extra/clangd/ClangdServer.cpp | 73 +- clang-tools-extra/clangd/ClangdServer.h | 7 +- clang-tools-extra/clangd/FindTarget.cpp | 10 +- clang-tools-extra/clangd/Hover.cpp | 7 +- clang-tools-extra/clangd/Selection.cpp | 76 +- clang-tools-extra/clangd/Selection.h | 49 +- clang-tools-extra/clangd/SemanticSelection.cpp | 3 +- clang-tools-extra/clangd/XRefs.cpp | 86 +- clang-tools-extra/clangd/refactor/Rename.cpp | 10 +- clang-tools-extra/clangd/refactor/Tweak.cpp | 6 +- clang-tools-extra/clangd/refactor/Tweak.h | 2 +- .../clangd/unittests/FindTargetTests.cpp | 14 +- clang-tools-extra/clangd/unittests/HoverTests.cpp | 2 +- clang-tools-extra/clangd/unittests/RenameTests.cpp | 17 + .../clangd/unittests/SelectionTests.cpp | 71 +- .../clangd/unittests/TweakTesting.cpp | 57 +- clang-tools-extra/clangd/unittests/TweakTests.cpp | 2 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 12 + clang-tools-extra/docs/ReleaseNotes.rst | 1 - clang/include/clang-c/Platform.h | 20 +- clang/include/clang/AST/CommentSema.h | 3 + clang/include/clang/ASTMatchers/GtestMatchers.h | 45 + clang/include/clang/Basic/CodeGenOptions.def | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 3 + clang/include/clang/Driver/CC1Options.td | 4 +- clang/include/clang/Driver/Options.td | 11 +- clang/include/clang/Frontend/CompilerInstance.h | 3 +- clang/include/clang/Parse/Parser.h | 3 +- clang/lib/AST/ASTImporter.cpp | 26 +- clang/lib/AST/ASTStructuralEquivalence.cpp | 12 +- clang/lib/AST/CMakeLists.txt | 2 +- clang/lib/AST/CommentSema.cpp | 48 +- .../lib/AST/Interp/{Block.cpp => InterpBlock.cpp} | 2 +- clang/lib/AST/Interp/{Block.h => InterpBlock.h} | 2 +- clang/lib/AST/Interp/Pointer.cpp | 2 +- clang/lib/AST/Interp/Pointer.h | 4 +- clang/lib/ASTMatchers/CMakeLists.txt | 1 + clang/lib/ASTMatchers/GtestMatchers.cpp | 104 ++ clang/lib/Basic/Targets/AArch64.cpp | 7 + clang/lib/Basic/Targets/Hexagon.cpp | 2 + clang/lib/Basic/Targets/X86.cpp | 2 +- clang/lib/CodeGen/BackendUtil.cpp | 1 + clang/lib/CodeGen/CGCall.cpp | 4 + clang/lib/CodeGen/CGDebugInfo.cpp | 3 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 2 - clang/lib/Driver/ToolChains/Clang.cpp | 27 +- clang/lib/Driver/ToolChains/Darwin.cpp | 4 +- clang/lib/Driver/ToolChains/Fuchsia.cpp | 2 +- clang/lib/Driver/ToolChains/Hurd.cpp | 2 +- clang/lib/Driver/ToolChains/Linux.cpp | 2 +- clang/lib/Driver/ToolChains/Solaris.cpp | 2 +- clang/lib/Driver/ToolChains/WebAssembly.cpp | 2 +- clang/lib/Format/FormatToken.h | 1 + clang/lib/Format/FormatTokenLexer.cpp | 35 + clang/lib/Format/FormatTokenLexer.h | 1 + clang/lib/Frontend/ChainedIncludesSource.cpp | 2 +- clang/lib/Frontend/CompilerInstance.cpp | 4 +- clang/lib/Frontend/CompilerInvocation.cpp | 23 +- clang/lib/Frontend/FrontendAction.cpp | 4 +- clang/lib/Index/IndexingContext.cpp | 11 +- clang/lib/Sema/SemaCast.cpp | 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llvm/include/llvm/BinaryFormat/MachO.h | 7 + llvm/include/llvm/CodeGen/CommandFlags.inc | 2 +- .../llvm/CodeGen/GlobalISel/GISelKnownBits.h | 3 + llvm/include/llvm/CodeGen/ISDOpcodes.h | 5 + .../llvm/CodeGen/MachineBlockFrequencyInfo.h | 2 + llvm/include/llvm/CodeGen/ReachingDefAnalysis.h | 10 + .../llvm/CodeGen/ScoreboardHazardRecognizer.h | 7 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 42 - llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 16 +- llvm/include/llvm/CodeGen/TargetLowering.h | 4 +- .../include/llvm/ExecutionEngine/JITLink/JITLink.h | 17 +- .../llvm/ExecutionEngine/JITLink/MachO_x86_64.h | 1 + llvm/include/llvm/ExecutionEngine/Orc/Core.h | 38 + llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h | 7 + llvm/include/llvm/ExecutionEngine/Orc/OrcError.h | 4 +- llvm/include/llvm/IR/BasicBlock.h | 26 +- llvm/include/llvm/IR/IRBuilder.h | 23 + llvm/include/llvm/IR/Intrinsics.td | 8 + llvm/include/llvm/IR/IntrinsicsAArch64.td | 50 +- llvm/include/llvm/IR/IntrinsicsHexagon.td | 10 +- llvm/include/llvm/IR/PatternMatch.h | 16 +- llvm/include/llvm/MC/MCInstrItineraries.h | 7 +- llvm/include/llvm/Object/ELFObjectFile.h | 2 +- llvm/include/llvm/ObjectYAML/ELFYAML.h | 2 +- llvm/include/llvm/Support/ARMAttributeParser.h | 3 +- llvm/include/llvm/Target/TargetMachine.h | 3 - llvm/include/llvm/Target/TargetOptions.h | 15 +- llvm/include/llvm/Target/TargetSelectionDAG.td | 2 + llvm/include/llvm/Testing/Support/Error.h | 42 + .../llvm/Transforms/Utils/SimplifyLibCalls.h | 4 +- llvm/lib/Analysis/CFGPrinter.cpp | 36 + llvm/lib/Analysis/MemoryDependenceAnalysis.cpp | 29 +- llvm/lib/BinaryFormat/CMakeLists.txt | 1 + llvm/lib/BinaryFormat/MachO.cpp | 101 ++ llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 15 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 9 - llvm/lib/CodeGen/CodeGenPrepare.cpp | 35 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 46 +- llvm/lib/CodeGen/LiveDebugValues.cpp | 4 +- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 4 +- llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp | 6 + llvm/lib/CodeGen/MachineFunction.cpp | 3 +- llvm/lib/CodeGen/MachinePipeliner.cpp | 11 +- llvm/lib/CodeGen/MachineSink.cpp | 7 +- llvm/lib/CodeGen/ReachingDefAnalysis.cpp | 44 +- llvm/lib/CodeGen/ScoreboardHazardRecognizer.cpp | 13 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 84 +- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 6 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 130 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 17 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 4 + .../CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 9 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 116 +- .../CodeGen/SelectionDAG/SelectionDAGDumper.cpp | 2 + llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 112 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 2 + llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 12 - llvm/lib/CodeGen/TargetOptionsImpl.cpp | 8 - .../DWARF/DWARFAbbreviationDeclaration.cpp | 2 +- .../JITLink/BasicGOTAndStubsBuilder.h | 30 +- .../lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp | 114 +- llvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.h | 105 +- llvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp | 106 +- .../ExecutionEngine/Orc/CompileOnDemandLayer.cpp | 36 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 21 + llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 27 +- .../lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp | 30 + .../Orc/RTDyldObjectLinkingLayer.cpp | 3 +- llvm/lib/ExecutionEngine/OrcError/OrcError.cpp | 4 + llvm/lib/IR/BasicBlock.cpp | 2 +- llvm/lib/IR/ConstantFold.cpp | 6 +- llvm/lib/IR/Dominators.cpp | 14 +- llvm/lib/IR/Verifier.cpp | 6 +- llvm/lib/MC/MCParser/ELFAsmParser.cpp | 19 +- llvm/lib/MC/MCParser/MasmParser.cpp | 77 +- llvm/lib/MC/XCOFFObjectWriter.cpp | 26 +- llvm/lib/ObjectYAML/ELFEmitter.cpp | 38 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 2 +- llvm/lib/Passes/StandardInstrumentations.cpp | 16 +- llvm/lib/Support/ARMAttributeParser.cpp | 8 +- llvm/lib/Support/YAMLTraits.cpp | 2 +- .../Target/AArch64/AArch64ExpandPseudoInsts.cpp | 183 +++ llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 167 ++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 17 +- llvm/lib/Target/AArch64/AArch64InstrFormats.td | 26 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 22 +- llvm/lib/Target/AArch64/AArch64InstrInfo.h | 31 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 296 ++-- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 6 +- .../AArch64/MCTargetDesc/AArch64AsmBackend.cpp | 20 +- .../MCTargetDesc/AArch64MachObjectWriter.cpp | 2 +- llvm/lib/Target/AArch64/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 121 +- llvm/lib/Target/AMDGPU/AMDGPUGISel.td | 4 + llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp | 9 + llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h | 1 + llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 13 - llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | 12 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 311 +++- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 10 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 54 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 1 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 93 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 5 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 2 + llvm/lib/Target/AMDGPU/VOP3Instructions.td | 24 +- llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 61 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 6 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 14 +- llvm/lib/Target/ARM/ARMTargetMachine.cpp | 3 - llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 35 +- .../Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h | 12 +- llvm/lib/Target/ARM/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/ARM/README-Thumb.txt | 2 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 2 + llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 40 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.h | 2 +- llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp | 3 +- llvm/lib/Target/PowerPC/MCTargetDesc/LLVMBuild.txt | 2 +- .../Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp | 8 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 16 +- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 269 +-- llvm/lib/Target/PowerPC/README.txt | 61 - llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp | 143 +- llvm/lib/Target/SystemZ/SystemZFrameLowering.h | 9 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 17 +- .../Target/SystemZ/SystemZTargetTransformInfo.cpp | 261 ++- llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp | 2 +- .../WebAssemblyFixIrreducibleControlFlow.cpp | 28 +- llvm/lib/Target/X86/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 306 ++-- llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 10 + .../Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 2 + llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 157 ++ llvm/lib/Target/X86/X86ISelLowering.cpp | 691 +++++--- llvm/lib/Target/X86/X86ISelLowering.h | 105 +- llvm/lib/Target/X86/X86InstrAVX512.td | 99 +- llvm/lib/Target/X86/X86InstrCompiler.td | 8 +- llvm/lib/Target/X86/X86InstrFormats.td | 1 + llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 107 +- llvm/lib/Target/X86/X86InstrInfo.td | 10 +- llvm/lib/Target/X86/X86InstrSSE.td | 57 +- llvm/lib/Target/X86/X86InstrSystem.td | 12 +- llvm/lib/Target/X86/X86InstrTSX.td | 4 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 3 - llvm/lib/Target/XCore/XCoreISelLowering.cpp | 1 + llvm/lib/Target/XCore/XCoreInstrInfo.td | 3 + llvm/lib/Transforms/IPO/Attributor.cpp | 8 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 97 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 7 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 4 +- .../InstCombine/InstructionCombining.cpp | 36 +- .../Transforms/Instrumentation/GCOVProfiling.cpp | 143 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 23 +- llvm/lib/Transforms/Scalar/LICM.cpp | 3 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 7 + llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 3 +- llvm/lib/Transforms/Utils/CloneFunction.cpp | 7 +- llvm/lib/Transforms/Utils/InjectTLIMappings.cpp | 9 - llvm/lib/Transforms/Utils/KnowledgeRetention.cpp | 4 +- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 29 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 9 - llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 213 +-- .../ConstantFolding}/fp-undef.ll | 314 ++-- .../Analysis/CostModel/SystemZ/oldarch-vectors.ll | 13 + .../CostModel/X86/alternate-shuffle-cost.ll | 130 +- llvm/test/Analysis/CostModel/X86/arith-fix.ll | 6 +- llvm/test/Analysis/CostModel/X86/arith-fp.ll | 61 +- llvm/test/Analysis/CostModel/X86/arith-overflow.ll | 6 +- llvm/test/Analysis/CostModel/X86/arith-ssat.ll | 6 +- llvm/test/Analysis/CostModel/X86/arith-usat.ll | 6 +- llvm/test/Analysis/CostModel/X86/arith.ll | 354 +--- llvm/test/Analysis/CostModel/X86/div.ll | 40 +- llvm/test/Analysis/CostModel/X86/extend.ll | 2 +- llvm/test/Analysis/CostModel/X86/fcmp.ll | 214 +-- llvm/test/Analysis/CostModel/X86/fptosi.ll | 168 +- llvm/test/Analysis/CostModel/X86/fptoui.ll | 216 +-- llvm/test/Analysis/CostModel/X86/fround.ll | 57 +- llvm/test/Analysis/CostModel/X86/fshl.ll | 4 +- llvm/test/Analysis/CostModel/X86/fshr.ll | 4 +- llvm/test/Analysis/CostModel/X86/icmp.ll | 6 +- llvm/test/Analysis/CostModel/X86/rem.ll | 78 +- .../Analysis/CostModel/X86/shuffle-broadcast.ll | 2 +- .../CostModel/X86/shuffle-extract_subvector.ll | 230 +-- .../CostModel/X86/shuffle-insert_subvector.ll | 30 +- .../test/Analysis/CostModel/X86/shuffle-reverse.ll | 2 +- .../Analysis/CostModel/X86/shuffle-single-src.ll | 8 +- .../Analysis/CostModel/X86/shuffle-transpose.ll | 14 +- .../test/Analysis/CostModel/X86/shuffle-two-src.ll | 16 +- llvm/test/Analysis/CostModel/X86/sitofp.ll | 59 +- llvm/test/Analysis/CostModel/X86/trunc.ll | 25 +- llvm/test/Analysis/CostModel/X86/uitofp.ll | 52 +- llvm/test/Analysis/CostModel/X86/vector-extract.ll | 259 +-- llvm/test/Analysis/CostModel/X86/vector-insert.ll | 115 +- .../Analysis/CostModel/X86/vshift-ashr-cost.ll | 58 +- .../Analysis/CostModel/X86/vshift-lshr-cost.ll | 58 +- .../test/Analysis/CostModel/X86/vshift-shl-cost.ll | 66 +- .../MemoryDependenceAnalysis/memdep_with_tbaa.ll | 125 ++ llvm/test/CodeGen/AArch64/O0-pipeline.ll | 1 + llvm/test/CodeGen/AArch64/O3-pipeline.ll | 1 + llvm/test/CodeGen/AArch64/arm64-anyregcc.ll | 2 +- llvm/test/CodeGen/AArch64/arm64-patchpoint.ll | 4 +- llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll | 2 +- llvm/test/CodeGen/AArch64/sat-add.ll | 34 +- llvm/test/CodeGen/AArch64/sve-gep.ll | 139 ++ .../sve-intrinsics-contiguous-prefetches.ll | 252 +++ .../AArch64/sve-intrinsics-fp-arith-merging.ll | 261 +++ ...pred-contiguous-ldst-addressing-mode-reg-imm.ll | 622 +++++++ ...pred-contiguous-ldst-addressing-mode-reg-reg.ll | 610 +++++++ ...ed-non-temporal-ldst-addressing-mode-reg-imm.ll | 171 ++ ...ed-non-temporal-ldst-addressing-mode-reg-reg.ll | 145 ++ llvm/test/CodeGen/AArch64/sve-vector-splat.ll | 101 +- llvm/test/CodeGen/AArch64/sve-vscale-combine.ll | 97 ++ llvm/test/CodeGen/AArch64/sve2-bitwise-ternary.ll | 284 ++++ .../test/CodeGen/AArch64/sve2-intrinsics-crypto.ll | 99 ++ .../CodeGen/AArch64/vecreduce-and-legalization.ll | 4 +- .../AMDGPU/GlobalISel/combine-ashr-narrow.mir | 4 +- .../AMDGPU/GlobalISel/constant-bus-restriction.ll | 67 + llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll | 542 +++++++ llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll | 619 +++++++ .../CodeGen/AMDGPU/GlobalISel/inst-select-and.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-ashr.v2s16.mir | 54 +- .../inst-select-build-vector-trunc.v2s16.mir | 272 +++- .../AMDGPU/GlobalISel/inst-select-fadd.s32.mir | 90 +- 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.../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll | 388 +++++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll | 141 ++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll | 94 ++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll | 388 +++++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll | 141 ++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll | 94 ++ .../AMDGPU/GlobalISel/regbankselect-smax.mir | 94 +- .../AMDGPU/GlobalISel/regbankselect-smin.mir | 94 +- .../AMDGPU/GlobalISel/regbankselect-umax.mir | 96 +- .../AMDGPU/GlobalISel/regbankselect-umin.mir | 96 +- llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll | 272 ++++ llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ll | 11 + llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll | 4 +- llvm/test/CodeGen/AMDGPU/idot4s.ll | 40 +- llvm/test/CodeGen/AMDGPU/idot4u.ll | 33 +- llvm/test/CodeGen/AMDGPU/idot8s.ll | 246 ++- llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 35 + llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll | 44 +- llvm/test/CodeGen/ARM/fp16-bitcast.ll | 60 + llvm/test/CodeGen/ARM/rotate.ll | 11 +- llvm/test/CodeGen/ARM/smml.ll | 2 +- .../Hexagon/autohvx/vector-predicate-typecast.ll | 31 + .../CodeGen/MIR/Hexagon/bundled-call-site-info.mir | 2 - .../test/CodeGen/MIR/X86/call-site-info-error1.mir | 2 +- .../test/CodeGen/MIR/X86/call-site-info-error2.mir | 2 +- .../test/CodeGen/MIR/X86/call-site-info-error3.mir | 2 +- .../test/CodeGen/MIR/X86/call-site-info-error4.mir | 4 +- llvm/test/CodeGen/PowerPC/aix-undef-func-call.ll | 20 + llvm/test/CodeGen/PowerPC/unwind-dw2.ll | 16 +- llvm/test/CodeGen/PowerPC/vrsave-inline-asm.ll | 42 + llvm/test/CodeGen/SystemZ/frame-23.ll | 20 + llvm/test/CodeGen/SystemZ/frame-24.ll | 72 + llvm/test/CodeGen/SystemZ/frameaddr-02.ll | 54 + .../Thumb2/LowOverheadLoops/extending-loads.ll | 229 +++ llvm/test/CodeGen/X86/atomic-fp.ll | 312 ++-- llvm/test/CodeGen/X86/atomic-load-store-wide.ll | 37 +- llvm/test/CodeGen/X86/atomic-mi.ll | 501 ++---- llvm/test/CodeGen/X86/atomic-non-integer.ll | 142 +- llvm/test/CodeGen/X86/avg.ll | 4 +- llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll | 2 +- llvm/test/CodeGen/X86/avx-splat.ll | 6 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 433 +++++ llvm/test/CodeGen/X86/avx512-select.ll | 178 ++ .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 92 +- .../CodeGen/X86/bitcast-int-to-vector-bool-sext.ll | 10 +- .../CodeGen/X86/bitcast-int-to-vector-bool-zext.ll | 10 +- llvm/test/CodeGen/X86/call-site-info-output.ll | 4 +- llvm/test/CodeGen/X86/cmov-fp.ll | 1608 ++++++++++++++---- llvm/test/CodeGen/X86/extractelement-load.ll | 38 +- llvm/test/CodeGen/X86/fma.ll | 40 +- llvm/test/CodeGen/X86/h-register-addressing-32.ll | 51 +- llvm/test/CodeGen/X86/h-register-addressing-64.ll | 58 +- llvm/test/CodeGen/X86/half.ll | 57 +- llvm/test/CodeGen/X86/hoist-invariant-load.ll | 2 +- llvm/test/CodeGen/X86/insertelement-var-index.ll | 2 +- llvm/test/CodeGen/X86/machine-sink.ll | 1 + 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mlir/include/mlir/IR/Builders.h | 5 + mlir/include/mlir/IR/Location.h | 6 + mlir/include/mlir/IR/Matchers.h | 2 +- mlir/include/mlir/IR/OpBase.td | 44 +- mlir/include/mlir/IR/OpDefinition.h | 24 +- mlir/include/mlir/IR/OpImplementation.h | 21 + mlir/include/mlir/IR/Operation.h | 2 +- mlir/include/mlir/IR/OperationSupport.h | 5 + mlir/include/mlir/IR/StandardTypes.h | 67 +- mlir/include/mlir/IR/StorageUniquerSupport.h | 20 +- mlir/include/mlir/IR/Types.h | 31 +- mlir/include/mlir/InitAllDialects.h | 2 +- mlir/include/mlir/InitAllPasses.h | 1 + mlir/include/mlir/Support/STLExtras.h | 20 + mlir/include/mlir/TableGen/Constraint.h | 2 +- mlir/include/mlir/TableGen/Operator.h | 18 + mlir/include/mlir/TableGen/Successor.h | 44 + mlir/include/mlir/Transforms/Utils.h | 2 +- mlir/lib/Analysis/AffineAnalysis.cpp | 2 +- mlir/lib/Analysis/AffineStructures.cpp | 2 +- mlir/lib/Analysis/NestedMatcher.cpp | 2 +- mlir/lib/Analysis/Utils.cpp | 6 +- .../AffineToStandard/AffineToStandard.cpp | 4 +- .../Conversion/GPUCommon/OpToFuncCallLowering.h | 2 +- .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 2 +- .../Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp | 9 +- .../GPUToVulkan/ConvertLaunchFuncToVulkanCalls.cpp | 2 +- .../lib/Conversion/LinalgToSPIRV/LinalgToSPIRV.cpp | 2 +- .../LoopToStandard/ConvertLoopToStandard.cpp | 2 +- mlir/lib/Conversion/LoopsToGPU/LoopsToGPU.cpp | 2 +- mlir/lib/Conversion/LoopsToGPU/LoopsToGPUPass.cpp | 2 +- .../StandardToLLVM/ConvertStandardToLLVM.cpp | 2 +- .../StandardToSPIRV/ConvertStandardToSPIRV.cpp | 2 +- .../StandardToSPIRV/LegalizeStandardForSPIRV.cpp | 2 +- .../Conversion/StandardToSPIRV/StandardToSPIRV.td | 2 +- .../VectorToLLVM/ConvertVectorToLLVM.cpp | 10 +- mlir/lib/Dialect/AffineOps/AffineOps.cpp | 2 +- mlir/lib/Dialect/AffineOps/EDSC/Builders.cpp | 6 +- .../FxpMathOps/Transforms/LowerUniformRealMath.cpp | 2 +- .../FxpMathOps/Transforms/UniformKernelUtils.h | 6 +- mlir/lib/Dialect/GPU/IR/GPUDialect.cpp | 4 +- .../Dialect/GPU/Transforms/AllReduceLowering.cpp | 2 +- .../lib/Dialect/GPU/Transforms/KernelOutlining.cpp | 2 +- mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 70 +- .../Dialect/Linalg/Analysis/DependenceAnalysis.cpp | 2 +- mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 4 +- mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp | 2 +- mlir/lib/Dialect/Linalg/Utils/Utils.cpp | 8 +- mlir/lib/Dialect/LoopOps/LoopOps.cpp | 146 +- mlir/lib/Dialect/LoopOps/Transforms/CMakeLists.txt | 1 + .../LoopOps/Transforms/ParallelLoopFusion.cpp | 2 +- .../LoopOps/Transforms/ParallelLoopTiling.cpp | 133 ++ mlir/lib/Dialect/QuantOps/IR/QuantTypes.cpp | 69 +- .../Dialect/QuantOps/Transforms/ConvertConst.cpp | 2 +- mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp | 11 +- mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 38 +- .../Dialect/SPIRV/Serialization/Deserializer.cpp | 4 +- mlir/lib/Dialect/SPIRV/TargetAndABI.cpp | 15 +- mlir/lib/Dialect/StandardOps/CMakeLists.txt | 3 +- mlir/lib/Dialect/StandardOps/{ => IR}/Ops.cpp | 319 +--- mlir/lib/Dialect/VectorOps/VectorOps.cpp | 60 +- mlir/lib/Dialect/VectorOps/VectorTransforms.cpp | 103 +- mlir/lib/Dialect/VectorOps/VectorUtils.cpp | 2 +- mlir/lib/ExecutionEngine/ExecutionEngine.cpp | 16 +- mlir/lib/IR/AsmPrinter.cpp | 42 +- mlir/lib/IR/Attributes.cpp | 129 +- mlir/lib/IR/Builders.cpp | 18 +- mlir/lib/IR/MLIRContext.cpp | 65 +- mlir/lib/IR/Operation.cpp | 10 +- mlir/lib/IR/StandardTypes.cpp | 135 +- mlir/lib/IR/TypeDetail.h | 47 +- mlir/lib/IR/Types.cpp | 7 +- mlir/lib/Parser/Lexer.cpp | 21 +- mlir/lib/Parser/Parser.cpp | 188 ++- mlir/lib/Parser/Token.cpp | 15 +- mlir/lib/Parser/Token.h | 5 + mlir/lib/Parser/TokenKinds.def | 2 +- .../lib/Quantizer/Configurations/FxpMathConfig.cpp | 2 +- mlir/lib/TableGen/CMakeLists.txt | 1 + mlir/lib/TableGen/Constraint.cpp | 2 + mlir/lib/TableGen/Operator.cpp | 48 + mlir/lib/TableGen/Successor.cpp | 24 + .../Transforms/AffineLoopInvariantCodeMotion.cpp | 2 +- mlir/lib/Transforms/LoopCoalescing.cpp | 2 +- mlir/lib/Transforms/LoopFusion.cpp | 4 +- mlir/lib/Transforms/MemRefDataFlowOpt.cpp | 2 +- mlir/lib/Transforms/PipelineDataTransfer.cpp | 2 +- mlir/lib/Transforms/Utils/FoldUtils.cpp | 2 +- .../Utils/GreedyPatternRewriteDriver.cpp | 2 +- mlir/lib/Transforms/Utils/LoopFusionUtils.cpp | 2 +- mlir/lib/Transforms/Utils/Utils.cpp | 2 +- mlir/lib/Transforms/Vectorize.cpp | 2 +- mlir/test/Conversion/LoopsToGPU/parallel_loop.mlir | 4 +- .../Conversion/StandardToSPIRV/std-to-spirv.mlir | 38 + mlir/test/Dialect/Linalg/parallel_loops.mlir | 2 +- mlir/test/Dialect/Loops/invalid.mlir | 110 +- mlir/test/Dialect/Loops/ops.mlir | 132 +- mlir/test/Dialect/Loops/parallel-loop-fusion.mlir | 56 +- mlir/test/Dialect/Loops/parallel-loop-tiling.mlir | 80 + .../Dialect/SPIRV/Serialization/memory-ops.mlir | 34 + mlir/test/Dialect/SPIRV/control-flow-ops.mlir | 6 +- .../VectorOps/vector-contract-transforms.mlir | 81 + mlir/test/Examples/Toy/Ch2/codegen.toy | 24 +- mlir/test/Examples/Toy/Ch2/scalar.toy | 8 +- mlir/test/Examples/Toy/Ch3/codegen.toy | 24 +- mlir/test/Examples/Toy/Ch3/scalar.toy | 8 +- mlir/test/Examples/Toy/Ch4/codegen.toy | 24 +- mlir/test/Examples/Toy/Ch4/scalar.toy | 8 +- mlir/test/Examples/Toy/Ch4/shape_inference.mlir | 34 +- mlir/test/Examples/Toy/Ch5/affine-lowering.mlir | 14 +- mlir/test/Examples/Toy/Ch5/codegen.toy | 24 +- mlir/test/Examples/Toy/Ch5/scalar.toy | 8 +- mlir/test/Examples/Toy/Ch5/shape_inference.mlir | 34 +- mlir/test/Examples/Toy/Ch6/affine-lowering.mlir | 14 +- mlir/test/Examples/Toy/Ch6/codegen.toy | 24 +- mlir/test/Examples/Toy/Ch6/llvm-lowering.mlir | 10 +- mlir/test/Examples/Toy/Ch6/scalar.toy | 8 +- mlir/test/Examples/Toy/Ch6/shape_inference.mlir | 34 +- mlir/test/Examples/Toy/Ch7/affine-lowering.mlir | 14 +- mlir/test/Examples/Toy/Ch7/codegen.toy | 24 +- mlir/test/Examples/Toy/Ch7/llvm-lowering.mlir | 10 +- mlir/test/Examples/Toy/Ch7/scalar.toy | 8 +- mlir/test/Examples/Toy/Ch7/shape_inference.mlir | 34 +- mlir/test/Examples/Toy/Ch7/struct-codegen.toy | 30 +- mlir/test/Examples/Toy/Ch7/struct-opt.mlir | 19 +- mlir/test/IR/dense-elements-hex.mlir | 28 + mlir/test/IR/invalid-ops.mlir | 8 +- mlir/test/IR/invalid.mlir | 29 +- mlir/test/IR/parser.mlir | 6 + .../TestVectorTransformPatterns.td | 2 +- mlir/test/lib/IR/TestMatchers.cpp | 2 +- mlir/test/lib/TestDialect/TestDialect.cpp | 6 +- mlir/test/lib/TestDialect/TestOps.td | 13 +- mlir/test/lib/TestDialect/TestPatterns.cpp | 6 +- mlir/test/lib/Transforms/TestConstantFold.cpp | 2 +- mlir/test/lib/Transforms/TestInlining.cpp | 2 +- mlir/test/lib/Transforms/TestLoopFusion.cpp | 2 +- mlir/test/lib/Transforms/TestMemRefBoundCheck.cpp | 2 +- .../lib/Transforms/TestMemRefDependenceCheck.cpp | 2 +- .../lib/Transforms/TestMemRefStrideCalculation.cpp | 2 +- mlir/test/lib/Transforms/TestOpaqueLoc.cpp | 2 +- mlir/test/lib/Transforms/TestVectorTransforms.cpp | 2 +- mlir/test/mlir-tblgen/op-attribute.td | 10 +- mlir/test/mlir-tblgen/op-format-spec.td | 92 +- mlir/test/mlir-tblgen/op-format.mlir | 19 + mlir/test/mlir-tblgen/predicate.td | 2 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 138 +- mlir/tools/mlir-tblgen/OpFormatGen.cpp | 913 ++++++++--- mlir/tools/mlir-vulkan-runner/VulkanRuntime.cpp | 3 +- openmp/runtime/test/lit.cfg | 7 + openmp/runtime/test/ompt/teams/parallel_team.c | 2 +- openmp/runtime/test/ompt/teams/serial_teams.c | 2 +- 865 files changed, 29511 insertions(+), 13316 deletions(-) create mode 100644 clang/include/clang/ASTMatchers/GtestMatchers.h rename clang/lib/AST/Interp/{Block.cpp => InterpBlock.cpp} (98%) rename clang/lib/AST/Interp/{Block.h => InterpBlock.h} (98%) create mode 100644 clang/lib/ASTMatchers/GtestMatchers.cpp create mode 100644 clang/test/CodeGen/non-power-of-2-alignment-assumptions.c delete mode 100644 clang/test/Driver/code-model.c create mode 100644 clang/test/Driver/mcmodel.c create mode 100644 clang/test/Preprocessor/init-aarch64.c create mode 100644 clang/test/Sema/warn-documentation-tag-typedef.cpp create mode 100644 clang/unittests/ASTMatchers/GtestMatchersTest.cpp create mode 100644 libc/config/linux/signal.h.in create mode 100644 libc/docs/fuzzing.rst create mode 100644 libc/fuzzing/CMakeLists.txt create mode 100644 libc/fuzzing/string/CMakeLists.txt create mode 100644 libc/fuzzing/string/strcpy_fuzz.cpp create mode 100644 libc/include/signal.h.def create mode 100644 libc/src/signal/CMakeLists.txt create mode 100644 libc/src/signal/linux/CMakeLists.txt create mode 100644 libc/src/signal/linux/raise.cpp create mode 100644 libc/src/signal/linux/signal.h create mode 100644 libc/src/signal/raise.h create mode 100644 libc/test/src/signal/CMakeLists.txt create mode 100644 libc/test/src/signal/raise_test.cpp create mode 100644 libc/utils/HdrGen/README.md create mode 100644 libc/utils/UnitTest/README.md delete mode 100644 libclc/generic/lib/math/acos.inc create mode 100644 lld/test/ELF/linkerscript/section-align2.test create mode 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[...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll create mode 100644 llvm/test/CodeGen/ARM/fp16-bitcast.ll create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/vector-predicate-typecast.ll create mode 100644 llvm/test/CodeGen/PowerPC/vrsave-inline-asm.ll create mode 100644 llvm/test/CodeGen/SystemZ/frame-23.ll create mode 100644 llvm/test/CodeGen/SystemZ/frame-24.ll create mode 100644 llvm/test/CodeGen/SystemZ/frameaddr-02.ll create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/extending-loads.ll create mode 100644 llvm/test/CodeGen/X86/pr44976.ll create mode 100644 llvm/test/CodeGen/X86/sdiv_fix_sat.ll create mode 100644 llvm/test/CodeGen/X86/udiv_fix_sat.ll create mode 100644 llvm/test/CodeGen/XCore/bitrev.ll delete mode 100644 llvm/test/DebugInfo/MIR/ARM/dbgcallsite-noreg-is-imm-check.mir delete mode 100644 llvm/test/DebugInfo/X86/no-entry-values-with-O0.ll create mode 100644 llvm/test/ExecutionEngine/JITLink/X86/Inputs/MachO_GOTAndStubsO [...] create mode 100644 llvm/test/ExecutionEngine/JITLink/X86/MachO_GOTAndStubsOptimization.s create mode 100644 llvm/test/ExecutionEngine/OrcLazy/static-initializers-in-object [...] create mode 100644 llvm/test/MC/ELF/section-entsize-changed.s create mode 100644 llvm/test/MC/ELF/section-flags-changed.s create mode 100644 llvm/test/MC/ELF/section-type-changed.s create mode 100644 llvm/test/Other/cfg_deopt_unreach.ll create mode 100644 llvm/test/Transforms/DeadStoreElimination/MSSA/debug-counter.ll copy llvm/test/{CodeGen => Transforms/InstCombine}/Hexagon/lit.local.cfg (100%) create mode 100644 llvm/test/Transforms/InstCombine/Hexagon/simplify-hvx-qvq.ll create mode 100644 llvm/test/Transforms/LICM/callbr-crash.ll create mode 100644 llvm/test/Transforms/SCCP/loadtest2.ll create mode 100644 llvm/test/tools/llvm-objdump/X86/source-interleave-function-fro [...] create mode 100644 llvm/test/tools/yaml2obj/ELF/section-address-assign.yaml copy mlir/include/mlir/Dialect/StandardOps/{ => IR}/CMakeLists.txt (100%) rename mlir/include/mlir/Dialect/StandardOps/{ => IR}/Ops.h (98%) rename mlir/include/mlir/Dialect/StandardOps/{ => IR}/Ops.td (96%) create mode 100644 mlir/include/mlir/TableGen/Successor.h create mode 100644 mlir/lib/Dialect/LoopOps/Transforms/ParallelLoopTiling.cpp rename mlir/lib/Dialect/StandardOps/{ => IR}/Ops.cpp (89%) create mode 100644 mlir/lib/TableGen/Successor.cpp create mode 100644 mlir/test/Dialect/Loops/parallel-loop-tiling.mlir create mode 100644 mlir/test/IR/dense-elements-hex.mlir