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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm in repository toolchain/ci/gcc.
from e767da23de1 AVX512FP16: Fix masm=intel output for vfc?(madd|mul)csh [PR [...] adds 5177634148a RISC-V: Implement misc macro for vector extensions. adds 70b8f43695b Dump when estimating the number of iterations of a loop adds 3f18553eb7d docs: Document min-pagesize parameter. adds e63ac860afe libstdc++: Work around clang misdesign in time_get<>::get [ [...] adds 2d810acbd2c Avoid a warning of overflow adds 4a3073f04e8 rtl-ssa: Fix prev/next_def confusion [PR104869]
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Summary of changes: gcc/c-family/c-ada-spec.cc | 2 +- gcc/common/config/riscv/riscv-common.cc | 16 ++--- gcc/config/riscv/riscv-c.cc | 18 +++++ gcc/config/riscv/riscv-opts.h | 25 +++++-- gcc/config/riscv/riscv.opt | 2 +- gcc/doc/invoke.texi | 3 + gcc/rtl-ssa/accesses.cc | 52 +++++++++++++- gcc/rtl-ssa/accesses.h | 22 ++++-- gcc/rtl-ssa/member-fns.inl | 12 ++-- gcc/rtl-ssa/movement.h | 6 +- gcc/testsuite/g++.dg/pr104869.C | 78 ++++++++++++++++++++ gcc/testsuite/gcc.target/riscv/arch-13.c | 5 ++ gcc/testsuite/gcc.target/riscv/arch-14.c | 5 ++ gcc/testsuite/gcc.target/riscv/arch-15.c | 5 ++ gcc/testsuite/gcc.target/riscv/predef-18.c | 84 ++++++++++++++++++++++ gcc/testsuite/gcc.target/riscv/predef-19.c | 88 +++++++++++++++++++++++ gcc/testsuite/gcc.target/riscv/predef-20.c | 84 ++++++++++++++++++++++ gcc/tree-ssa-loop-niter.cc | 3 + libstdc++-v3/include/bits/locale_facets_nonio.tcc | 2 +- 19 files changed, 482 insertions(+), 30 deletions(-) create mode 100644 gcc/testsuite/g++.dg/pr104869.C create mode 100644 gcc/testsuite/gcc.target/riscv/arch-13.c create mode 100644 gcc/testsuite/gcc.target/riscv/arch-14.c create mode 100644 gcc/testsuite/gcc.target/riscv/arch-15.c create mode 100644 gcc/testsuite/gcc.target/riscv/predef-18.c create mode 100644 gcc/testsuite/gcc.target/riscv/predef-19.c create mode 100644 gcc/testsuite/gcc.target/riscv/predef-20.c