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from bc809c37df6 Fix small grammar-o. new 7dc086936fa AMDGPU : Recalculate SGPRs when trap handler is supported new e66042ff019 [X86][SSE] Reduce instruction/register usages for v4i32 vec [...]
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Summary of changes: lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 14 +- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 3 +- lib/Target/X86/X86ISelLowering.cpp | 55 ++++-- test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll | 70 +++++++ test/CodeGen/X86/combine-sra.ll | 56 +++--- test/CodeGen/X86/combine-srl.ll | 28 ++- test/CodeGen/X86/combine-udiv.ll | 84 ++++----- test/CodeGen/X86/combine-urem.ll | 28 ++- test/CodeGen/X86/vector-rotate-128.ll | 266 ++++++++++++--------------- test/CodeGen/X86/vector-shift-ashr-128.ll | 120 ++++++------ test/CodeGen/X86/vector-shift-lshr-128.ll | 120 ++++++------ 11 files changed, 437 insertions(+), 407 deletions(-) create mode 100644 test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll