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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-arm in repository toolchain/ci/gcc.
from d5c6604f420 Add a simulate_record_decl lang hook adds 268b43d2592 middle-end/103038 - avoid ICE with -ftrivial-auto-var-init=pattern adds 6cc8aa65fde middle-end: Fix PR103007, add missing check on complex fms [...] new 64bf0c835f8 IBM Z: ldist-{rawmemchr,strlen} tests require vector extensions new c33a5cc9e7f RISC-V: Fix build errors with shNadd/shNadd.uw patterns in [...]
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Summary of changes: gcc/config/riscv/riscv.c | 5 ++--- gcc/fold-const.c | 2 ++ gcc/internal-fn.c | 8 ++++++-- gcc/testsuite/g++.dg/pr103007.C | 19 +++++++++++++++++++ gcc/testsuite/g++.dg/pr103038.C | 5 +++++ gcc/testsuite/gcc.dg/tree-ssa/ldist-rawmemchr-1.c | 1 + gcc/testsuite/gcc.dg/tree-ssa/ldist-rawmemchr-2.c | 1 + gcc/testsuite/gcc.dg/tree-ssa/ldist-strlen-1.c | 1 + gcc/testsuite/gcc.dg/tree-ssa/ldist-strlen-3.c | 1 + gcc/tree-vect-slp-patterns.c | 6 +++++- 10 files changed, 43 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/g++.dg/pr103007.C create mode 100644 gcc/testsuite/g++.dg/pr103038.C