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from c25b24fa72c7 Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linu [...] new b6da6cbe13eb riscv: introduce RISCV_EFFICIENT_UNALIGNED_ACCESS new d0fdc20b0429 riscv: select DCACHE_WORD_ACCESS for efficient unaligned a [...] new 17f2c308051f Merge patch series "riscv: enable EFFICIENT_UNALIGNED_ACCE [...] new 78996eee79eb riscv: Fix module loading free order new 4b38b36bfbd8 riscv: Correctly free relocation hashtable on error new a35551c7244d riscv: Fix relocation_hashtable size new 3a58275099b9 Merge patch series "riscv: modules: Fix module loading err [...] new 4dc4af9ce326 riscv: sbi: Introduce system suspend support new f503b167b660 RISC-V: Add stubs for sbi_console_putchar/getchar() new f43fabf444ca RISC-V: Add SBI debug console helper routines new c77bf3607a0f tty/serial: Add RISC-V SBI debug console based earlycon new 88ead68e764c tty: Add SBI debug console support to HVC SBI driver new 50942ad6ddb5 RISC-V: Enable SBI based earlycon support new 951df4eb817c Merge patch series "RISC-V SBI debug console extension support" new a452816132d6 dt-bindings: riscv: cpus: Clarify mmu-type interpretation new 07df87c0f881 dt-bindings: riscv: permit numbers in "riscv,isa" new a4ff64edf9ed riscv: errata: thead: use riscv_nonstd_cache_ops for CMO new 3690492612ec riscv: errata: thead: use pa based instructions for CMO new 2e605741e9dd Merge patch series "riscv: errata: thead: use riscv_nonstd [...] new d3e591a38c98 dt-bindings: riscv: Document cbop-block-size new ff172d4818ad riscv: Use hugepage mappings for vmemmap new 54d7431af73e riscv: Add support for BATCHED_UNMAP_TLB_FLUSH new b91c26fdb0e8 tools: selftests: riscv: Fix compile warnings in hwprobe new ac7b2a02d62f tools: selftests: riscv: Fix compile warnings in cbo new b250c9089841 tools: selftests: riscv: Add missing include for vector test new e1baf5e68ed1 tools: selftests: riscv: Fix compile warnings in vector tests new 12c16919652b tools: selftests: riscv: Fix compile warnings in mm tests new 9b1d9abe24b1 Merge patch series "tools: selftests: riscv: Fix compiler [...] new adb1f95d388a riscv: Fix an off-by-one in get_early_cmdline() new 5f449e245e5b riscv: mm: Fixup compat mode boot failure new 97b7ac69be2e riscv: mm: Fixup compat arch_get_mmap_end new d4abde52b4b1 Merge patch series "riscv: mm: Fixup & Optimize COMPAT code" new ecd2ada8a5e0 riscv: Add support for kernel mode vector new 956895b9d8f7 riscv: vector: make Vector always available for softirq context new c5674d00cacd riscv: Add vector extension XOR implementation new 7df56cbc27e4 riscv: sched: defer restoring Vector context for user new c2a658d41924 riscv: lib: vectorize copy_to_user/copy_from_user new a93fdaf18312 riscv: fpu: drop SR_SD bit checking new d6c78f1ca3e8 riscv: vector: do not pass task_struct into riscv_v_vstate [...] new 5b6048f2ff71 riscv: vector: use a mask to write vstate_ctrl new bd446f5df5af riscv: vector: use kmem_cache to manage vector context new 2080ff949307 riscv: vector: allow kernel-mode Vector with preemption new a894e8ed09c6 Merge patch series "riscv: support kernel-mode Vector" new 0de65288d75f RISC-V: selftests: cbo: Ensure asm operands match constraints new 1e7196fa5b03 asm-generic: Improve csum_fold new 2ce5729fce8f riscv: Add static key for misaligned accesses new e11e367e9fe5 riscv: Add checksum header new a04c192eabfb riscv: Add checksum library new 6f4c45cbcb00 kunit: Add tests for csum_ipv6_magic and ip_fast_csum new c64086849110 Merge patch series "riscv: Add fine-tuned checksum functions" new 55b71d2ce133 riscv: Hoist linker relaxation disabling logic into Kconfig new ae84ff9a14a5 riscv: Restrict DWARF5 when building with LLVM to known wo [...] new a4426641f00c lib/Kconfig.debug: Update AS_HAS_NON_CONST_LEB128 comment [...] new 448857ec53a4 Merge patch series "RISC-V: Disable DWARF5 with known brok [...] new b546d6363af4 riscv: select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY new 35e61e8827ee riscv: ftrace: Make function graph use ftrace directly new 196c79f19a92 riscv: ftrace: Add DYNAMIC_FTRACE_WITH_DIRECT_CALLS support new 629291dd8499 samples: ftrace: Add RISC-V support for SAMPLE_FTRACE_DIRE [...] new 3074e8b17538 Merge patch series "riscv: ftrace: Miscellaneous ftrace im [...] new c4db7ff7a9ed riscv: add dependency among Image(.gz), loader(.bin), and [...] new 55ca8d7aa2af riscv: Optimize hweight API with Zbb extension new 102434010592 RISC-V: Implement archrandom when Zkr is available new 080c4324fa5e riscv: optimize ELF relocation function in riscv new 66f962d8939f riscv: Fix build error on rv32 + XIP new 4525462dd0db riscv: lib: Check if output in asm goto supported new f24a70106dc1 lib: checksum: Fix build with CONFIG_NET=n new e5075d8ec564 Merge tag 'riscv-for-linus-6.8-mw4' of git://git.kernel.or [...]
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Summary of changes: Documentation/devicetree/bindings/riscv/cpus.yaml | 9 +- .../devicetree/bindings/riscv/extensions.yaml | 2 +- Documentation/features/vm/TLB/arch-support.txt | 2 +- arch/riscv/Kconfig | 57 +++- arch/riscv/Kconfig.errata | 1 + arch/riscv/Makefile | 8 +- arch/riscv/configs/defconfig | 1 + arch/riscv/errata/thead/errata.c | 69 ++++- arch/riscv/include/asm/arch_hweight.h | 78 +++++ arch/riscv/include/asm/archrandom.h | 72 +++++ arch/riscv/include/asm/asm-extable.h | 15 + arch/riscv/include/asm/asm-prototypes.h | 27 ++ arch/riscv/include/asm/bitops.h | 4 +- arch/riscv/include/asm/checksum.h | 93 ++++++ arch/riscv/include/asm/cpufeature.h | 2 + arch/riscv/include/asm/csr.h | 9 + arch/riscv/include/asm/entry-common.h | 17 ++ arch/riscv/include/asm/errata_list.h | 50 +--- arch/riscv/include/asm/ftrace.h | 18 +- arch/riscv/include/asm/pgtable.h | 2 +- arch/riscv/include/asm/processor.h | 43 ++- arch/riscv/include/asm/sbi.h | 19 ++ arch/riscv/include/asm/simd.h | 64 ++++ arch/riscv/include/asm/switch_to.h | 3 +- arch/riscv/include/asm/thread_info.h | 2 + arch/riscv/include/asm/tlbbatch.h | 15 + arch/riscv/include/asm/tlbflush.h | 8 + arch/riscv/include/asm/vector.h | 90 +++++- arch/riscv/include/asm/word-at-a-time.h | 27 ++ arch/riscv/include/asm/xor.h | 68 +++++ arch/riscv/kernel/Makefile | 1 + arch/riscv/kernel/cpufeature.c | 90 +++++- arch/riscv/kernel/entry.S | 8 + arch/riscv/kernel/ftrace.c | 30 +- arch/riscv/kernel/kernel_mode_vector.c | 247 ++++++++++++++++ arch/riscv/kernel/mcount-dyn.S | 198 ++++++++++--- arch/riscv/kernel/module.c | 34 ++- arch/riscv/kernel/pi/cmdline_early.c | 3 +- arch/riscv/kernel/process.c | 13 +- arch/riscv/kernel/ptrace.c | 7 +- arch/riscv/kernel/sbi.c | 66 +++++ arch/riscv/kernel/signal.c | 7 +- arch/riscv/kernel/suspend.c | 44 +++ arch/riscv/kernel/vector.c | 53 +++- arch/riscv/lib/Makefile | 6 + arch/riscv/lib/csum.c | 328 +++++++++++++++++++++ arch/riscv/lib/riscv_v_helpers.c | 45 +++ arch/riscv/lib/uaccess.S | 10 + arch/riscv/lib/uaccess_vector.S | 53 ++++ arch/riscv/lib/xor.S | 81 +++++ arch/riscv/mm/extable.c | 31 ++ arch/riscv/mm/init.c | 25 +- arch/riscv/mm/tlbflush.c | 69 +++-- drivers/tty/hvc/Kconfig | 2 +- drivers/tty/hvc/hvc_riscv_sbi.c | 37 ++- drivers/tty/serial/Kconfig | 2 +- drivers/tty/serial/earlycon-riscv-sbi.c | 27 +- include/asm-generic/checksum.h | 6 +- lib/Kconfig.debug | 12 +- lib/checksum_kunit.c | 286 +++++++++++++++++- samples/ftrace/ftrace-direct-modify.c | 35 +++ samples/ftrace/ftrace-direct-multi-modify.c | 41 +++ samples/ftrace/ftrace-direct-multi.c | 25 ++ samples/ftrace/ftrace-direct-too.c | 28 ++ samples/ftrace/ftrace-direct.c | 24 ++ tools/testing/selftests/riscv/hwprobe/cbo.c | 24 +- tools/testing/selftests/riscv/hwprobe/hwprobe.c | 4 +- tools/testing/selftests/riscv/mm/mmap_test.h | 3 + .../selftests/riscv/vector/v_initval_nolibc.c | 2 +- .../selftests/riscv/vector/vstate_exec_nolibc.c | 3 + .../testing/selftests/riscv/vector/vstate_prctl.c | 4 +- 71 files changed, 2676 insertions(+), 213 deletions(-) create mode 100644 arch/riscv/include/asm/arch_hweight.h create mode 100644 arch/riscv/include/asm/archrandom.h create mode 100644 arch/riscv/include/asm/checksum.h create mode 100644 arch/riscv/include/asm/simd.h create mode 100644 arch/riscv/include/asm/tlbbatch.h create mode 100644 arch/riscv/include/asm/xor.h create mode 100644 arch/riscv/kernel/kernel_mode_vector.c create mode 100644 arch/riscv/lib/csum.c create mode 100644 arch/riscv/lib/riscv_v_helpers.c create mode 100644 arch/riscv/lib/uaccess_vector.S create mode 100644 arch/riscv/lib/xor.S