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from dc941ea9258 amdgcn: sub-dword vector min/max/shift/bit operators new 17a13507d77 [GCC][PATCH][ARM] Add vreinterpret, vdup, vget and vset bf [...]
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Summary of changes: gcc/ChangeLog | 57 +++ gcc/config/arm/arm_neon.h | 532 ++++++++++++++++++++- gcc/config/arm/arm_neon_builtins.def | 10 +- gcc/config/arm/iterators.md | 25 +- gcc/config/arm/neon.md | 26 +- gcc/testsuite/ChangeLog | 5 + gcc/testsuite/gcc.target/arm/bf16_dup.c | 96 ++++ .../advsimd-intrinsics => arm}/bf16_reinterpret.c | 89 ++-- 8 files changed, 752 insertions(+), 88 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/bf16_dup.c copy gcc/testsuite/gcc.target/{aarch64/advsimd-intrinsics => arm}/bf16_reinterpret [...]