[Tcwg-commits] [llvm] branch master updated (5137cfa -> d6f9ab1)

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from 5137cfa [SystemZ] Fix register ordering for BinaryRRF instructions new d6f9ab1 [X86][SSE41] Sync with clang/test/CodeGen/sse41-builtins.c

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Summary of changes: test/CodeGen/X86/sse41-intrinsics-fast-isel.ll | 78 +++++++++++++------------- 1 file changed, 39 insertions(+), 39 deletions(-)