[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (5a434ceafbe7 -> c84b8be516bc)

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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/llvm-project.

from 5a434ceafbe7 GlobalISel: Use cloneVirtualRegister in localizer adds c0581f7df685 Revert D109159 : Revert "[amdgpu] Enable selection of `s_c [...] adds 4372e629a9a9 [AIX] add the xcoff symbol size for the llvm-nm. adds e7cb716ef955 [mlir][Linalg] Pattern to fuse pad operation with elementw [...] adds 85e6e748d426 [MCA] Switching from conservatively guessing which instruc [...] adds 6479f03daec1 [clang][#47272] Avoid suggesting deprecated version of a d [...] adds e3cf70502cae [libc++] Introduce __debug_db_insert_c() adds d5b5fc06b85a [libc++] Add Status page for P2321R2 (Zip) adds fcfc0e7ad34c [libc++] Introduce __fits_in_sso() adds 7ea175d1c6fa Add 'eager-checks' as a module parameter to MSAN. adds e9b5b815565b [NFC][llvm-libtool-darwin] Encapsulate the process of addi [...] adds 4993eff3e253 [llvm-libtool-darwin] Print a warning if object file names [...] adds c79d37279156 [sanitizer_common] Only use NT_GNU_BUILD_ID in sanitizer_l [...] adds 4614b93f5373 [TSan][Darwin] Mark test UNSUPPORTED for iOS simulator adds 9e634b35ff51 [libc++] Temporarily disable the in_out_result test on Fuchsia. adds ff11cd955019 [TSan][Darwin] Enable Trace/TraceAlloc unit tests adds 97567bde5baa [MLIR][SCF] Canonicalize while statement whose cmp conditi [...] adds 7acb68b80be6 [NFC] Fixup for comment adds 945aa520ef07 [LLDB][NativePDB] Add support for inlined functions adds b7f298f17416 [NFC][MLGO] Use ASSERT_TRUE in TFUtilsTest, where appropriate. adds b2715660ed0f [clang][CodeGen][UBSan] VLA size checking for unsigned int [...] adds 1f5dceb1d0d3 [MLGO] Add support for multiple training traces per module adds 97a5dccb7d3a [lld-macho] Rename LazySymbol to LazyArchive. NFC adds 0d1365e380b5 [libc++][test] Move iter_swap into iterator.cust.swap. NFC. adds f0b2a1a629da ASTMatchers: Avoid using SmallVector::set_size() adds d23fa4f2f131 [MLIR][SCF] Remove unused arguments to whileop adds 4d04526bf48d ADT: Avoid using SmallVector::set_size() in SmallString adds e976c457c5a3 [lld-macho] Initialize separate time trace profiler for ma [...] adds 3110060bc721 AST: Avoid using SmallVector::set_size() in UnresolvedSet adds 4d4439470eaf Support: Avoid SmallVector::set_size() in Windows code adds b0492d92adc5 Support: Avoid SmallVector::set_size() in Unix code adds 345223a7be3c Support: Extract sys::fs::readNativeFileToEOF() from MemoryBuffer adds 403772ff1ce5 [Coroutines] Enhance symmetric transfer for constant CmpInst adds bfd00ae31ea2 [lld-link] Change config and driver to unique_ptr adds bf95d5e33488 [gn build] (manually) port 85e6e748d426 (llvm/lib/Target/X86/MCA) adds 06c7bdc8f195 [lldb] Specify LLVM target requirements in TestLaunchProce [...] adds 37fc1a29cb41 [gn build] minor comment tweaks, no behavior change adds 248d55af3e44 [NFC][MLGO] Use LazyCallGraph::Node to track functions. adds 63b17eb9ec10 [RISCV] Add strictfp support for compares. adds 4a7890c67c42 [M68k][NFC] Add missing #endif comment adds 48fd67cff100 [M68k][NFC] Rename header guard of M68kSubtarget.h adds 171e4d1845a8 Update LLVM CMakeFiles to include BOLT adds 4ed8711520e5 [BOLT] README: address @apinski-cavium comment adds 876b5ea96bf5 [OpenMP][Clang] Allow passing target features in ISA trait [...] adds 65d39942dce1 [BOLT] Update README build instructions adds 96c66040125e Revert "[llvm-libtool-darwin] Print a warning if object fi [...] adds bbced7419991 [NFC] Remove invisible character in comments adds 8470bf2b0884 [AMDGPU] Do not reserve any VGPR for SGPR spills adds dc01fb1d726a [DAGCombiner][AArch64] precommit some tests for D116915 NFC adds aaa0c81683d8 [MLIR][LLVM] Add memoryeffect for alloca adds 2f8b956ab6e6 [MLIR][Math] Enable constant folding of ops adds d2c547342c6d Revert "[MLIR][Math] Enable constant folding of ops" adds 62790f366fbe [lld-macho] Try and fix map-file.s' flakiness adds 3fabda51a6d7 [JITLink] Use Section + Offset format for anon symbols in [...] adds c2ba53518f54 [ORC] Add an ostream operator for ExecutorAddrRange. adds 1f3d4525d87e [JITLink][AArch64] Use R-X permissions for the GOT. adds aad49c8eb984 [llvm-readobj][XCOFF] dump auxiliary symbols. adds fc61d07dc1e1 Add inliner interface for GPU dialect adds 99f7d55eeeec [clang][dataflow] Add transfer functions for data members [...] adds 22225cc5e665 [Coroutines] Handle lifetime markers, bitcast and unused i [...] adds c4db521cea32 [clang] Introduce support for disabling warnings in system macros adds f3e87176e1c5 [GlobalOpt] Support "stored once" optimization for differe [...] adds 47a47733f01f [GlobalStatus] Remove unused HasNonInstructionUser member (NFC) adds 5642ce5ac227 [GlobalOpt] Drop redundant setExternallyInitialized() call (NFC) adds 6c654b519835 [mlir][linalg][bufferize] Support std.select bufferization adds 42f90a28a32d [extract_symbols.py] Fix line-splitting of tool output. adds 95a436f8cca6 [X86][ABI] Pre-commit test for the f80 ABI alignment change. NFC adds 7e68061305a9 [IRBuilder] Migrate add-folding to value-based FoldAdd. adds 38e745b00623 [flang] Make the `flang` wrapper script check the Bash version adds 253ce92844f7 [JITLink][AArch64] Add support for splitting eh-frames on [...] adds 351edf1c477f [ARM] Remove FeaturePerfMon from armv7-m adds fe958b140ab3 [libc++] Quick fix to remove a narrowing conversion from t [...] adds 1bb0caf56168 [X86][MS] Change the alignment of f80 to 16 bytes on Windo [...] adds dfd9879d6f43 [Clang] Make Clang copy its CMake modules into the build dir adds 57e714bcc813 [mlir][linalg][bufferize] Add pass options for `createDeallocs` adds 612f5ed88231 [clang][CodeComplete] Perform approximate member search in bases adds 091e760cd398 [lldb] Don't print "Command Options Usage:" for an alias w [...] adds 776d0ed632d9 [flang] Fix overallocation by fir-to-llvm-ir pass adds eadb4cfeeff5 Revert (2) "[AST] Add RParen loc for decltype AutoTypeloc." adds 39385d4cd1c6 [CodeGen][Debuginfo][NFC] Refactor DIE values SizeOf metho [...] adds e3275cfa947b [BuildLibCalls] Add nounwind,willreturn to memset_pattern{ [...] adds 35cca45b09b8 Misleading bidirectional detection adds 9b43237128da [X86][LLD] Update datelayout in LLD tests. NFCI adds de05128eae69 [gn build] Port 35cca45b09b8 adds bf5f2354fa6e [NFC] [Coroutines] Add regression tests for symmetric tran [...] adds edb9175de63e [RISCV][llvm] Update CSRs adds 3fd9c90bdc04 [lldb][AArch64] Correct top nibble setting in memory tag r [...] adds 138fcc5f7619 [IRBuilder] Migrate icmp-folding to value-based FoldICmp. adds 13362abf3d66 [X86][XOP] Add tests for missing demanded elts handling fo [...] adds c2426fdcae62 [X86][XOP] Add SimplifyDemandedVectorElts handling for xop shifts adds 33efbc81842c [VP] llvm.vp.merge intrinsic and LangRef adds b5493ff571a9 [NFC] Run script to autogenerate CHECK lines for CodeGen/A [...] adds 23e8a4d16018 [UBSan] Relax test expectations in Misc/objc-cast.m test adds 6a605b97a200 [DebugInfo] Move flag for instr-ref to LLVM option, from T [...] adds 4b85800bfd6c [OpenCL] Set external linkage for block enqueue kernels adds 552eb372cb81 [LoopVectorize] Pass a vector type to isLegalMaskedGather/Scatter adds d4a8fc3a87a1 [VPlan] Introduce and use BranchOnCount VPInstruction. adds c8c3021e9fe6 Update Pietro Albini's employer adds 732ad8ea62ed [clang][auto-init] Provide __builtin_alloca*_uninitialized [...] adds 0f853930042f [MachO] Port call graph profile section and directive adds c490f8feb71e [clangd][StdSymbolMap] Prefer std::remove from algorithm adds 9a1ce35d7e7f [lldb] [Process/FreeBSD] Set current thread ID on events adds d3b90f41041c Revert "[llvm-readobj][XCOFF] dump auxiliary symbols." adds 0c8d30a30521 [X86][AVX2] Add tests for missing demanded elts handling f [...] adds de3808c8fc0e [X86][AVX2] Add SimplifyDemandedVectorElts handling for av [...] adds 6cbebfc7fb34 [clang-format] Fix comment. NFC. adds 968be05b8fdc [clang] Fix crash for sizeof on VLAs adds dcc20143e170 [clang-tidy] UseDefaultMemberInitCheck::checkDefaultInit - [...] adds 497a4b26c487 CGBuiltin - Use castAs<> instead of getAs<> to avoid deref [...] adds 6db04b97e6a2 [lld-macho] Port CallGraphSort from COFF/ELF adds d202c76441e1 [libc++] Start using `arc4random()` to implement `std::ran [...] adds d5be48c66d3e [Inline] Attempt to delete any discardable if unused functions adds 9f38a681cf25 GlobalIsel: Precommit fma combine tests with one operand f [...] adds c8c5dc766b25 GlobalIsel: Fix fma combine when one of the operands comes [...] adds 10bc3362a1a8 Revert "[LLDB][NativePDB] Add support for inlined functions" adds 3150bce0780c [NFC][MLGO] Prep a few files before the main ML Regalloc adviser adds 8fec756c0b54 [lldb] Disable one more watchpoint test on Windows adds 1773dddadf5d [MLIR][Math] Enable constant folding of ops adds 118f966b46cf [clang][#51931] Enable `-Wdeclaration-after-statement` for [...] adds 2d97f0f2efde [BOLT][TEST] Move exceptions-instrumentation.test to X86 adds f51b25a4b97a [AIX] demangle xcoff label symbol for llvm-nm adds b2d2e93138eb [NFC][MLGO] The regalloc reward is float, not int64_t adds 632c263eb302 [RISCV] Add RISCVProcFamilyEnum and add SiFive7. adds 3a32d2e74e5c [Clang][Sema] Use VersionMap from SDKSettings for remappin [...] adds fe827a93f69d [ModuleInliner] Properly delete dead functions adds c025fd8b0b79 [mlir] Update BUILD rule for MathDialect. adds a70fe03961dd [libc++] [ranges] SFINAE away ranges::cbegin(const T&&) fo [...] adds 6e77ad11ffab Add an assert in cpudispatch emit to try to track down an error. adds db08df0570b6 [ELF] Support discarding .relr.dyn adds 5014d6fc53d8 [ELF] -Map --why-extract=: print despite errors adds 8a16201a0b50 GlobalISel: Fix insert point in localizer adds bd2c01e9370e AMDGPU/GlobalISel: Do not use terminator copy before water [...] adds 22e6722632f5 AMDGPU/GlobalISel: Regenerate mir test checks adds f8476fd47b53 [llvm-ar][test] Test that --plugin is ignored adds 24e7371fef0d [llvm-ar] Enforce one-dash form for long options adds 33d008b169f3 [RISCV] Update recently ratified Zb{a,b,c,s} extensions to [...] adds 66b2ed477f90 Revert "[JITLink][AArch64] Add support for splitting eh-fr [...] adds d8b7ae947db0 [ELF][test] Temporarily remove .relr.dyn test which is not [...] adds c87e917fb23d [InstCombine] add tests for binop with phi operands; NFC adds b0a309dd7a59 [mlir][vector] Add folding for extract + extract/insert_strided adds f6fab68c3062 Fold arith.cmpf when at least one operand is known to be NaN. adds bf9c8636f2cd [ELF] Support discarding .relr.dyn adds be1aeb818cd9 Remove NaN constant from arith.minf, arith.maxf expansion adds 56f62fbf73a2 [mlir] Finish removing Identifier from the C++ API adds 6bd127b07916 [InstSimplify] use knownbits to fold more udiv/urem adds 15a78f9d09e2 [RISCV] Remove stale references to experimental-b. NFC adds ac5d32b1039b Add an example of integration test invoking MLIR source wi [...] adds 44bdcb889a14 Apply clang-tidy fixes for bugprone-macro-parentheses in I [...] adds 44bb5cd80d08 [mlir] Fix a warning adds 453a056df616 Add split-file to the MLIR test dependencies (Fix bot) adds 1f53dd1f2387 [CODE OWNERS] Add wallace as code owner adds b592cbf329ea [ELF][test] Improve discard-gnu-hash.s to check DT_HASH an [...] adds 43d927984c26 [ELF] Refactor how .gnu.hash and .hash are discarded adds fff59f48173d [clang-tidy] Improve modernize-redundant-void-arg to recog [...] adds 9dc4dea11064 Add llc to the list of build dependencies to test MLIR (Fi [...] adds a5249c2dd2bb [ELF] Change gnuHashTab/hashTab to unique_ptr. NFC adds 57092f87b233 Revert "[libc++] Temporarily disable the in_out_result tes [...] adds d1021978b8e7 Omit "clang" from CHECK lines. adds 963f40051a42 [clang][dataflow] Add transfer functions for initializers adds 7e29da875ca9 Add support for return values in bugprone-stringview-nullptr adds 669bfcf03652 [Demangle] Add minimal support for D simple basic types adds bec08795db0d [Demangle] Add support for D symbols back referencing adds b21ea1c2701d [Demangle] Add support for D types back referencing adds 6983968e833b [Demangle] Pass Ret parameter from decodeNumber by reference adds 81c330e23dd4 Filter string_view from the nullptr diagnosis of bugprone- [...] adds d4d016869d6c [mlir] Remove populateFuncOpTypeConversionPattern adds 2db4cf5962de clang support for Armv8.8/9.3 HBC adds aa1c533a4e44 [mlir][tosa] Expand tosa.apply_scale lowering for vectors adds a60e83fe7ceb [mlir][Interfaces] Add a extraSharedClassDeclaration field adds 676bfb2a226e [mlir] Refactor ShapedType into an interface adds 310e9636caeb [tosa][mlir] Support dynamic batch dimension for ops where [...] adds ba6a3972d74c [libc] add working ARM entrypoints adds e42eeb88d7b2 [NFC][libcxxabi] Rename GlobalLock to GlobalMutex adds 3601ee6cfd7f [libcxxabi] Make InitByteGlobalMutex check GetThreadID ins [...] adds 847ea7621989 [libcxxabi] Pulled guard byte code out of GuardObject adds 29be7c9c4f5d [libcxxabi] Re-organized inheritance structure to remove C [...] adds f011a53c148a [libcxxabi] Added convenience classes to cxa_guard adds 04e8c8f9973b [libc] fix strtold_test formatting on ARM adds 0998637e6fba [mlir] Add a parsePassPipeline overload that returns a new [...] adds b9499e14d24f [AArch64][GlobalISel] Re-generate checks for a test. adds 4163f61f29f4 [libc++] [ranges] Fix a missing auto(x) cast in ranges::data. adds 9be193bc58b3 [libc++] [ranges] Finish ADL-proofing ranges::data. adds 07ddfa95e3b5 GlobalISel: Add G_ASSERT_ALIGN hint instruction adds 3d2d208f6a0a IR: Make getRetAlign check callee function attributes adds ab593baa2dc1 AMDGPU: Add base test for future optimization patch adds 4515c24bbc32 AMDGPU/GlobalISel: Fix assertions on legalize queries with [...] adds 5f39a02ea950 RegScavenger: Remove used regs from scavenge candidates adds 5a16306c0944 GlobalISel: Always enable GISelKnownBits for InstructionSelect adds b9bc3c107c6c [libc++][ranges] Implement `construct_at` and `destroy{,_at}`. adds 0e811d3b66ff [flang] Fix handling of space between # and name in prepro [...] adds 4ff4e7ea3033 [CostModel] Use cost of target trunc type when only it is [...] adds 32d5634b1a2d [gn build] Port b9bc3c107c6c adds 1e36bd8516f2 [compiler-rt][darwin] check for strcmp to test interceptor [...] adds d043822daab9 [AMDGPU] Fixed physreg asm constraint parsing adds 1adeebc2cf3e AMDGPU: Fix assert on function argument as loop condition adds db57065b368a [Attributor] Use getAllocAlignment where possible [NFC] adds 8e76720cf2c0 [Attributor] Reuse object size evaluation code [NFC] adds d1f4c6a6112a [Attributor] Generalize calloc handling in heap-to-stack f [...] adds 71af8068ac12 [JITLink] Fix assert condition broken in 118e953b18ff0. adds a141e4713850 [NFC] Minimize noundef analysis when disabled adds d9b2983ea10e [bolt] Fix relative links in README adds aea27c310039 [flang] RESHAPE(PAD=) can be arbitrary array rank adds 997929970581 [Attributor] Simplify how we handle required alignment dur [...] adds 16877c5d2cd3 [RISCV] Add bfp and bfpw intrinsic in zbf extension adds 68c393c9dbe4 [BOLT] Update repo location in Dockerfile adds 55fcbf0a8489 Revert "[Inline] Attempt to delete any discardable if unus [...] adds 483f7f553652 [libc++] [ranges] Implement ranges::cdata. adds e00ac48df3a6 [ELF] Use tombstone values for discarded symbols in reloca [...] adds cd772844d8c6 [CSKY] Ensure a newline at the end of a file (NFC) adds 728c77dbb352 [Sema] Fix a bugprone argument comment (NFC) adds cb7f806a3a74 [clang] Remove redundant member initialization (NFC) adds d8716cd7d31c [CodeCompletion] (mostly) fix completion in incomplete C++ [...] adds 9c9119ab364b [clangd] Extend SymbolOrigin, stop serializing it adds cc1b9acf550d [NVPTX] Lower fp16 fminnum, fmaxnum to native on sm_80. adds bb13036483d2 [M68k][NFC] Use Register instead of unsigned int adds 7ee4236789bb [clang-format] clang-format eats space in front of attribu [...] adds 0ef5aa69e77f [JITLink] Add fixup value range check adds 159898d56827 [mlir] Add missing const to cloneWith method. adds ea9394c43c98 [NFC][AArch64][CodeGen] Add fixed-width vector tests for g [...] adds 6b22c370c823 RuntimeDyldELF: Don't abort on R_AARCH64_NONE relocation adds 54eb70886cda [clangd] Remove --inlay-hints flag adds ef1ca4d3e965 [AArch64] Fix incorrect use of MVT::getVectorNumElements i [...] adds ec0a880d5463 libclc: Add clspv64 target adds 7ce48be0fd83 [LV] Inline CreateSplatIV call for scalar VFs (NFC). adds 31009f0b5afb [CodeGen][AArch64] Ensure isSExtCheaperThanZExt returns tr [...] adds 821dd3b0e5b7 [FileCheck] Allow literal '['s before "[[var...]]" adds 97ef15ad7697 [WebAssembly] Fix reftype load/store match with idx from call adds 1cbb456123a9 [GlobalOpt] Fix global to select transform under opaque pointers adds 1e74e5e9e3b9 [lldb] [llgs] Implement qXfer:siginfo:read adds ea5ce2fc55b7 [flang][nfc] Update README.md adds 2eb7d8d74999 Simplify llvm/test/Transforms/Inline/inline_ssp.ll (NFC) adds 7c70f96a917f [ARM] fix bug causing shrinkwrapping not always being off [...] adds dca3321c73a4 [AArch64] Add a demand bits intrinsic test for instcombine [...] adds b65f21a4988d [mlir] Provide getMixedOffsets/sizes/strides as free functions adds f4139440f1cf [Docs] Fix IR and TableGen grammar inconsistencies adds 2bc57d85ebf2 Don't override __attribute__((no_stack_protector)) by inli [...] adds 37ebec68a828 [MIPS] Mips16DAGToDAGISel::selectAddr - Use cast<> instead [...] adds 4f414af6a77c Fix MSVC "32-bit shift implicitly converted to 64 bits" wa [...] adds a5507d2e253a Fix MSVC "32-bit shift implicitly converted to 64 bits" wa [...] adds 3f2fb767e33a [VPlan] Make IV operand explicit for VPWidenCanonicalIVRec [...] adds 36a549183228 [llvm-objdump][test] Add RISC-V objdump test case adds 7c5645861660 [mlir] Fix scalable type translation in splat element attr adds 4f19bb6f28d2 [X86][AVX] Add v8f32/v8i32 01289abc test case adds 61888d97f67d [AArch64] Basic demand elements for some intrinsics adds 971bd6f83440 Fix build failure with MSVC in C++20 mode adds 57a551a8dfa7 [X86][AVX] lowerShuffleAsLanePermuteAndShuffle - don't spl [...] adds a9bf32763d39 [clangd] Fix build after D115243 adds 2b2dbe6126f8 [clangd] Selection: Prune gtest TEST()s earlier adds b92102a6d79f [AArch64] Add native CPU detection for Neoverse-V1. adds 1919d2c93165 AMDGPU/GlobalISel: Regenerate fceil test (NFC) adds 235886e174d8 AMDGPU/GlobalISel: Fix custom legalizatation for fceil adds aba7c3c03386 [ConstantFold] Check uniform value in ConstantFoldLoadFromConst() adds 439560893941 [openmp] Mark used variables as retain as well adds fc7a9f36a923 [clangd] Ignore cvr-qualifiers in selection. adds 764e52f0d4b6 [DebugInfo][InstrRef] Short-circuit unnecessary preferred [...] adds cf7bfd6d059e [lldb][AArch64] Remove armv8.3-a flag from tagged memory r [...] adds edcac733dc40 [mlir] Fix reference to out of date CMake function adds a8a2ee633190 [mlir] Introduce C API for PDL dialect types adds 08edc8a74b49 [X86] Add tests showing failure to merge shuffles through [...] adds 0c6c588a9b9c [DAG] Add ISD::ROTL/ROTR to TargetLoweringBase::isBinOp adds b699e8b11aa9 Add another assert to cpu-dispatch emission to help track [...] adds 42185ad870cb [libc++] Add tests verifying alphabetical order for severa [...] adds ec5b63ba9689 [X86] Add tests showing failure to merge shuffles through [...] adds 01494c6a7318 [X86] Add tests showing failure to merge shuffles through [...] adds ccd7e7830f0c Revert "[clang][lex] Keep references to `DirectoryLookup` [...] adds fe17ce0fa662 [PowerPC] add RUN lines for both endians to test; NFC adds ba471ba8d2a3 Revert "[CodeGen][AArch64] Ensure isSExtCheaperThanZExt re [...] adds 1fa4778d03c1 [CMake] Output the error message when get_errc_messages fails adds 4eaf5846d0e7 [clang] Fix function pointer address space adds 7b9f5cbfa71f [LV] Extend check lines for pr34681.ll to cover foldable select. adds bf7d9970ba0a Support the *_WIDTH macros in limits.h and stdint.h adds 4746e38f67a9 [Libomptarget] Fix multiply defined symbol during linking adds c719a8596d01 [flang] Relax the Bash version check adds a6f49423c1ec AMDGPU: Optimize outgoing workitem ID based on reqd_work_g [...] adds 59994c25f9df AMDGPU: Select workitem ID intrinsics to 0 with req_work_g [...] adds 55029f017d80 [X86] canonicalizeShuffleWithBinOps - add X86ISD::PSHUFHW/ [...] adds 1e04923d21f8 [MachineValueType] Don't allow MVT::getVectorNumElements() [...] adds c7aa8b2962b3 [libc++][NFC] Remove duplication of distance_apriori_sentinel adds 3025c3ededf9 Replace PlatformKind with PlatformType. adds 67151d029bdb [libc++] [ranges] Implement P2415R2 owning_view. adds fc6af7e188cc [AMDGPU] Fix error handling in asm constraint syntax adds e2c78f99c419 [gn build] Port 67151d029bdb adds 08212dbc449b [X86] Add xop/avx2 shifts to X86TargetLowering::isBinOp adds fced2744d38b Fix MSVC "not all control paths return a value" warnings. NFC. adds 499703e9c08a Enable ReassociatingReshapeOpConversion with "non-identity [...] adds c0671e2c9b5c [libc++] Move assignable_sentinel to a common header where [...] adds 529f098789d3 [NFC][DFSan] Update DataFlowSanitizer user docs for -dfsan [...] adds b77d4d54f96a mlir: Avoid SmallVector::set_size in SerializeToHsacoPass: [...] adds 173fce42052d [mlir][tosa] Update default tosa-to-linalg passes adds 7690c2c76c91 [RISCV] Add tests for fixed vector mul reduction intrinsics. NFC adds cce650776722 [libc] Add rounding mode support for MPFR testing macros. adds 53cb3a7bb4a0 Revert "[compiler-rt][darwin] check for strcmp to test int [...] adds 9b85d7e166ac MC: Use SmallVector::clear() instead of set_size(0) adds bb59b38e87f8 [flang] Any type can appear in a structure constructor for [...] adds f7c589d3e74f Clarify that fold() can't "erase" an operation in the MLIR [...] adds 8cd81274ff61 [libc] Add multithreading support for exhaustive testing a [...] adds bc9c1ae1c55d ADT: Make SmallVector::set_size() private adds 52b8fe9b6e01 [mlir] Fix attaching side effects on `FlatSymbolRefAttr` adds b476039e8b90 [libc++] Refactor the tests for ranges::{advance,next,prev} adds cb5ea132d2ee [lldb] Add long help to `crashlog` adds efb8d4cff3f5 [NVPTX] Add fmin/fmax.NaN lowering for sm_80+. adds 0f6f6284d733 [lit] Make sure our test temp directory is actually used by tests adds ffee3b2f7a8e [NVPTX] Add version test for sm_75, sm_80, sm_86. adds 64da6eb06570 [Driver][Gnu] -r: imply -nostdlib like GCC adds e7b07a65388f [libc++][NFC] Add missing 'return 0' in main() functions adds 355e56f5b2c4 [libc][trivial] Make LlvmLibcExhaustiveTest::check method [...] adds 0fac3891ecd9 [X86] Fix mistake in comment on LowerFROUND. NFC adds 3d4050816905 [libc++][NFC] Fix placement of some XFAILs adds 82c8aca93488 [SimplifyCFG] Be more aggressive when sinking into block f [...] adds cd36b29ec754 [MemoryBuiltins] (Slightly) clean up abuse of MallocLike b [...] adds f14b57519427 [NFC][SCEV] Add test for umin_seq complexity ordering adds 993792bd1aff [SCEV] Don't consider umin_seq scev expr to be more comple [...] adds 71a082f72674 [clangd] Implement textDocument/typeDefinition adds c14cf92b5a1c [flang] Implement semantics for DEC STRUCTURE/RECORD adds 004acbb47d61 [clangd] Suppress warning about system_header pragma when [...] adds 07f9fb8b5141 [clangd] Elide even more checks in SelectionTree. adds bef3eb83442a [Clang][NVPTX]Add NVPTX intrinsics and builtins for CUDA P [...] adds 0bcd9f60cd0d [AMDGPU] Ensure return address is save/restored around the [...] adds 213193c184d5 [test] precommit coverage for D117249 adds 37e34b74e906 [LoopInterchange] Enable interchange with multiple outer l [...] adds f00cd23caed5 Revert "Revert "[LLDB][NativePDB] Add support for inlined [...] adds 2c0c61954173 [NFC][SCEV] Add test where it's the innermost umin_seq tha [...] adds cb6b9d3ae2cb [LoopNest] Add new utilites adds 00e0de05723a [flang] Extension: initialization of LOGICAL with INTEGER [...] adds 757e044dce51 [Inliner] Don't removeDeadConstantUsers() when checking if [...] adds d53b97959653 [openmp][devicertl] Handle missing clang_tool adds 9a0fe1b0fc23 [Inline] Attempt to delete any discardable if unused functions adds 778a264da9eb Upstream MLIR PyTACO implementation. adds bfd0cbd4eb9f Reapply 253ce92844f "[JITLink][AArch64] Add support for sp [...] adds 63a2987d5111 [flang] Allow initialization in blank COMMON adds e52f530c36e4 [mlir][sparse] fix two typos adds 8f23296bccec Apply clang-tidy fixes for llvm-header-guard in MLIR (NFC) adds 4e08ce7adb57 Revert "Upstream MLIR PyTACO implementation." adds 68874d8b5f78 [MemoryBuiltins] [NFC] Remove unused overload of isAligned [...] adds ac7a2742b2c6 Apply clang-tidy fixes for llvm-else-after-return in Commo [...] adds e4f5d4729605 Apply clang-tidy fixes for llvm-namespace-comment in Memor [...] adds 63edb563a1a1 Apply clang-tidy fixes for llvm-namespace-comment in GPUTo [...] adds b0aea1981358 Apply clang-tidy fixes for llvm-namespace-comment in Paral [...] adds ba37c3b1528d Apply clang-tidy fixes for llvm-namespace-comment in ToolU [...] adds 049ae93097c0 [lldb] Fix that the embedded Python REPL crashes if it rec [...] adds cf66f01ec138 [Attributor] Share code for abstract interpretation of all [...] adds 5d5d4d94f0c4 [Attributor] Generalize heap to stack to any allocator wit [...] adds 1661c8cfcd6b [CMake] Don't use -fno-semantic-interposition with Clang<=13 adds e289561205e8 [Driver][Fuchsia] -r: imply -nostdlib like GCC adds ee02cf079771 [MemoryBuiltins] Demote isCallocLikeFn and isAlignedAllocL [...] adds 073c27b5e585 Revert "[LV] Inline CreateSplatIV call for scalar VFs (NFC)." adds 0f500d3dae70 [flang] Downgrade benign error message to a warning adds bc56097817be [GlobalValue] Make dso_local function work with comdat nod [...] adds 1441ffe6a6da [lldb] Use __lldb_init_module instead of "if lldb.debugger" idiom adds d393ce3b3e8a [flang] Support extension intrinsic function variations on ABS adds cb71d77cc8cf [libcxx][test] Add missing includes and suppress warnings adds 83338d503242 [MemoryBuiltins] [NFC] Add missing section comments adds f52805539b29 [OMPIRBuilder] Fix store inst alignment for ordered depend [...] adds d3729bb38475 [libc++][ranges] Add ranges::in_in_result adds b8367518e795 [gn build] Port d3729bb38475 adds 4f8916cfdd94 [C++20] [Modules] Exit early if export decl is not valid adds d19f89b5d2a9 Apply clang-tidy fixes for llvm-qualified-auto to MLIR (NFC) adds 59d8740f2f76 Apply clang-tidy fixes for modernize-use-default-member-in [...] adds 9940dcfa4ac5 Apply clang-tidy fixes for modernize-use-equals-default to [...] adds bd87241c44b2 Apply clang-tidy fixes for modernize-use-override to MLIR (NFC) adds 2071e7204dda Apply clang-tidy fixes for modernize-use-using to MLIR (NFC) adds a68c8d3009b4 Apply clang-tidy fixes for performance-for-range-copy to M [...] adds 8e5f112c05a8 Apply clang-tidy fixes for performance-move-const-arg to M [...] adds e8d073951b4c Apply clang-tidy fixes for performance-unnecessary-value-p [...] adds d1b63c603aad Apply clang-tidy fixes for readability-avoid-const-params- [...] adds cac7aabbd823 Apply clang-tidy fixes for readability-identifier-naming t [...] adds 58ec17cb4ea4 Apply clang-tidy fixes for readability-simplify-boolean-ex [...] adds c386d6eb2d32 [libc] Fix precision constants for long double in MPFRUtils.cpp. adds 2291413554ff [NFC] Apply the fix for different signedness warning in Op [...] adds cf3582538872 [mlir][sparse] Moving the sort from factory method to the [...] adds b6d87773feef [libc++] LWG3171: implement operator<< for filesystem::dir [...] adds a97e20a3a8a5 Revert "GlobalISel: Add G_ASSERT_ALIGN hint instruction" adds 11067d711bca [mlir] Optimize OperationName construction and usage adds 072e2a7c67b7 [MS] Implement on-demand TLS initialization for Microsoft CXX ABI adds e68215c0c119 [Polly][CMake] Make PollyConfig.cmake relocatable like oth [...] adds 36138d825251 [NFC][msan] Declare some getShadow vars later adds 0c391133c920 Fix registers for Windows on ARM64 adds 317452551683 [RISCV] Add inline asm f32 test cases with D extension. NFC adds d72ebafda001 [RISCV] Add basic Zfh inline assembly tests. NFC adds 71a4fde39721 [NFC][msan] Init few vars later adds 7b7210291a07 [RISCV] Remove unused check prefixes. NFC adds 3e241353e1c6 [RISCV] Add more i64 splat vector test. adds 88c0e0806b36 [RISCV] Improve i64 splat vector lowering in RV32. adds b93eded7b945 [bazel] Separate capi_deps from deps in mlir_c_api_cc_library. adds dc9f18da8679 Partially revert cac7aabbd82: some APIs don't have in-tree [...] adds 18bc405a0990 [BOLT][NFC] Remove uses of `std::vector<bool>` adds d914486a9aac [BOLT][NFC] Refactor reset-release to move assignment adds 28b6e2cb3df6 [Attributor] [NFC] Use canonical variable name adds 5a68a85d859a Mark some MLIR tests as requiring the native target to be [...] adds 436d17a8e9e9 [mlir] Expose a function to get vector::CombiningKind from [...] adds 46b1e8371698 Do not build llc and mlir-cpu-runner to run MLIR tests wit [...] adds 8d20d83dd78e Fix a comment in CMake (NFC) adds 4f4340ee2af3 [NFC] [Coroutines] Refactor implementation in checkFinalSu [...] adds 47a9eb2117aa [clang-format] Fix break being added to macro define with [...] adds 3cf86c36112f Revert unrelated change from: [clang-format] Fix break bei [...] adds a0458b531cfc Add -fsanitize-address-param-retval to clang. adds 263d1986e32e [NFC][CSKY] Remove duplicate setOperationAction in CSKYTar [...] adds bba729af3ef8 [clang-check] Adjust argument adjusters for clang-check to [...] adds 8dbc6a23bb1b [CMake] Do not override user specified CMAKE_{C,CXX}_ARCHI [...] adds be219323a2fe [GlobalOpt] Add test for SRA with i8 array type (NFC) adds e7ce6acc83e1 [InstSimplify] Add test for load from undef (NFC) adds 20d9c51dc0d1 [ConstantFold] Check for uniform value before reinterpret load adds 8e5a5b619d34 [InstCombine] Fold for masked scatters to a uniform address adds 1ef9bfa0136c [InstSimplify] Pass pointer and indices separately to Simp [...] adds 717cd16e85fa [clang-format] Fix namespace end comments fixer with anony [...] adds 3dc858f9847d [LLDB] Skip TestIOHandlerPythonREPLSigint.py on Arm/Linux adds 013116cd7077 Use {LITERAL} instead of regex escaping in some lit tests. NFC. adds 350bc5683da5 [llvm-dwp] Simplify FileCheck patterns. NFC. adds cc79d603c90e [mlir] Use .empty() instead of checking size() == 0. adds ed30a968b5d6 [Verifier] Avoid asserting on invalid cleanuppad chain adds daf06590dc8f [IRBuilder] Migrate gep-folding to value-based FoldGEP. adds bea16e72a757 [mlir] Fix invalid assertion in ModuleTranslation.cpp adds 4a4a652f34d0 [RISCV][NFC] Use TableGen 'foreach' to simplify repetitive [...] adds cd3ab156a74b [clang-format] Fix typos in test. NFC. adds c86a982d7dad [SCEV] `getSequentialMinMaxExpr()`: rewrite deduplication [...] adds 96acdfa0de3e [mlir][memref] Fold copy of cast adds 713c2b47a07d [DebugInfo][DWARF][NFC] Refactor DWARFTypePrinter usages. [...] adds ab95ba704da4 [mlir][memref] Implement fast lowering of memref.copy adds 40f5f3d62dcd [mlir][linalg][bufferize] Use memref.copy instead of linalg.copy adds 1093b9f2e984 Revert "[clangd] Elide even more checks in SelectionTree." adds f3c664e5de4e [LoopVersioning] Add test case with foldable icmp in runti [...] adds 6a4957cbdff5 [clang-format] Add missing test for loops formatting. NFC. adds e58e401b7988 [mlir][memref] Fold self copies adds 1eeffcdb7a11 [mlir][linalg][bufferize] Support custom insertion point f [...] adds 1dab5f6c83a7 [LLDB][NFC] Fix a typo in comment adds 8de0c1feca28 [Clang] Add __builtin_reduce_or and __builtin_reduce_and adds 05f6e93938b7 [MLIR] NFC. affine data copy generate utility return value [...] adds f34742d7c1e7 [NFC][SCEV] Add test with umin_seq w/ 1op and constant adds 8dcba2067416 [SCEV] `getSequentialMinMaxExpr()`: relax 2-op umin_seq w/ [...] adds b32077234b1a [NFCI][SCEV] `computeExitLimitFromCondFromBinOp()`: rely o [...] adds 0af1808f9b99 [AArch64][SVE] Fix VLS mulh tests to use literal vectors adds 86bbf01d896c [llvm-profgen] CSProfileGenerator::generateLineNumBasedPro [...] adds 92ba979c2835 [llvm-profgen] Pass iteration value by reference in for-ra [...] adds 7d0ea3f41aa7 [X86] combineConcatVectorOps - fold concat(movddup(x),movd [...] adds bb3d4fa10f45 [X86] Add tests showing failure to concatenate vmovsldup o [...] adds 92f8a0f1f73b [msan] Fix typo in test from rGf6875c434ec2 adds 5726e5598104 [libc++] Modularize <chrono> adds 7d941d6d21e9 [clang][dataflow] Add transfer functions for constructors adds 765dd8b8a44c [CGBuiltin] Simplify code. NFCI. adds 538ffd4a24b4 [gn build] Port 5726e5598104 adds aa3cabe3cbe8 [mlir][memref] Fix memref.copy of scalar memref adds a8f1a715f00d [libc++] _Uglify some template parameter names. NFCI. adds 7500b4c7e418 [X86] combineConcatVectorOps - fold concat(movs*dup(x),mov [...] adds 9b72e0f9a2b9 [X86] combineConcatVectorOps - fold concat(permilpd(x),per [...] adds f4aa2a42edac [llvm-profgen] ProfiledBinary::load - use cast<> instead o [...] adds 5e4966cbae7b [LV] Add test with an integer induction based on a ptr one. adds ad643550a529 [flang] Fix a bug in the `flang` wrapper script adds e11e973e68f8 [libc] Update exhaustive testing documentations. adds 0e65d5021aa0 [LTO] runNewPMPasses - remove check for TM != nullptr as w [...] adds dac82b53e22d Revert "[MemoryBuiltins] [NFC] Add missing section comments" adds a1da73961d29 [SystemZ][z/OS] ASCII/EBCDIC support with no coexistence adds 3bbf7f5ed86f [Docs] Update opaque pointer docs (NFC) adds f417f5f4633e [InstCombine] add test for limitation of knownbits with ov [...] adds 0b2c21999571 [InstCombine] add more tests for binop with phi operands; NFC adds fc7af123ddba [AMDGPU] Pre-commit test for D116469. NFC adds 454256ef4f89 [AMDGPU] Correct the known bits calculation for MUL_I24. adds a2261e399adb [Docs] Use anonymous reference (NFC) adds ac6b4896ea91 [RISCV] Honor the VT when converting float point register [...] adds 2baa1dffd1fb [RISCV] Add basic support for matching shuffles to vslidedown.vi. adds 67076ebb606e [X86][AVX] lowerShuffleAsLanePermuteAndShuffle - don't spl [...] adds 8067ced144a2 [MLIR] Introduce generic visitors. adds 2a11fbb827c8 [libc++] [NFC] Remove a hard tab from __config. adds 63d2df003e9c [libc] Implement correctly rounded log2f based on RLIBM library. adds fa244345e1ac [libc++] [test] ASSERT_WITH_LIBRARY_INTERNAL_ALLOCATIONS i [...] adds d4cf8537489c [InstCombine] add tests for icmp with exact shift; NFC adds 02455bea6b9d [InstCombine] remove unnecessary use check on X >>exact == 0 fold adds 597b90ebacaf [libc++] Fix __simple_view concept in std::ranges adds 254302021b02 [X86] Fix -Wunused-lambda-capture adds 813156eaa96d Apply clang-tidy fixes for performance-unnecessary-value-p [...] adds 3b6943e66cf1 Apply clang-tidy fixes for performance-for-range-copy in P [...] adds 1c173c9442cf Apply clang-tidy fixes for readability-identifier-naming i [...] adds fd6ba1d2c036 Apply clang-tidy fixes for readability-container-size-empt [...] adds bdd5b9483712 [libc++][NFC] Remove clang-diagnostic-c++98-compat-extra-s [...] adds 2bcba21c8ba9 [CPU-Dispatch] Make sure Dispatch names get updated if pre [...] adds dc65c3f2ffee [flang] Allow pointers to non-sequence types in sequence types adds 8e47ccd5c26d Add new tests that check the icmp-ashr baseline. adds 42b34facfdfe Recommit "[LV] Inline CreateSplatIV call for scalar VFs." adds e43b2e4f480b [flang] "CFI" types for Fortran REAL and COMPLEX kinds 2, [...] adds 3d5b9fb3e3cd [OpenMP] Fix problems with the declare variant append_args clause adds acb8de565eaa [JumpThreading] Change asserts for WantInteger into actual checks adds f21473752bd6 [InstrProf][NFC] Do not assume size of counter type adds 0c6f76262277 [jitlink] add R_RISCV_BRANCH to jitlink adds ecd64c4e1546 [libcxx][test] Properly qualify uses of std::size_t adds cd97aaee5fef [libc++] Add missing `<cstddef>` include in span test adds 1f2cfc4fdc1e [BasicAliasAnalysis] Remove isMallocOrCallocLikeFn adds 9542c9c599d2 [libc++] Rename __i to __current_ in move_iterator. NFC. adds c09692a64420 [libc++] s/_LIBCPP_INLINE_VISIBILITY/_LIBCPP_HIDE_FROM_ABI [...] adds 0ab54c28f8b5 [libc++] Further small cleanups of move_iterator.h. NFC. adds 6ea3d9efc536 [clang-format] Fix CompactNamespaces corner case when Allo [...] adds 6cc305764f62 [libc++] [test] Add a test for proper _Uglification of tem [...] adds e0841f692017 [SelectionDAGBuilder] Remove unneeded vector bitcast from [...] adds 7af11989be21 [clang-format] Fix short functions being considered as inl [...] adds 9551fc57b7e9 Fold ashr-exact into a icmp-ugt. adds 6cacd420a1d7 Document several clang-supported builtins adds 7c269db779ff [lld-macho] Simplify DeduplicatedCStringSection::finalizeC [...] adds 69bc334be569 [mlir] Remove getNumberOfExecutions from RegionBranchOpInterface adds 3bd1ff9a2327 Fix NDEBUG unused-variable warning after 05f6e93938b73d833 [...] adds 355217722960 [NFC][msan] Reorder branches in complex if adds fa6a2876c7e4 [LoopInterchange] Enable interchange with multiple inner l [...] adds 0b442db9f62e [libc] move strdup out of requiring SCUDO adds bd0a970f5341 Comment parsing: Simplify Lexer::skipLineStartingDecoratio [...] adds 9f0fa6544012 Comment parsing: Don't recognize commands in single-line d [...] adds 650fc40b6d8d [NFC][SCEV] Introduce `getCastExpr()` QoL helper adds fb3b86fedc99 [BOLT][DWARF] Fix high pc patching adds cadc07f01f49 [flang] Legacy extension: non-character formats adds df13239c1177 [LLDB] Skip TestIOHandlerPythonREPLSigint.py on AArch64/Linux adds dc6404615d56 [NFC][msan] Add byvals tests with known issues adds dd13744bfb0a Revert "[BasicAliasAnalysis] Remove isMallocOrCallocLikeFn" adds ac4202fe9daf [flang] Signal runtime error on WRITE after ENDFILE adds 636a1cfdcdb8 [scudo] Make Scudo compile for C++20 adds c3a68c5d63c6 [SROA] Bail out on PHIs in catchswitch BBs adds ca88becc614f Regenerate some autogenerated test files ahead of modifying them. adds a4e255f9c6d4 Skip exception cleanups when the innermost scope is EHTerm [...] adds 533fbae8d8d8 [clang-format] Add experimental option to remove LLVM braces adds b77fd01a8f44 [flang] Don't blank-fill remaining lines in internal output adds 8dff860c220c [NFC] Add additional tests for icmp predicate. adds bed947f70813 [flang] Accept ENTRY names in generic interfaces adds 33315ef3216b clang/AMDGPU: Don't set implicit arg attribute to default size adds bde1032588f7 [Hexagon] Fix optimize address mode pass only handle BaseI [...] adds c34adaa3ca3a [BOLT][CMAKE] Use IN_LIST check adds 29fe14c78d04 [BOLT][NFC] Remove redundant dependent template type adds 0d3f2fd26940 Revert "Skip exception cleanups when the innermost scope i [...] adds 8faca2ed6ade [lldb] Fix platform selection on Apple Silicon adds bd859cb4def4 [flasg] Debug folding of substring references adds a10692c734fa [lldb] Only promote -Wignored-attributes to an error adds e383eaa647da [mlir][sparse] parameterize MTTKRP kernel adds 258cd02c6a7a [lldb/doc] Rephrase tutorial paragraph (NFC) adds ca2353ce5a77 Teach llvm-jitlink to support archives in inputs files and [...] adds 18e4369e195d [NFC][msan] Don't setOrigin for byval pointer adds 49597085022e [NFC][msan] Consolidate clean shadow handling adds efeb50197091 [cmake] Use `GNUInstallDirs` to support custom installation dirs. adds 0f93448235fe enable noundef analysis with -fsanitize-memory-param-retval adds a0a76fee0cf8 [RISCV] update zfh and zfhmin extention to v1.0 adds 0a46b6ec4e47 [msan] Clear byval shadow in ignored functions adds ea6c8b013e48 [BOLT][DWARF] Reduce overhead for sized dealloc adds b148348ad486 [RISCV] Add patterns for vector widening integer add/subtract adds a8ca4046e22d [LSR] Fix crash in Phi node with EHPad block adds 4cc514579f46 [NFCI][CMake] add space among flag sets in all_linker_flag [...] adds 0f499d1ed4a1 Revert "[X86][LLD] Update datelayout in LLD tests. NFCI" adds f63a805a4e99 Revert "[X86][MS] Change the alignment of f80 to 16 bytes [...] adds 21dad9a52207 [RISCV][NFC] Add IsRV64 predicate in xperm.w pattern adds a2adebf409ce workflows: Make issue-subscriber more robust for labels wi [...] adds 35d00fdc109f [msan] Reset shadow of byval before call adds 26bb1b1dab8b [RISCV] Add the zvl extension according to the v1.0 spec adds 6e52bfe09d3a Revert "[cmake] Use `GNUInstallDirs` to support custom ins [...] adds 88b05404a241 [NFC][msan] Track alignment in the test adds 122cab9b0571 [RISCV] Add test for vector extension adds 1ae1dd16cf2d [MC][PowerPC] Replace MCContext::reportFatalError calls wi [...] adds e2b66928e507 [MC][ARM] Replace MCContext::reportFatalError call with re [...] adds fdd33a0c757f [RISCV][NFC] Add a function to customLegalizeToWOp by Intrinsic adds 2e589c9c4233 [MC][ARM] Replace MCContext::reportFatalError call with re [...] adds f00a98a0a90e [RISCV] Add CSRs defined in the recently ratified Sscofpmf [...] adds 1ca79823e056 [RISCV] Add CSRs defined in the recently ratified Smstatee [...] adds 0ee679e22cfb [RISCV] Add CSRs defined in the recently ratified Sstc extension adds 349006b45238 [MC][ARC][Mips] Replace MCContext::reportFatalError calls [...] adds 8123e2ed7490 [RISCV][Clang] Add attrs to crc32_d/crc32c_d adds 59d04ce639ba [MC] Remove MCContext::reportFatalError adds be622a47ff8d [CMake] Fix compiler-rt -Wl,-z,gnu-version-script-compat w [...] adds ba3198cfd114 [IRBuilder] Migrate select-folding to value-based FoldSelect. adds 877d1b3d0770 [SelectionDAG][VP] Add splitting/widening for VP_LOAD and [...] adds de3e3fcfa3bb [BOLT][CMAKE] Accept BOLT_CLANG_EXE and BOLT_LLD_EXE adds 3ba96cb2c949 [libc++] Adds tests for LWG-3373. adds c41ca1be7dbb [X86] LowerFunnelShift - enable vXi32 handling adds e00158ed5c5d [LoopUtils] Use InstSimplifyFolder in addRuntimeChecks. adds d1675e494411 [AttrBuilder] Remove empty() / td_empty() methods adds 7fcc44bca4b8 [compiler-rt][cmake] Fix clang-cl warnings introduced in a [...] adds 5d5d806e7b95 Silence warning with MSVC. adds 64590312d4b8 [AttrBuilder] Remove non-const td_attrs() adds cba72e4ce215 [libc++] Normalize some whitespace in preparation for D116 [...] adds 5c5bde1bb6e4 [flang] Fold SCALE() adds ff85dcb1c5b0 [lldb] Remove PlatformDarwin::GetCompatibleArch helper adds a7e7f541c081 [lldb] Remove anon struct from frame-var-anon-unions test adds a6469cdbc426 [lldb] Correctly display the number of types found adds 62af3eb2599d [CMake][LLDB] Resolve install conflict when `LLDB_BUILD_FR [...] adds 8b2f33231c2a [ELF] Make some diagnostics follow the convention adds d3e49a41b197 [libc++] Add _LIBCPP_HIDE_FROM_ABI to in_in_result adds 772f7b87f8cc Disable the MLIR ExecutionEngine library when the native t [...] adds 0b010ef7b653 [lldb] Use PlatformMacOSX for Mac Catalyst adds c84b8be516bc [AArch64] clang support for Armv8.8/9.3 MOPS

No new revisions were added by this update.

Summary of changes: .github/workflows/issue-subscriber.yml | 34 +- bolt/CMakeLists.txt | 27 +- bolt/README.md | 17 +- bolt/include/bolt/Core/DebugData.h | 37 +- bolt/include/bolt/Passes/ReorderUtils.h | 2 +- bolt/include/bolt/Passes/ShrinkWrapping.h | 2 +- bolt/include/bolt/Rewrite/RewriteInstance.h | 18 +- bolt/lib/Core/DebugData.cpp | 31 +- bolt/lib/Passes/ReorderAlgorithm.cpp | 2 +- bolt/lib/Passes/ShrinkWrapping.cpp | 2 +- bolt/lib/Profile/DataAggregator.cpp | 9 +- bolt/lib/Rewrite/CMakeLists.txt | 6 +- bolt/lib/Rewrite/DWARFRewriter.cpp | 10 +- bolt/lib/Rewrite/RewriteInstance.cpp | 16 +- bolt/lib/Target/CMakeLists.txt | 6 +- bolt/test/CMakeLists.txt | 10 + bolt/test/lit.cfg.py | 4 +- bolt/test/lit.site.cfg.py.in | 2 + .../runtime/{ => X86}/Inputs/exceptions_split.cpp | 0 .../{ => X86}/exceptions-instrumentation.test | 0 bolt/utils/docker/Dockerfile | 2 +- .../clang-tidy/bugprone/StringConstructorCheck.cpp | 33 +- .../clang-tidy/bugprone/StringConstructorCheck.h | 1 + .../clang-tidy/bugprone/StringviewNullptrCheck.cpp | 295 +- clang-tools-extra/clang-tidy/misc/CMakeLists.txt | 1 + .../clang-tidy/misc/MiscTidyModule.cpp | 3 + .../clang-tidy/misc/MisleadingBidirectional.cpp | 139 + .../clang-tidy/misc/MisleadingBidirectional.h | 38 + .../clang-tidy/modernize/RedundantVoidArgCheck.cpp | 164 +- .../modernize/UseDefaultMemberInitCheck.cpp | 2 +- .../modernize/UseTrailingReturnTypeCheck.cpp | 13 +- clang-tools-extra/clangd/ClangdLSPServer.cpp | 22 +- clang-tools-extra/clangd/ClangdLSPServer.h | 5 +- clang-tools-extra/clangd/ClangdServer.cpp | 11 + clang-tools-extra/clangd/ClangdServer.h | 4 + clang-tools-extra/clangd/Diagnostics.cpp | 11 +- clang-tools-extra/clangd/Diagnostics.h | 3 +- clang-tools-extra/clangd/ParsedAST.cpp | 3 +- clang-tools-extra/clangd/Preamble.cpp | 3 +- clang-tools-extra/clangd/Selection.cpp | 39 +- clang-tools-extra/clangd/StdSymbolMap.inc | 1 - clang-tools-extra/clangd/XRefs.cpp | 180 + clang-tools-extra/clangd/XRefs.h | 6 + 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.../Analysis/CostModel/AArch64/load-to-trunc.ll | 27 + .../CostModel/AArch64/sve-insert-extract.ll | 57 + .../Analysis/CostModel/AArch64/sve-intrinsics.ll | 4 +- .../Analysis/CostModel/AMDGPU/load-to-trunc.ll | 27 + llvm/test/Analysis/CostModel/ARM/load-to-trunc.ll | 28 + .../Analysis/CostModel/PowerPC/load-to-trunc.ll | 26 + .../CostModel/RISCV/fixed-vector-gather.ll | 2 +- .../CostModel/RISCV/fixed-vector-scatter.ll | 2 +- .../test/Analysis/CostModel/RISCV/load-to-trunc.ll | 27 + .../Analysis/CostModel/SystemZ/load-to-trunc.ll | 27 + llvm/test/Analysis/CostModel/X86/load-to-trunc.ll | 28 + .../ScalarEvolution/exit-count-select-safe.ll | 130 + .../AArch64/GlobalISel/gisel-commandline-option.ll | 2 +- llvm/test/CodeGen/AArch64/O0-pipeline.ll | 1 + .../CodeGen/AArch64/aarch64-isel-csinc-type.ll | 71 + llvm/test/CodeGen/AArch64/aarch64-isel-csinc.ll | 71 + llvm/test/CodeGen/AArch64/active_lane_mask.ll | 277 ++ llvm/test/CodeGen/AArch64/arm64-ccmp.ll | 535 +++ llvm/test/CodeGen/AArch64/fast-isel-cmp-vec.ll | 69 +- .../CodeGen/AArch64/sve-fixed-length-int-mulh.ll | 670 +-- .../combine-fma-add-mul-post-legalize.mir | 4206 ++++++++++--------- .../AMDGPU/GlobalISel/combine-fma-add-mul.ll | 164 + .../GlobalISel/combine-fma-unmerge-values.mir | 413 ++ .../AMDGPU/GlobalISel/crash-stack-address-O0.ll | 25 + .../GlobalISel/extractelement-stack-lower.ll | 188 +- .../AMDGPU/GlobalISel/image-waterfall-loop-O0.ll | 165 + .../inst-select-amdgpu-atomic-cmpxchg-flat.mir | 401 +- .../inst-select-amdgpu-atomic-cmpxchg-global.mir | 1102 ++--- .../inst-select-atomic-cmpxchg-local.mir | 152 +- .../inst-select-atomic-cmpxchg-region.mir | 152 +- .../GlobalISel/inst-select-atomicrmw-add-flat.mir | 776 ++-- .../inst-select-atomicrmw-add-global.mir | 1048 ++--- .../inst-select-atomicrmw-fadd-local.mir | 91 +- .../inst-select-atomicrmw-fadd-region.mir | 91 +- .../inst-select-atomicrmw-xchg-local.mir | 66 +- .../inst-select-atomicrmw-xchg-region.mir | 66 +- .../GlobalISel/inst-select-load-atomic-flat.mir | 310 +- .../GlobalISel/inst-select-load-atomic-local.mir | 229 +- .../GlobalISel/inst-select-load-constant.mir | 914 ++-- .../AMDGPU/GlobalISel/inst-select-load-flat.mir | 1744 ++++---- .../GlobalISel/inst-select-load-global-saddr.mir | 648 +-- .../AMDGPU/GlobalISel/inst-select-load-global.mir | 2528 +++++------ .../GlobalISel/inst-select-load-global.s96.mir | 115 +- .../GlobalISel/inst-select-load-local-128.mir | 136 +- .../AMDGPU/GlobalISel/inst-select-load-local.mir | 581 +-- .../AMDGPU/GlobalISel/inst-select-load-private.mir | 415 +- .../GlobalISel/inst-select-sextload-local.mir | 67 +- .../GlobalISel/inst-select-store-atomic-flat.mir | 140 +- .../GlobalISel/inst-select-store-atomic-local.mir | 250 +- .../AMDGPU/GlobalISel/inst-select-store-flat.mir | 648 +-- .../AMDGPU/GlobalISel/inst-select-store-global.mir | 916 ++-- .../GlobalISel/inst-select-store-global.s96.mir | 115 +- .../AMDGPU/GlobalISel/inst-select-store-local.mir | 471 ++- .../GlobalISel/inst-select-store-private.mir | 221 +- .../GlobalISel/inst-select-zextload-local.mir | 67 +- .../GlobalISel/irtranslator-call-implicit-args.ll | 792 ++-- .../CodeGen/AMDGPU/GlobalISel/legalize-fceil.mir | 407 +- .../AMDGPU/GlobalISel/legalize-load-flat.mir | 24 + .../AMDGPU/GlobalISel/legalize-load-global.mir | 37 + .../llvm.amdgcn.raw.buffer.atomic.add.ll | 8 +- .../llvm.amdgcn.raw.buffer.atomic.cmpswap.ll | 8 +- .../llvm.amdgcn.raw.buffer.atomic.fadd.ll | 16 +- .../llvm.amdgcn.raw.buffer.load.format.f16.ll | 8 +- .../llvm.amdgcn.raw.buffer.load.format.ll | 4 +- .../GlobalISel/llvm.amdgcn.raw.buffer.load.ll | 24 +- .../llvm.amdgcn.raw.buffer.store.format.f16.ll | 16 +- .../llvm.amdgcn.raw.buffer.store.format.f32.ll | 8 +- .../GlobalISel/llvm.amdgcn.raw.buffer.store.ll | 24 +- .../GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll | 8 +- .../GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll | 4 +- .../llvm.amdgcn.raw.tbuffer.store.f16.ll | 24 +- .../GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll | 24 +- .../GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll | 20 +- .../AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll | 144 +- .../llvm.amdgcn.struct.buffer.atomic.add.ll | 8 +- .../llvm.amdgcn.struct.buffer.atomic.cmpswap.ll | 8 +- .../llvm.amdgcn.struct.buffer.atomic.fadd.ll | 16 +- .../llvm.amdgcn.struct.buffer.load.format.f16.ll | 8 +- .../llvm.amdgcn.struct.buffer.load.format.ll | 4 +- .../GlobalISel/llvm.amdgcn.struct.buffer.load.ll | 4 +- .../llvm.amdgcn.struct.buffer.store.format.f16.ll | 8 +- .../llvm.amdgcn.struct.buffer.store.format.f32.ll | 4 +- .../GlobalISel/llvm.amdgcn.struct.buffer.store.ll | 4 +- .../llvm.amdgcn.struct.tbuffer.load.f16.ll | 8 +- .../GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll | 4 +- .../AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll | 82 +- .../GlobalISel/localizer-wrong-insert-point.mir | 32 + llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll | 36 + .../regbankselect-amdgcn-s-buffer-load.mir | 8 +- .../regbankselect-amdgcn.image.load.1d.ll | 16 +- .../regbankselect-amdgcn.image.sample.1d.ll | 24 +- .../regbankselect-amdgcn.raw.buffer.load.ll | 12 +- .../regbankselect-amdgcn.s.buffer.load.ll | 96 +- .../regbankselect-amdgcn.struct.buffer.load.ll | 12 +- .../regbankselect-amdgcn.struct.buffer.store.ll | 12 +- .../GlobalISel/regbankselect-waterfall-agpr.mir | 8 +- llvm/test/CodeGen/AMDGPU/addrspacecast.ll | 28 +- .../CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll | 4384 ++------------------ llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll | 17 + llvm/test/CodeGen/AMDGPU/call-reqd-group-size.ll | 133 + llvm/test/CodeGen/AMDGPU/dagcombine-select.ll | 8 +- llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll | 69 +- llvm/test/CodeGen/AMDGPU/extract_vector_elt-f64.ll | 64 +- llvm/test/CodeGen/AMDGPU/extract_vector_elt-i64.ll | 78 +- .../CodeGen/AMDGPU/indirect-call-known-callees.ll | 62 +- llvm/test/CodeGen/AMDGPU/indirect-call.ll | 2 +- llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll | 20 +- llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 135 +- llvm/test/CodeGen/AMDGPU/ipra.ll | 26 + .../test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id.ll | 82 +- llvm/test/CodeGen/AMDGPU/llvm.mulo.ll | 126 +- llvm/test/CodeGen/AMDGPU/load-select-ptr.ll | 6 +- .../CodeGen/AMDGPU/loop-on-function-argument.ll | 46 + .../CodeGen/AMDGPU/reserve-vgpr-for-sgpr-spill.ll | 237 -- llvm/test/CodeGen/AMDGPU/select64.ll | 263 +- llvm/test/CodeGen/AMDGPU/selectcc.ll | 9 +- .../CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll | 341 ++ llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll | 8 +- llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll | 10 +- llvm/test/CodeGen/ARM/readcyclecounter.ll | 1 + llvm/test/CodeGen/Hexagon/addrmode-opt-assert.mir | 24 + llvm/test/CodeGen/Mips/msa/3r-s.ll | 8 +- .../CodeGen/Mips/msa/basic_operations_float.ll | 12 +- llvm/test/CodeGen/NVPTX/convert-sm80.ll | 136 + llvm/test/CodeGen/NVPTX/fminimum-fmaximum.ll | 92 + llvm/test/CodeGen/NVPTX/math-intrins.ll | 42 +- llvm/test/CodeGen/NVPTX/sm-version-20.ll | 6 - llvm/test/CodeGen/NVPTX/sm-version-21.ll | 6 - llvm/test/CodeGen/NVPTX/sm-version-30.ll | 7 - llvm/test/CodeGen/NVPTX/sm-version-32.ll | 7 - llvm/test/CodeGen/NVPTX/sm-version-35.ll | 7 - llvm/test/CodeGen/NVPTX/sm-version-37.ll | 7 - llvm/test/CodeGen/NVPTX/sm-version-50.ll | 7 - llvm/test/CodeGen/NVPTX/sm-version-52.ll | 7 - llvm/test/CodeGen/NVPTX/sm-version-53.ll | 7 - llvm/test/CodeGen/NVPTX/sm-version-60.ll | 5 - llvm/test/CodeGen/NVPTX/sm-version-61.ll | 5 - llvm/test/CodeGen/NVPTX/sm-version-62.ll | 5 - llvm/test/CodeGen/NVPTX/sm-version-70.ll | 5 - llvm/test/CodeGen/NVPTX/sm-version.ll | 65 + llvm/test/CodeGen/PowerPC/lbz-from-ld-shift.ll | 30 +- llvm/test/CodeGen/RISCV/addimm-mulimm.ll | 4 +- llvm/test/CodeGen/RISCV/attributes.ll | 46 +- llvm/test/CodeGen/RISCV/calling-conv-half.ll | 4 +- llvm/test/CodeGen/RISCV/copysign-casts.ll | 6 +- llvm/test/CodeGen/RISCV/div-by-constant.ll | 4 +- llvm/test/CodeGen/RISCV/double-fcmp-strict.ll | 1281 ++++++ llvm/test/CodeGen/RISCV/float-fcmp-strict.ll | 1249 ++++++ llvm/test/CodeGen/RISCV/half-arith-strict.ll | 4 +- llvm/test/CodeGen/RISCV/half-arith.ll | 4 +- .../CodeGen/RISCV/half-bitmanip-dagcombines.ll | 4 +- llvm/test/CodeGen/RISCV/half-br-fcmp.ll | 4 +- llvm/test/CodeGen/RISCV/half-convert-strict.ll | 8 +- llvm/test/CodeGen/RISCV/half-convert.ll | 8 +- llvm/test/CodeGen/RISCV/half-fcmp-strict.ll | 573 +++ llvm/test/CodeGen/RISCV/half-fcmp.ll | 8 +- llvm/test/CodeGen/RISCV/half-frem.ll | 4 +- llvm/test/CodeGen/RISCV/half-imm.ll | 4 +- llvm/test/CodeGen/RISCV/half-intrinsics.ll | 8 +- llvm/test/CodeGen/RISCV/half-isnan.ll | 4 +- llvm/test/CodeGen/RISCV/half-mem.ll | 4 +- llvm/test/CodeGen/RISCV/half-round-conv.ll | 4 +- llvm/test/CodeGen/RISCV/half-select-fcmp.ll | 4 +- llvm/test/CodeGen/RISCV/imm.ll | 6 +- .../CodeGen/RISCV/inline-asm-f-constraint-f.ll | 4 + .../CodeGen/RISCV/inline-asm-zfh-constraint-f.ll | 113 + llvm/test/CodeGen/RISCV/rv32zba.ll | 2 +- llvm/test/CodeGen/RISCV/rv32zbb-intrinsic.ll | 2 +- llvm/test/CodeGen/RISCV/rv32zbb-zbp.ll | 10 +- llvm/test/CodeGen/RISCV/rv32zbb.ll | 18 +- llvm/test/CodeGen/RISCV/rv32zbc-intrinsic.ll | 2 +- llvm/test/CodeGen/RISCV/rv32zbf-intrinsic.ll | 14 + llvm/test/CodeGen/RISCV/rv32zbp.ll | 8 +- llvm/test/CodeGen/RISCV/rv32zbs.ll | 14 +- llvm/test/CodeGen/RISCV/rv32zbt.ll | 8 +- .../test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll | 2 +- llvm/test/CodeGen/RISCV/rv64zba.ll | 2 +- llvm/test/CodeGen/RISCV/rv64zbb-intrinsic.ll | 2 +- llvm/test/CodeGen/RISCV/rv64zbb-zbp.ll | 2 +- llvm/test/CodeGen/RISCV/rv64zbb.ll | 2 +- llvm/test/CodeGen/RISCV/rv64zbc-intrinsic.ll | 2 +- llvm/test/CodeGen/RISCV/rv64zbf-intrinsic.ll | 25 + llvm/test/CodeGen/RISCV/rv64zbs.ll | 2 +- .../CodeGen/RISCV/rv64zfh-half-convert-strict.ll | 2 +- llvm/test/CodeGen/RISCV/rv64zfh-half-convert.ll | 2 +- .../RISCV/rv64zfh-half-intrinsics-strict.ll | 4 +- llvm/test/CodeGen/RISCV/rv64zfh-half-intrinsics.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv32.ll | 3 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv64.ll | 3 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll | 3 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll | 3 +- llvm/test/CodeGen/RISCV/rvv/fceil-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/ffloor-sdnode.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll | 8 +- .../RISCV/rvv/fixed-vectors-calling-conv.ll | 8 +- .../RISCV/rvv/fixed-vectors-extload-truncstore.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract.ll | 5 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll | 24 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll | 8 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll | 4 +- .../RISCV/rvv/fixed-vectors-int-shuffles.ll | 20 + .../RISCV/rvv/fixed-vectors-masked-gather.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-load-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-scatter.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-store-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-fp-vp.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-int.ll | 796 ++++ .../CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-store-merge-crash.ll | 2 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfadd-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfmul-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfrdiv-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfrsub-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfsub-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vpload.ll | 128 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll | 45 +- .../CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vselect.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/ftrunc-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll | 3 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv64.ll | 3 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll | 3 +- .../test/CodeGen/RISCV/rvv/legalize-load-sdnode.ll | 4 +- .../CodeGen/RISCV/rvv/legalize-store-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-load-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-store-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll | 4 +- .../RISCV/rvv/named-vector-shuffle-reverse.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/regalloc-fast-crash.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/select-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll | 2 +- .../CodeGen/RISCV/rvv/unaligned-loads-stores.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfabs-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll | 5 +- llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfclass-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfclass-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll | 5 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmin-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll | 5 +- llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll | 2 +- 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