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from 05580dd9e5a AMDGPU/GlobalISel: Define instruction mapping for @llvm.amd [...] new 47ab8607496 Add an llc testcase analogous to test/LTO/X86/strip-debug-info.ll new 00ee23b31fb [Hexagon] Add trap1 instruction
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Summary of changes: lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp | 11 +++++++++++ lib/Target/Hexagon/HexagonDepIICScalar.td | 24 +++++++++++++++++++++++ lib/Target/Hexagon/HexagonDepInstrInfo.td | 24 +++++++++++++++++++++++ lib/Target/Hexagon/HexagonDepMappings.td | 1 + test/DebugInfo/X86/strip-broken-debuginfo.ll | 22 +++++++++++++++++++++ test/MC/Hexagon/J2_trap1_dep.s | 6 ++++++ test/MC/Hexagon/instructions/system_user.s | 8 +++++++- 7 files changed, 95 insertions(+), 1 deletion(-) create mode 100644 test/DebugInfo/X86/strip-broken-debuginfo.ll create mode 100644 test/MC/Hexagon/J2_trap1_dep.s