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from 38bb96c023d [PowerPC][NFC] Fix comments for AltVSXFMARel mapping. new 02c0b2da0a4 [ARM GlobalISel] Add support for s64 G_ADD and G_SUB. new 2e84e8180ab AMDGPU: Always use s33 for global scratch wave offset new 21536fd46aa [ARM GlobalISel] Tests for s64 G_ADD and G_SUB. new 9bd1044f0ca [CodeGen] Refactor check of suitability for a jump table (NFC)
The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: include/llvm/CodeGen/TargetLowering.h | 20 +- lib/Target/AMDGPU/SIISelLowering.cpp | 8 - lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 2 +- lib/Target/ARM/ARMLegalizerInfo.cpp | 11 +- lib/Target/ARM/ARMRegisterBankInfo.cpp | 10 +- test/CodeGen/AMDGPU/bswap.ll | 8 +- .../AMDGPU/build-vector-packed-partial-undef.ll | 8 +- test/CodeGen/AMDGPU/call-argument-types.ll | 20 +- test/CodeGen/AMDGPU/call-graph-register-usage.ll | 26 +-- test/CodeGen/AMDGPU/call-preserved-registers.ll | 144 +++++++++++---- test/CodeGen/AMDGPU/call-waitcnt.ll | 33 ++-- test/CodeGen/AMDGPU/callee-frame-setup.ll | 24 +-- test/CodeGen/AMDGPU/callee-special-input-sgprs.ll | 134 ++++++-------- test/CodeGen/AMDGPU/callee-special-input-vgprs.ll | 1 - test/CodeGen/AMDGPU/chain-hi-to-lo.ll | 4 +- .../AMDGPU/cross-block-use-is-not-abi-copy.ll | 66 +++---- test/CodeGen/AMDGPU/frame-index-elimination.ll | 62 +++---- test/CodeGen/AMDGPU/function-returns.ll | 202 ++++++++++----------- test/CodeGen/AMDGPU/known-never-snan.ll | 8 +- test/CodeGen/AMDGPU/llvm.amdgcn.implicitarg.ptr.ll | 5 +- test/CodeGen/AMDGPU/load-hi16.ll | 20 +- test/CodeGen/AMDGPU/load-lo16.ll | 24 +-- test/CodeGen/AMDGPU/mubuf-legalize-operands.ll | 2 +- test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll | 2 +- test/CodeGen/AMDGPU/nested-calls.ll | 12 +- test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir | 8 +- test/CodeGen/AMDGPU/shl_add_ptr.ll | 12 +- test/CodeGen/AMDGPU/sibling-call.ll | 10 +- test/CodeGen/AMDGPU/spill-offset-calculation.ll | 12 +- test/CodeGen/AMDGPU/stack-realign.ll | 34 ++-- test/CodeGen/AMDGPU/store-hi16.ll | 28 +-- test/CodeGen/AMDGPU/wave32.ll | 12 +- .../ARM/GlobalISel/arm-legalize-binops-neon.mir | 55 ++++++ test/CodeGen/ARM/GlobalISel/select-neon.mir | 66 +++++++ test/CodeGen/MIR/AMDGPU/machine-function-info.ll | 4 +- 35 files changed, 631 insertions(+), 466 deletions(-) create mode 100644 test/CodeGen/ARM/GlobalISel/arm-legalize-binops-neon.mir create mode 100644 test/CodeGen/ARM/GlobalISel/select-neon.mir