This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allyesconfig in repository toolchain/ci/llvm-project.
from e25e3d75850 [lldb] Silent random xpass on aarch64-linux buildbot adds 869d17d851b [OpenCL] Pretty print __private addr space adds a37e958558c AMDGPU: Use correct DebugLoc adds ed9a56b0f25 AMDGPU/GlobalISel: Select some 128-bit load/stores adds e088846712a AMDGPU/GlobalISel: Fix extra result register in fdiv64 lowering adds 69d85f805a3 [MLIR][spirv] Fix links in docs after repo migration adds 3356e268f6c [OpenMP] Implementation of OMPT reduction callbacks adds 2abda66848e [NFC][DA] Remove duplicate code in checkSrcSubscript and ch [...] adds f0722333dd1 Allow newlines in AST Matchers in clang-query files adds dc2c9b0fcf2 [Matrix] Propagate and use shape info for binary operators. adds 134ef0fb4b9 [OpenCL] Fix inconsistency between opencl and c11 atomic fe [...] adds 752220ea266 [OpenCL] Fixed printing of __private in AMDGPU test adds b35c585a9a8 [ConstantRange] Respect destination bitwidth for cast results. adds 84afd9c5368 [compiler-rt] [netbsd] Add support for versioned statvfs in [...] adds 780d30660e9 [VFS] Don't run symlink test on Windows, it may pass or fail adds 3213ce966b6 TailDuplication: Clear NoPHIs property adds 8fcce5ac73d Revert "[msan] Intercept qsort, qsort_r." adds ef7a659c21f Reland "[msan] Intercept qsort, qsort_r." adds c3d3569d4ca [mlir] Convert std.and/std.or ops to spv.LogicalAnd/spv.LogicalOr adds d8018233d1e Revert "CWG2352: Allow qualification conversions during ref [...] adds 596012b2567 [mlir][spirv] Update docs regarding how to define new ops a [...] adds e8c5600de8b [PowerPC][LoopVectorize]Add floating point reg usage test adds 1d891a32cf4 Support powerpc and sparc when building without init_array. adds c3dbd782f1e Revert "[ELF] Improve the condition to create .interp" adds b30d87a90ba [mlir][spirv] Add basic definitions for supporting availability adds 9acd9544db9 AMDGPU: Use Register adds e29ae3799ba TII: Fix using Register for a subregister index argument adds e9775bb5d81 Hexagon: Fix missing tablegen mode comment adds 5ce2ca524e9 AMDGPU/GlobalISel: Use SReg_32 for readfirstlane constraining adds 33a1b3d8fce [sanitizer] Link Sanitizer-x86_64-Test-Nolibc with -static adds dce7a362bed [ELF] Improve the condition to create .interp adds a33cab0f06e AMDGPU: Adjust test so it will work with GlobalISel adds c51b45e32ef DebugInfo: Fix rangesBaseAddress DICompileUnit bitcode seri [...] adds 22f34c7f34a lld: Remove explicit copy ops from AssociatedIterator, rely [...] adds f7910496c83 [Intrinsic] Delete tablegen rules of llvm.{sig,}{setjmp,longjmp} adds 044cc919f4b Delete setjmp_undefined_for_msvc workaround after llvm.setj [...] adds 0bc7665d988 [ADT] Fix FoldingSet documentation typos adds f83a8efe879 [mlir] Merge the successor operand count into BlockOperand. adds a3f89648132 [TargetLowering] Update comment to reference the correct co [...] adds d1b51c5de7a [PowerPC] Modify the hasSideEffects of some VSX instruction [...]
No new revisions were added by this update.
Summary of changes: clang-tools-extra/clang-query/Query.cpp | 21 +- clang-tools-extra/clang-query/Query.h | 1 + clang-tools-extra/clang-query/QueryParser.cpp | 54 +++- clang-tools-extra/clang-query/tool/ClangQuery.cpp | 11 +- .../unittests/clang-query/QueryParserTest.cpp | 101 +++++++ clang/include/clang/ASTMatchers/Dynamic/Parser.h | 24 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 3 +- clang/lib/AST/TypePrinter.cpp | 2 +- clang/lib/ASTMatchers/Dynamic/Parser.cpp | 76 +++-- clang/lib/Sema/SemaChecking.cpp | 4 +- clang/lib/Sema/SemaDecl.cpp | 2 +- clang/lib/Sema/SemaExprCXX.cpp | 2 - clang/lib/Sema/SemaInit.cpp | 8 +- clang/lib/Sema/SemaOverload.cpp | 290 +++++++++--------- .../test/AST/language_address_space_attribute.cpp | 4 +- clang/test/CXX/drs/dr23xx.cpp | 33 +-- clang/test/CXX/drs/dr4xx.cpp | 11 +- clang/test/Index/opencl-types.cl | 96 +++--- clang/test/Parser/opencl-astype.cl | 2 +- clang/test/Parser/opencl-atomics-cl20.cl | 6 +- clang/test/SemaObjCXX/arc-overloading.mm | 30 -- clang/test/SemaOpenCL/access-qualifier.cl | 10 +- .../SemaOpenCL/address-spaces-conversions-cl2.0.cl | 94 +++--- clang/test/SemaOpenCL/address-spaces.cl | 144 ++++----- clang/test/SemaOpenCL/arithmetic-conversions.cl | 4 +- clang/test/SemaOpenCL/as_type.cl | 6 +- clang/test/SemaOpenCL/atomic-ops.cl | 16 +- clang/test/SemaOpenCL/cl20-device-side-enqueue.cl | 2 +- clang/test/SemaOpenCL/clk_event_t.cl | 2 +- clang/test/SemaOpenCL/event_t.cl | 4 +- clang/test/SemaOpenCL/extension-begin.cl | 2 +- clang/test/SemaOpenCL/half.cl | 12 +- clang/test/SemaOpenCL/images.cl | 18 +- .../SemaOpenCL/intel-subgroup-avc-ext-types.cl | 26 +- clang/test/SemaOpenCL/invalid-block.cl | 12 +- clang/test/SemaOpenCL/invalid-image.cl | 10 +- clang/test/SemaOpenCL/invalid-kernel-parameters.cl | 48 +-- .../test/SemaOpenCL/invalid-pipe-builtin-cl2.0.cl | 20 +- clang/test/SemaOpenCL/invalid-pipes-cl2.0.cl | 14 +- clang/test/SemaOpenCL/null_literal.cl | 4 +- clang/test/SemaOpenCL/null_queue.cl | 6 +- clang/test/SemaOpenCL/numbered-address-space.cl | 4 +- clang/test/SemaOpenCL/predefined-expr.cl | 4 +- clang/test/SemaOpenCL/queue_t_overload.cl | 4 +- clang/test/SemaOpenCL/shifts.cl | 2 +- clang/test/SemaOpenCL/to_addr_builtin.cl | 46 +-- clang/test/SemaOpenCL/vec_step.cl | 4 +- clang/test/SemaOpenCL/vector_conv_invalid.cl | 6 +- .../test/SemaOpenCLCXX/address-space-deduction.cl | 24 +- clang/test/SemaOpenCLCXX/address-space-lambda.cl | 10 +- .../test/SemaOpenCLCXX/address-space-templates.cl | 2 +- clang/test/SemaOpenCLCXX/addrspace-auto.cl | 22 +- clang/test/VFS/subframework-symlink.m | 2 +- clang/unittests/ASTMatchers/Dynamic/ParserTest.cpp | 165 +++++++++-- clang/www/cxx_dr_status.html | 4 +- clang/www/make_cxx_dr_status | 4 +- compiler-rt/lib/crt/crtbegin.c | 32 +- .../sanitizer_common_interceptors.inc | 9 +- ...sanitizer_common_interceptors_netbsd_compat.inc | 128 ++++++++ .../sanitizer_platform_limits_netbsd.cpp | 38 +++ .../sanitizer_platform_limits_netbsd.h | 3 + .../lib/sanitizer_common/tests/CMakeLists.txt | 2 +- lld/COFF/Chunks.h | 5 - llvm/include/llvm/ADT/FoldingSet.h | 10 +- llvm/include/llvm/Analysis/DependenceAnalysis.h | 6 + llvm/include/llvm/CodeGen/TargetInstrInfo.h | 2 +- llvm/include/llvm/IR/Intrinsics.td | 6 - llvm/lib/Analysis/DependenceAnalysis.cpp | 41 +-- llvm/lib/AsmParser/LLParser.cpp | 4 +- llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 2 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 1 + llvm/lib/CodeGen/IntrinsicLowering.cpp | 8 - .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 8 - llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 2 +- llvm/lib/CodeGen/TailDuplication.cpp | 5 + llvm/lib/IR/ConstantRange.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 2 +- llvm/lib/Target/AMDGPU/FLATInstructions.td | 14 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 4 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 2 +- llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 18 +- llvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td | 2 +- llvm/lib/Target/PowerPC/PPCInstrAltivec.td | 4 +- .../Transforms/Scalar/LowerMatrixIntrinsics.cpp | 76 ++++- llvm/test/Assembler/dicompileunit.ll | 4 +- .../AMDGPU/GlobalISel/inst-select-load-flat.mir | 25 +- .../AMDGPU/GlobalISel/inst-select-load-global.mir | 25 +- .../AMDGPU/GlobalISel/inst-select-store-flat.mir | 25 +- .../AMDGPU/GlobalISel/inst-select-store-global.mir | 25 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir | 72 ++--- .../regbankselect-amdgcn.ds.gws.init.mir | 4 +- .../regbankselect-amdgcn.ds.gws.sema.v.mir | 2 +- .../regbankselect-amdgcn.ds.ordered.add.mir | 4 +- .../regbankselect-amdgcn.ds.ordered.swap.mir | 4 +- .../GlobalISel/regbankselect-amdgcn.readlane.mir | 4 +- .../GlobalISel/regbankselect-amdgcn.s.sendmsg.mir | 2 +- .../regbankselect-amdgcn.s.sendmsghalt.mir | 2 +- .../GlobalISel/regbankselect-amdgcn.writelane.mir | 8 +- .../CodeGen/AMDGPU/early-tailduplicator-nophis.mir | 41 +++ llvm/test/CodeGen/AMDGPU/read_register.ll | 16 +- llvm/test/CodeGen/PowerPC/pre-inc-disable.ll | 60 ++-- llvm/test/DebugInfo/X86/range_reloc.ll | 2 +- .../Transforms/LoopVectorize/PowerPC/reg-usage.ll | 91 ++++++ .../bigger-expressions-double.ll | 31 +- .../LowerMatrixIntrinsics/propagate-forward.ll | 72 +++++ llvm/unittests/IR/ConstantRangeTest.cpp | 22 ++ llvm/utils/TableGen/IntrinsicEmitter.cpp | 28 -- mlir/docs/Dialects/SPIR-V.md | 77 ++++- mlir/include/mlir/Dialect/SPIRV/CMakeLists.txt | 16 +- mlir/include/mlir/Dialect/SPIRV/SPIRVAtomicOps.td | 7 + .../mlir/Dialect/SPIRV/SPIRVAvailability.td | 86 ++++++ mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td | 154 +++++++++- .../mlir/Dialect/SPIRV/SPIRVNonUniformOps.td | 7 + mlir/include/mlir/Dialect/SPIRV/SPIRVOps.h | 23 +- mlir/include/mlir/IR/BlockSupport.h | 2 - mlir/include/mlir/IR/Operation.h | 16 +- mlir/include/mlir/IR/UseDefLists.h | 59 +++- .../Conversion/StandardToSPIRV/StandardToSPIRV.td | 16 +- mlir/lib/Dialect/SPIRV/CMakeLists.txt | 1 + mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 8 + mlir/lib/IR/Operation.cpp | 67 +---- mlir/lib/IR/Value.cpp | 33 +++ mlir/test/CMakeLists.txt | 1 + .../Conversion/StandardToSPIRV/std-to-spirv.mlir | 40 +++ mlir/test/Dialect/CMakeLists.txt | 1 + mlir/test/Dialect/SPIRV/CMakeLists.txt | 14 + mlir/test/Dialect/SPIRV/TestAvailability.cpp | 73 +++++ mlir/test/Dialect/SPIRV/availability.mlir | 31 ++ mlir/tools/mlir-opt/CMakeLists.txt | 1 + mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp | 328 ++++++++++++++++++++- openmp/runtime/src/kmp_barrier.cpp | 14 +- openmp/runtime/src/kmp_csupport.cpp | 23 +- openmp/runtime/src/ompt-event-specific.h | 2 +- openmp/runtime/src/ompt-specific.h | 26 ++ openmp/runtime/test/ompt/callback.h | 36 +++ .../ompt/synchronization/reduction/empty_reduce.c | 38 +++ .../ompt/synchronization/reduction/tree_reduce.c | 48 +++ 138 files changed, 2729 insertions(+), 1067 deletions(-) create mode 100644 compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_ [...] create mode 100644 llvm/test/CodeGen/AMDGPU/early-tailduplicator-nophis.mir create mode 100644 mlir/include/mlir/Dialect/SPIRV/SPIRVAvailability.td create mode 100644 mlir/test/Dialect/CMakeLists.txt create mode 100644 mlir/test/Dialect/SPIRV/CMakeLists.txt create mode 100644 mlir/test/Dialect/SPIRV/TestAvailability.cpp create mode 100644 mlir/test/Dialect/SPIRV/availability.mlir create mode 100644 openmp/runtime/test/ompt/synchronization/reduction/empty_reduce.c create mode 100644 openmp/runtime/test/ompt/synchronization/reduction/tree_reduce.c