[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (e7ab36f19110 -> 413684313d9d)

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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/llvm-project.

from e7ab36f19110 Change elided large constant syntax to make it more explicit adds 67090e3446e8 [lld-macho] Implement -noall_load adds 3f38dc5c046c [lld-macho] Silence XAR deprecation warning adds 771613295d92 [docs][lli] Fix lli rst docs formatting adds 86cdff0e2123 [OpenMPOpt] Use SetVector to store list of kernels. adds a767ae2c5ce7 [RISCV] Fix incomplete asm statement parsing adds 429a717ea5ec [cmake] Move HandleOutOfTreeLLVM to common cmake utils adds ce8f365884e9 [openmp] Always pass valid triple to openmp-targets when u [...] adds 75d2fcb03fa5 [libc] Add a naming rule for global constants. adds 742bfb3581e7 [lldb] Fix LLDB_FULL_VERSION_STRING adds 058d2123792d [clang-tidy] Use literal block instead of code block (NFC) adds c7b71acef268 [AMDGPU][NFC] Add autogenerated tests for vgpr-tuple-alloc [...] adds 24bc072edb5b Fix modules build by moving implementation into .cpp file adds 4b12f4b2b1a2 Fix crash in MLIR opaque attribute parser adds fabbe8d5fdc6 [ORC] Fix typo in comment. adds d75c3e839605 [mlir] Don't print `// no predecessors` on entry blocks adds 1e09f0a97271 Preserve function argument locations. adds 10ed3c9d2ca4 [libc] Move type definitions to their own self contained h [...] adds ef95d45138ec [lld-macho] Mention string literal deduplication as a diff [...] adds b4a7559844d0 [OpenMP][FIX] Replace ICVs only with values valid at the g [...] adds dd75a6b2ae5c [DWARF][FIX] Try not to crash for nvptx with missing debug [...] adds aba5b91b699c Re-land [CodeView] Add full repro to LF_BUILDINFO record adds 1507786c2295 [LoopPeeling] Fix stale comments. NFC adds 70cef70b131e [docs] Put define DEBUG_TYPE after include directives. adds d93ffa1b37b3 [docs] Fix typo in the example code in ProgrammersManual. adds 28d718602ad2 [OpenMP] Expand short verisions of OpenMP offloading triples adds 2985d5623c88 [flang] Improve error message (initialized variable in pur [...] adds 028477758d19 [flang] Accept BOZ literals for some actual arguments adds 21c79be5d7a3 [RISCV] Add patterns to MIR sign-extension removal pass. adds e084679f961b [mlir] Make locations required when adding/creating block [...] adds bddfb81a312e [flang] Accept sparse argument keyword names for MAX/MIN adds 78649a8499a0 [flang] Accept INDEX(..., BACK=array) adds 02d9a4d56d7b [LoopPeel] Pass TripCount to computePeelCount by value ins [...] adds b6a7ae2c5ddc Optimize shift and accumulate pattern in AArch64. adds 30c17e70a4d7 [MLGO] Don't run the 'release' mode tests in non-autogener [...] adds e95ad93e6ef8 [llvm-dis] Add an option `dump-thinlto-index-only` in llvm [...] adds 70002a7a62c9 [gn build] (manually) port 30c17e70a4d7 adds 34570f4faf4c [RISCV] Add a test to show the bug in the RA caused by res [...] adds c1dd607463db [AVR][MC] Generate section '.progmemX.data' for extended f [...] adds 94173dc24cb5 [AVR] Generate ELPM for loading byte/word from extended pr [...] adds 5dea7a865e6f Combine to vpdpbusd when operand is constant and small enough. adds e39dae85f162 [mlir] Fix GCC5 build broken by improper name redefinition adds 03909c4400b5 [ELF] Remove StringRefZ adds eb675e972d74 [WebAssembly] Support Wasm EH + Wasm SjLj adds 1e447d03e2f6 [OpenMP] Introduce an environment variable to disable atom [...] adds b0789a1b12cd [OpenMP] Avoid costly shadow map traversals whenever possible adds 216ac31dd7d7 [M68k][NFC] Rename Bt(BT) to Btst(BTST) adds 6f2ee1ca5e39 [OpenMP][AMDGPU] Optimize the linked in math libraries adds 10ea7316995d [dsymutil] Don't print timestamp warning if we have no timestamp adds a7a4115bf3bc [ELF] Replace .zdebug string comparison with SHF_COMPRESSE [...] adds 9eb4939b862a [ORC] Allow JITDylib::getDFSLinkOrder and friends to fail [...] adds f8752e28fd3d [ORC] Fix missing std::move from 9eb4939b862. adds d5ae7a99d1e8 [ORC] Fix another missing std::move from 9eb4939b862. adds 8eae99dfe541 [RISCV] Add the zve extension according to the v1.0 spec adds 560eb2277bb5 [clang-format] Fix bug in parsing `operator<` with template adds 8f811effac48 [lld-macho] Fix grammar in doc adds 22ee510dac94 [Support] Remove incorrect noalias return attribute in Bum [...] adds d7bff2e9d2e4 [MemCpyOpt] Fix metadata merging during call slot optimization adds 0be3da1fab5a [RISCV] Add intrinsic for Zbt extension adds baa08d1ec3e2 [clang-tidy] Revert documentation change (NFC) adds 655a7024dbbc Reapply [MemCpyOpt] Make capture check during call slot op [...] adds 0d20407d1ac5 Reapply [MemCpyOpt] Look through pointer casts when checki [...] adds 794b1eebe749 [clang-format] Add tests for aligning `operator=` with `=d [...] adds c10c74887875 [LegalizeTypes][VP] Add widening support for vp.gather and [...] adds 6732c4389786 [llvm][AArch64] Accept armv8.8 "hbc" and "mops" in .arch_e [...] adds 7a1579ac67fd [mlir][bufferization] Move one-shot bufferization to Buffe [...] adds 96ca6d312ceb [flang][NFC] Fix header guard adds 60b6e73769f8 [RISCV] Imply extensions in RISCVTargetInfo::initFeatureMap adds 67d483aba23c [libcxx][test] Use TEST_HAS_BUILTIN in test code adds 90efbe697a39 [flang][NFC] Fix header guard and comment adds 782c0dd1a1c2 [IRBuilder] Migrate and-folding to value-based FoldAnd. adds 585abe3ba506 [lldb] Rename MemoryTagManager RemoveNonAddressBits to Rem [...] adds 787f91b0bb34 [lldb] Remove non-address bits from addresses given to mem [...] adds 770353cd94f8 [MLIR] The return type in the `computeSingleVarRepr` funct [...] adds 5a12024b95e4 [RISCV] Optimize lowering of floating-point -0.0 adds d4a6bf4d1a91 Revert "[AArch64][SVE][VLS] Move extends into arguments of [...] adds ca36cc56ac6c [RISCV] Match RVV VF variants also through masked operations adds 911c1370546f [flang][NFC] Cleanup dependent dialects and make def homogenous adds ccaaeca9106d [flang][NFC] Move current inliner files in Dialect directory adds 847bb26820b1 [AMDGPU] Regenerate some MIR checks adds c4f5fd76da93 [X86] combineConcatVectorOps - add handling for X86ISD::VS [...] adds 304cfc706ad4 [X86] combineConcatVectorOps - remove superfluous Subtarge [...] adds 69ecd2484f0d [clang-format] Indicate source location on test failure. NFC. adds d8b690409dae [AMDGPU] Set MemoryVT for truncstores in tblgen. adds 19b9cd4eae6f [MC] Add a disassembly test for Armv8-R sysregs. adds a4ac40e92f71 [AArch64] Remove PRBAR0_ELn and PRLAR0_ELn sysregs. adds 67aa314bcee7 [IRGen] Do not overwrite existing attributes in CGCall. adds 60147c6034e3 [EarlyCSE] Regenerate test checks (NFC) adds 35737df4dcd2 [Clang][AArch64][ARM] Unaligned Access Warning Added adds 010a10b73891 [flang][NFC] Remove extra braces adds c95cb4de1b66 [clang][dataflow] Intersect ExprToLoc when joining environments adds 6d45284618f0 [mlir][memref] Add better support for identity layouts in [...] adds 9e24d14ac89f [llvm][vfs] NFC: Virtualize in-memory `getStatus` adds 9011903e3613 [llvm][vfs] Abstract in-memory node creation adds 14c5fd920b0e [Clang][RISCV] Change TARGET_BUILTIN to require zve32x for [...] adds 4130357f96bf [X86] Fix v16f32 ADDSUB test adds 81d35f27ddec [DebugInstrRef] Memoize variable order during sorting (NFC) adds f29256a64ac1 [MLGO] Improved support for AOT cross-targeting scenarios adds 866311e71c8f [X86] lowerToAddSubOrFMAddSub - lower 512-bit ADDSUB patte [...] adds 0f283de9d195 [InstSimplify] Add test for reinterpret load of pointer ty [...] adds 3da69fb5a26c [Clang][AArch64][ARM] Unaligned Access Test Fix adds 805bc2486867 [InstSimplify] Add test for load of non-integral pointer (NFC) adds 91eca967b9eb [gn build] (manually) port f29256a64a adds 616f77172f0a [OpenMPIRBuilder] Detect and fix ambiguous InsertPoints fo [...] adds 3c422cbe6b7e [SLP] Add an asser to make a non-obvious precondition clear [NFC] adds 54ba376d0802 Add missing include to fix modular build adds c0957bd61794 Add missing include to fix modular build adds 990bab89fff7 [ScalableVectors] Warn instead of error for invalid size r [...] adds c43ebae838de [SLP] Reduce nesting depth in calculateDependencies via fo [...] adds c104fca36b96 {SLP] Delete dead code in favor of proper assert [NFC] adds fabf1de13202 [FuncSpec] Add a reference, and some other clarifying comm [...] adds 283f5a198a0e [GlobalISel] Fix incorrect sign extension when combining G [...] adds ee198df2e14c [mips] Improve vr4300 mulmul bugfix pass adds 89c447e4e6b5 AMDGPU: Stop reserving 36-bytes before kernel arguments fo [...] adds 8ff3c9e0be7a AMDGPU/GlobalISel: Fix selection of gfx90a FP atomics adds be7e938e2712 AMDGPU/GlobalISel: Stop handling llvm.amdgcn.buffer.atomic.fadd adds 75017db08cd3 [RISCV] Add tests for commuted vector/scalar VP patterns adds 81cbbe3e17a4 [flang][NFC] Remove unused/duplicated kStridePosInDim adds 191a6e9dfa1a optimize icmp-ugt-ashr adds feddf1150227 [lld][WebAssemlby] Convert test to check disassembly output. NFC adds 1455eddcf71d [NFC][SimplifyCFG] Add some tests for `invoke` merging adds 48224475222d [libc++] basic_string::resize_and_overwrite: Adopt LWG3645 [...] adds 2e49e0cfde43 AMDGPU/GlobalISel: Directly diagnose return value use for [...] adds c0f9592daae3 add tsan shared library adds 08549ba51e11 AMDGPU/GlobalISel: Explicitly set -global-isel-abort in fa [...] adds 2d1f9aa27dc4 AMDGPU/GlobalISel: Regenerate test checks with -NEXT adds 064cea9c9a02 AMDGPU/GlobalISel: Try to use s_and_b64 in ptrmask selection adds 237502c1a478 AMDGPU: Fix asm in test using wrong IR type for physical register adds 5af2433e1794 [clang-cl] Support the /HOTPATCH flag adds 5abf11632245 [mlir][vector] Allow values outside of [0; dim-size] in cr [...] adds af5600420b93 [OpenMP] Don't pass empty files to nvlink adds aad04534c419 [libc] Implement correct rounding with all rounding modes [...] adds b80db150cdba Add `isConsteval` matcher adds eb6c6e60585d [NFC][InstCombine] Add test showing failure to sink into ` [...] adds 9abc593e9889 [TargetLowering][InstCombine] Simplify BSwap demanded bits [...] adds b58cc9fb2348 [NFC][RISCV] Add end-of-line symbol in target-feature testcases adds 587dccfb1238 [InstCombine] avoid 'tmp' usage in test files; NFC adds 2d031ec5e53f [InstCombine] add one-use check to opposite shift folds adds c65186c89f35 [clang] Improve -Wdeclaration-after-statement adds df31ff1b29bc [cmake] Make include(GNUInstallDirs) always below project(..) adds 792853cb786b [SystemZ] Remove the ManipulatesSP flag from backend (NFC). adds 5fa4cf82dfa0 [Clang] Separate the 'debug-info-hotpatch' test in two par [...] adds 94a0660c14da [AMDGPU] Regenerate remat-vop.mir. NFC. adds 493c85648401 [clang][NFC] Small mangler cleanups adds 6b92bb47901f [Support] [DebugInfo] Lazily create cache dir. adds 94e69fbb4f3a [RISCV] Add DAG combine to fold (fp_to_int_sat (ffloor X)) [...] adds 63a991d03589 [libc++] Eliminate the `__function_like` helper. adds ba8eb31bd954 [InstCombine] Instruction sinking: fix check for function [...] adds 8105e404f186 [demangler][NFC] Small cleanups and sync adds 864b5b49fd3f [libcxx] chrono::month_weekday should not be default const [...] adds 57ebfea38c03 [lldb] Surround LLDB_API-defining code with #ifndef LLDB_API adds 83d59e05b201 Re-land [LLD] Remove global state in lldCommon adds d4baf3b1322b [libc] Use get_round() instead of floating point tricks in [...] adds 8b4fa2c98e07 clang: Auto-cleanup left-over file from before 3da69fb5a26 [...] adds 9122b5072aa7 [llvm] Remove an old bot cleanup command adds 608a9c0e7909 [gn build] Port 63a991d03589 adds 14a296469864 [gn build] Port 83d59e05b201 adds 860038e0d775 [SLP] Rename a couple lambdas to be more clearly separate [...] adds 82452be5cbd7 [clang-format] Refactor: add FormatToken::hasWhitespaceBef [...] adds f84023a812b6 [lld][macho] Stop grouping symbols by sections in mapfile. adds b8d38e8b4fca [libcxx][test] view_interface need not derive from view_base adds d0cace508714 [mlir][pdl] Some ops are missing `NoSideEffect` adds 7c471b56f2c2 [mlir][pdl] OperationOp should not be side-effect free adds e99835ffedc2 [mlir][pdl] Make `pdl` the default dialect when parsing/printing adds 7a275dc35411 [RISCV] Remove Zvlsseg extension. adds 118babe67adf [SLP] Use for loops for walking bundle elements adds 40aef79db0b0 [MLIR][GPU] Add debug output to enable dumping GPU assembly adds dd7b69a61fa3 [RISCV] Remove HadStdExtV and HasStdZve* Predicates from t [...] adds 4c1dc65015ae [InstCombine] add/adjust tests for multiply with extended [...] adds a7a2860d0eee [InstCombine] convert mul with sexted bool and constant to select adds 60f61918795b [SLP] Extract formBundle helper for readability [NFC] adds 5ef7abbc6f99 [mlir:TiingInterface] Remove unnecessary include of Tensor.h adds 1f3f90ab8869 [libc] Make log2f correctly rounded for all rounding modes [...] adds 8c9f62ea90c7 [compiler-rt][cmake] Use HandleOutOfTreeLLVM like libcxx a [...] adds 4af11272f57a [cmake] Duplicate `{llvm,compiler_rt}_check_linker_flag` f [...] adds 36cb29cbbe1b Work around a module build failure on the bots. adds 5a670f1378ae [SLP] Kill an unused param and use a for-loop in calculate [...] adds 41ebd1968165 [AMDGPU] Do not ignore exec use where exec is read as data adds c0906f6b21a1 [SLP] Remove stray semicolon to make bots happy adds 1d4ca42b4380 [OpenMPIRBuilder] Detect ambiguous InsertPoints for apply* [...] adds 39f779afb354 [clang-tidy][NFC] Remove redundant string creation for comparison adds c95afac89e00 [clang-format][NFC] Clean up tryMergeLessLess() adds cd2d7369639e [mlir][tosa] Limit right-shift to 31 bits adds fa8bb224661d [RISCV] Optimize vector_shuffles that are interleaving the [...] adds 284cd693f1c6 [libc] Move the remaining public types to their own type headers. adds 5e88f527da21 [RISCV] Remove RISCVSubtarget::hasStdExtV() and hasStdExtZ [...] adds a5684114445a [clang-tidy] Update bugprone-stringview-nullptr to consist [...] adds 8457b61699e8 [test] Add tests for bswap combining. NFC adds ac2f3df8396a [lld][WebAssembly] Remove redundant config setting adds d92e5412ea57 [libc] Use __builtin_clz to find leading 1 in hypot adds 5501c16edf0f [flang] Fix OPEN/WRITE(SIGN='SUPPRESS') adds 9ddd07922f65 [flang] Handle FLUSH(unknown unit) adds e1b7bd911d9e [OpenCL] opencl-c.h: add __opencl_c_images and __opencl_c [...] adds d3b188a2d72f [clang-tidy] Include constructor initializers in `bugprone [...] adds 7bf9065ad7d9 [Attributor][NFC] Clang format adds 37e0c58559ad [Attributor][FIX] AAValueConstantRange should not loop unc [...] adds 1d7604fdcebd [InstCombine] Simplify bswap -> shift adds cfae2c65dbbe [RISCV] Factor Zve32 support into RISCVSubtarget::getMaxEL [...] adds 922c29ccf143 [flang] Allow explicit '+' in NAMELIST input subscripts adds d1123e36922d [flang] Extension: skip over NAMELIST groups adds ad06e65dc4da [RISCV] Fix the bug in the register allocator caused by re [...] adds f811cb82a6cd [lldb] Revive lldb-instr adds 1755f5b1d7b7 [lldb] Decouple instrumentation from the reproducers adds 156b997251db [lldb] Instrument SB API with signposts adds 0dfe953294ba [OpenMP] Change default visibility to protected for device [...] adds 26feef084616 [Libomptarget] Change visibility to hidden for device RTL adds 58580e922a69 [llvm][cmake] Make `llvm_install_symlink` robust to absolu [...] adds a65934241c22 [gn build] Port 1755f5b1d7b7 adds cac164ff9cb6 [lldb] Update the modulemap adds d93a11c138bb Revert "[llvm][cmake] Make `llvm_install_symlink` robust t [...] adds 82af95029ec9 [X86] Enable ibt-seal optimization when LTO is used in Kernel adds 7ee1c162cc53 [RISCV][RFC] add inst support of zbkb adds 7b3d30728816 [RISCV] Add isel patterns for grevi, shfli, and unshfli to [...] adds 26167cae4515 Print the `// ----` separator between modules when using - [...] adds 308d8b8c6618 [mlir][python] 8b/16b DenseIntElements access adds 9006bf424847 Remove obsolete `getAsmResultNames` from OpAsmDialectInterface adds a7f8aea71485 [clang-tidy] Fix wrong FixIt in performance-move-const-arg adds 82bb8a588dde [CSKY] Add codegen support of GlobalTLSAddress lowering adds 8def89b5dc82 [RISCV] Set CostPerUse to 1 iff RVC is enabled adds 75184f14aecd [DebugInfo] Fix handling '# line "file"' for DWARFv5 adds 86b08ed6bb16 [DebugInfo][NFC] Do not call 'isRootFile' for DWARF Version < 5 adds 7f0f4cab18a9 [libc][NFC] Add 'struct_' prefix to type headers defining [...] adds e6de53b4de4a [RISCV] Bump rvv-related extensions from 0.10 to 1.0 adds a99e06aa869b [mlir][Linalg] Avoid generating illegal operations during [...] adds 05cd9a0596d8 [ConstantFold] Simplify type check in reinterpret load fol [...] adds 6a19cb837c9b [ConstantFold] Support pointers in reinterpret load folding adds 7950010e4983 [VE][NFC] Factor out helper functions adds 3f9d1f516e19 [InstSimplify] Add tests for reinterpret load of floats (NFC) adds b4900296e4a5 [ConstantFold] Allow all float types in reinterpret load folding adds 99b5a8049be4 Match bazel config with cmake after f29256a64 adds 69825f369302 [fir] Add array operations documentation adds d03c5bc8d437 [mlir] Fully qualify return types in OpAsmInterface.td and [...] adds a2f6921ef2a1 [llvm] Remove unused headers in LLVMDemangle adds c0cf209076a2 [VPlan] Add VPWidenIntOrFpInductionRecipe::isCanonical, us [...] adds 55689904d2e5 [VPlan] Move ::isCanonical outside ifdef. adds 1f9e18b6565f [llvm] Remove (some) LLVMDemangle header dependencies adds e7762653d3b0 [Attributor] Avoid some pointer element type accesses adds 065044c443f4 Fix 1f9e18b6565fd1bb69c4b649b9efd3467b3c7c7d adds 329feeb938ac [ORC][docs] Describe removing JITDylibs, using custom prog [...] adds b351ac3873db [AMDGPU][NFC] Regenerate InstCombine test adds 0530fdbbbb84 [AMDGPU] Fix LOD bias in A16 combine adds 603d18033c51 [AMDGPU][InstCombine] Remove zero LOD bias adds ae2f9c8be897 [AMDGPU] Remove lz and nomip combine from codegen adds f53d359816e6 Fix 1f9e18b6565fd1bb69c4b649b9efd3467b3c7c7d adds 9c5b856dac5c [CoroSplit] Avoid pointer element type accesses adds 0ca426d6ac65 [llvm-mca] Improve barriers for strict region marking (PR52198) adds bfbdb5e43e50 [Coroutines] Avoid some pointer element type accesses adds 597eae998a87 [clangd][Background] Make index validation logs verbose adds b6a41fddcfd3 [DWARF][DebugInfo] Fix off-by-one error in size of DW_TAG_ [...] adds 357f2d9ccf20 [mlir][LangRef] Add top-level production to the MLIR grammar adds 4d268dc94a6b [RISCV] Enable CGP to sink splat operands of VP intrinsics adds 825a3cd6b697 [clangd] Fail inlayHints requests on content changes adds 4727d29d908f [X86] Remove __builtin_ia32_pabs intrinsics and use generi [...] adds ced077e1ba52 [clang][deps] NFC: Simplify handling of cached FS errors adds 5daeada33051 [clang][deps] Ensure filesystem cache consistency adds 8cc2a1372704 [clang][deps] Handle symlinks in minimizing FS adds 68db0e25df4b [flang] Update tco tool pipline and add translation to LLVM IR adds 8ee135dcf8ff [X86] Remove `__builtin_ia32_pmax/min` intrinsics and use [...] adds 3ef88b31843e Revert rG8ee135dcf8ff060656ad481c3e980fe8763576f5 "[X86] R [...] adds 0abaf6458092 Revert rG4727d29d908f9dd608dd97a58c0af1ad579fd3ca "[X86] R [...] adds 75e164f61d39 [llvm] Cleanup header dependencies in ADT and Support adds 2b8e4c6e5fbd Add missing header in Support/ConvertUTF.h adds 38ac4093d9d2 [NFCI][Support] Avoid ASSERT_/EXPECT_TRUE(A <op> B) adds 51c53a0791cd Add apple-specific missing include adds 2a9e33db4f0a Add ms-specific missing header in Support/InitLLVM.cpp adds 622354a52207 [llvm][ADT] Implement `BitVector::{pop_,}back` adds 7e3bcae5069f Add apple-specific missing header in Support/GraphWriter.cpp adds d5ae039ed7b8 [SystemZ] Properly register machine passes. adds e9211e039377 Remove dependency from raw_ostream on <chrono> adds ad43217a0466 [InstCombine] Fold for masked gather when loading the same [...] adds 4d82ae67b208 Add security group 2021 transparency report. adds b8102449a72c [clang-tidy] Avoid binding nullptr to a reference adds e5fd3a7df917 Try to unbreak build on Windows after e9211e03937 adds 8bc661894299 Add missing llvm/support/Regex.h include in polly/lib/Anal [...] adds 3c9e3dada916 Try to unbreak build on Windows more after e9211e03937 adds 9900acacfb3f [libcxx][doc][nfc] Fixed typo in doc adds 9d3437fbf341 [ADT] [NFC] Add StringRef::detectEOL adds 5597ec2dc4f8 Include missing "llvm/Support/Path.h" in "flang/lib/Fronte [...] adds f24fe96f469b [ifs] Use a tmp file instead of "-" adds cab961693802 [libc++] Use addressof in unordered_map. adds b7fd91c84b4e Upstream MLIR PyTACO implementation. adds e4a556268ea9 Revert "[libc++] Use addressof in unordered_map." adds 23a7bb541dae [clang-format] Fix comment in spaceRequiredBefore. NFC. adds 565963841880 Revert "[compiler-rt][cmake] Use HandleOutOfTreeLLVM like [...] adds 26cbc430197a [flang] Remove target and require shell adds 10e5c513b59b Revert "[cmake] Duplicate `{llvm,compiler_rt}_check_linker [...] adds 5061eb6b0121 [Sparc] Don't define __sparcv9 and __sparcv9__ when targeting V8+ adds e6ceec9c1d19 [Clang][RISCV] Restrict rvv builtins with zve macros adds 754d6af7c359 [NFC] Improve code reuse. adds 11754a4dbbad [RISCV] Use RVBUnary in more places to simplify some table [...] adds 4710750854ce [mlir][spirv] Support size-1 vector inserts during conversion adds fd0c6f53913f [mlir] Move linalg::PadTensorOp to tensor::PadOp. adds 3c90ae5d0b71 Revert "[flang] Update tco tool pipline and add translatio [...] adds 48132bb1e437 [RISCV] Simplify interface to combineMUL_VLToVWMUL. NFC adds d6e2c95d2252 [libc++] Use addressof in unordered_map. adds 4d0a18d06e8e [mlir][sparse] Adding assertions for overhead storage types adds cb8b94f6efa9 [AArch64] Add extra tests useful in testing hadd. NFC adds f18fcdabda72 [BOLT][NFC] Expand auto types pt.2 adds 5a654b01133f [BOLT] Make ICP target selection (more) deterministic adds f8c7fb499be6 [BOLT][NFC] Reduce includes with include-what-you-use adds 2f9f9afa4e12 [mlir] Add polynomial approximation for atan and atan2 adds 0d9cc6995401 [Support] Update missed tests with lazy caching behavior. adds cd4e600f5f5c [Sema] Warn about printf %n on Android and Fuchsia adds 0379459fc586 [RISCV] Strengthen a SDTypeProfile. Fix formatting. adds 4f8ea3c84f3d [SystemZ][z/OS][NFC] Remove extra symbol adds d84d1135d80c Emit swift5 reflection section data in dsym bundle generat [...] adds 9f4cc5a6bb56 [gn build] Set HAVE_MALLINFO2=1 adds 6103b2d45bfb Revert "Emit swift5 reflection section data in dsym bundle [...] adds e39c262979e6 Revert "[gn build] Set HAVE_MALLINFO2=1" adds 705d8c49f9be [x86] regenerate smul-with-overflow.ll; add test which fai [...] adds 6df05697ca1d [gn build] Set HAVE_MALLINFO2=1 adds 653b007dc186 [CodeComplete] fix nullptr crash in 612f5ed8823120 adds b796709a62da Only run MLIR PyTACO tests when python bindings are enabled. adds ba093fe58b15 Fix a commit. adds 6ba1fb04214b [llvm-pdbutil] Fix gaps ouput. adds 58ee14e29e98 [lldb] Fix timer logging inverted quiet condition adds efa15f417847 [mlir][sparse] add ability for sparse tensor output adds 10d0d8c0c1db [clang][cmake] Use `GNUInstallDirs` to support custom inst [...] adds 1613f8b8d7d5 NFC (build fix): Add header for llvm::errs(). adds 08574ce4d625 [mlir][tosa] Add clamp + clamp as single clamp canonicalization adds 13fa17db3a72 [split-file] Respect input file's line endings adds 4f547ee8b8a7 [libc++][test] Add const and reference tests for enable_vi [...] adds 9cddfe3085c4 [CMake] Passthrough OSX CMake options to builtins and runtimes adds e6cdef187ed3 [XRay][test] Clean up llc RUN lines adds 04eb93b1d559 [flang] Fix repeated "DT" editing adds db07e082abaf [TSan] Omit vfork interceptor iOS simulator runtime adds 3726626a26ec [flang] Fix crash from USE-associated defined I/O subprograms adds b95150418fb6 [lldb] Allow aliases to aliases of raw input commands adds e796eaf2af65 [RISCV][RFC] add MC support for zbkc subextension adds b1856009fbc1 [flang] Allow INQUIRE() on a child unit in user-defined I/ [...] adds 55d887b83364 [time-trace] Add optimizer and codegen regions to NPM adds b6098c07cb20 [MLIR] Fix negative gcd in `normalizeDivisionByGCD` function. adds de8723829515 [JITLink] Add anonymous symbols in LinkGraph for unnamed t [...] adds fdb6578514dd Revert "[JITLink] Add anonymous symbols in LinkGraph for u [...] adds f7d4cafe5a6a [JITLink][RISCV] Support R_RISCV_SET* and R_RISCV_32_PCREL [...] adds 26544b98f7bf [libc++] Use addressof in unordered_set. adds 4041354b4c12 [mlir] Add SingleBlockImplicitTerminator<"tensor::YieldOp" [...] adds 93deac2e2ba9 [AArch64] Optimize add/sub with immediate through MIPeepholeOpt adds 0283b07746e8 reapply de872382951 "[JITLink] Add anonymous symbols in Li [...] adds b27e5459d51f [DAG] Convert truncstore(extend(x)) back to store(x) adds 8dedf9b58bff [PowerPC] Change CTR clobber estimation for 128-bit floati [...] adds 00d68c3824bf [PowerPC] Support parsing GNU attributes in MC adds 5f2854f1daa7 [LV] Always create VPWidenCanonicalIVRecipe, optimize away later. adds 26fffc1b8e75 [libc++] [test] {cpo,niebloid}.compile.pass.cpp: Also test [...] adds e9d0f8baf236 [flang] Don't drop format string for external child I/O adds 896a543e72fd [flang] Support DECIMAL='COMMA' mode in namelist I/O adds 0a6b4258ab0e [openmp][cmake] Use `GNUInstallDirs` to support custom ins [...] adds d44b6be6eaa8 [RISCV] Don't Custom legalize f16/f32/f64 bitcasts if thos [...] adds 39e602b6c433 [InstCombine] try to fold binop with phi operands adds 7c16647c3676 [clang-tools-extra][cmake] Use `GNUInstallDirs` to support [...] adds c1988dbf2d19 [openmp] Allow x87 fp functions only in Openmp runtime for x86. adds b8467952404c [docs] [clang] Small documentation change for compilation [...] adds 37d1d02200b9 [X86][MS] Change the alignment of f80 to 16 bytes on Windo [...] adds 2513b7903063 [libc++] Implement LWG3549: view_interface need not inheri [...] adds 3cf15af2daa9 [RISCV] Remove experimental prefix from rvv-related extensions. adds 85e42db1b6db [RISCV] Merge some rvv intrinsic test cases that only diff [...] adds be6070c290e2 [RISCV] Use FP ABI for some RVV intrinsic tests. NFC adds 3dc6fd515135 [llvm-objcopy][MachO] Implement --update-section adds a4f202549208 [X86] Regenerate avx512-mask-op.ll adds ff05b93a02d1 [llvm-objdump] Use cast<> instead of dyn_cast<> to avoid d [...] adds 20d46fbd4a51 [CodeGenPrepare] Use dyn_cast result to check for null pointers adds 946f29028e06 [llvm-objdump] Use cast<> instead of dyn_cast<> to avoid d [...] adds 86497026a266 [clang-tidy] Use cast<>/castAs<> instead of dyn_cast<>/get [...] adds df0fd1c301d6 [clangd] Use castAs<> instead of getAs<> to avoid derefere [...] adds c93491352cf3 [lldb] CxxModuleHandler - use cast<> instead of dyn_cast<> [...] adds d7aa402b4b8a [lldb] PdbAstBuilder - use cast<> instead of dyn_cast<> to [...] adds d13847bbe5e6 [lldb] TerminalState::Save - fix unused variable warning adds 49d38b1d618c Fix "not all control paths return a value" warning. NFC. adds 938944445a1b [libc++] Mark LWG3541 as "Complete". NFC. adds 5d78fef6db15 [libc++] Fix LWG3437 "__cpp_lib_polymorphic_allocator is i [...] adds d4ed3eff9f9c [X86] Add vector signbit parity checks for non-popcnt targets adds eb3f20e8fa4b [clang-tidy] Remove gsl::at suggestion from cppcoreguideli [...] adds 153359180a9d [AVR] Remove regalloc workaround for LDDWRdPtrQ adds 116ab78694dd [AVR] Make use of the constant value 0 in R1 adds 7c66aaddb128 [DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everyth [...] adds 2e26633af0c8 [IR] document and update ctlz/cttz intrinsics to optionall [...] adds d2e8fb331835 [clang-tidy] Add readability-duplicate-include check adds 6605057992b1 Revert rG7c66aaddb128dc0f342830c1efaeb7a278bfc48c "[DAG] F [...] adds 631f3e621586 [gn build] Port d2e8fb331835 adds accc07e65465 [DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everyth [...] adds 0b799791807e [RISCV] Merge some rvv intrinsic test cases that only diff [...] adds f69379d0a43b [InstCombine] Add test coverage for PR48683 adds 818cfb10c574 [libcxx][test] Make MSVC `<charconv>` test compile when te [...] adds 8e382ae91b97 [Support] Simplify parallelForEach{,N} adds 1a5dea9e2b97 [NewGVN][NFC] precommit tests for PR53277 adds 7a29b0b58383 [llvm] Fix header guards (NFC) adds abb0ed44957c [Commands] Remove redundant member initialization (NFC) adds f8ddcb413125 [Object] Remove a redundant return statement (NFC) adds ad36f37ce2b4 [MLIR][Presburger] Clean PresburgerSet identifier interfac [...] adds 413684313d9d [RISCV] Adjust the header comment in RISCVInstrInfoZb.td t [...]

No new revisions were added by this update.

Summary of changes: bolt/include/bolt/Core/BinaryContext.h | 3 +- bolt/include/bolt/Core/BinaryData.h | 1 - bolt/include/bolt/Core/DebugData.h | 3 - bolt/include/bolt/Passes/AllocCombiner.h | 2 - bolt/include/bolt/Rewrite/DWARFRewriter.h | 3 +- bolt/lib/Core/BinaryFunction.cpp | 5 +- bolt/lib/Core/DebugData.cpp | 7 +- bolt/lib/Core/JumpTable.cpp | 1 - bolt/lib/Passes/IndirectCallPromotion.cpp | 24 +- bolt/lib/Passes/ThreeWayBranch.cpp | 2 - bolt/lib/Profile/YAMLProfileWriter.cpp | 2 +- bolt/lib/Rewrite/DWARFRewriter.cpp | 4 +- bolt/lib/Rewrite/MachORewriteInstance.cpp | 2 - bolt/lib/Rewrite/RewriteInstance.cpp | 2 - bolt/lib/Utils/Utils.cpp | 1 - clang-tools-extra/CMakeLists.txt | 1 + clang-tools-extra/clang-doc/tool/CMakeLists.txt | 4 +- .../find-all-symbols/tool/CMakeLists.txt | 2 +- .../clang-include-fixer/tool/CMakeLists.txt | 4 +- clang-tools-extra/clang-tidy/CMakeLists.txt | 2 +- .../abseil/DurationFactoryScaleCheck.cpp | 2 +- .../clang-tidy/bugprone/StringviewNullptrCheck.cpp | 19 +- .../ProBoundsConstantArrayIndexCheck.cpp | 3 +- .../clang-tidy/performance/MoveConstArgCheck.cpp | 119 +- .../clang-tidy/performance/MoveConstArgCheck.h | 2 + .../clang-tidy/readability/CMakeLists.txt | 1 + .../readability/DuplicateIncludeCheck.cpp | 116 + .../clang-tidy/readability/DuplicateIncludeCheck.h | 35 + .../clang-tidy/readability/FunctionSizeCheck.cpp | 3 +- .../readability/ReadabilityTidyModule.cpp | 3 + .../readability/SuspiciousCallArgumentCheck.cpp | 4 +- clang-tools-extra/clang-tidy/tool/CMakeLists.txt | 4 +- .../clang-tidy/utils/ExceptionAnalyzer.cpp | 18 + .../clang-tidy/utils/IncludeSorter.cpp | 17 +- clang-tools-extra/clangd/ClangdServer.cpp | 2 +- clang-tools-extra/clangd/HeuristicResolver.cpp | 5 +- clang-tools-extra/clangd/Hover.cpp | 2 +- clang-tools-extra/clangd/SourceCode.cpp | 3 +- clang-tools-extra/clangd/index/Background.cpp | 2 +- clang-tools-extra/docs/ReleaseNotes.rst | 14 + .../checks/bugprone-stringview-nullptr.rst | 4 +- .../checks/cppcoreguidelines-macro-usage.rst | 4 +- ...eguidelines-pro-bounds-constant-array-index.rst | 2 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 3 +- .../checks/readability-duplicate-include.rst | 35 + clang-tools-extra/modularize/CMakeLists.txt | 2 +- .../readability-duplicate-include.h | 15 + .../readability-duplicate-include2.h | 1 + .../readability-duplicate-include/system/iostream | 1 + .../readability-duplicate-include/system/string.h | 1 + .../system/sys/types.h | 1 + .../readability-duplicate-include/system/types.h | 1 + .../checkers/bugprone-exception-escape.cpp | 43 + .../checkers/bugprone-stringview-nullptr.cpp | 22 +- ...s-pro-bounds-constant-array-index-gslheader.cpp | 6 +- ...eguidelines-pro-bounds-constant-array-index.cpp | 6 +- .../checkers/performance-move-const-arg.cpp | 94 + .../checkers/readability-duplicate-include.cpp | 72 + clang/CMakeLists.txt | 14 +- clang/cmake/caches/BaremetalARM.cmake | 1 + clang/cmake/caches/CrossWinToARMLinux.cmake | 1 + clang/cmake/caches/Fuchsia-stage2.cmake | 1 + clang/cmake/modules/AddClang.cmake | 5 +- clang/cmake/modules/CMakeLists.txt | 4 +- clang/docs/JSONCompilationDatabase.rst | 4 + clang/docs/LibASTMatchersReference.html | 32 + clang/docs/ReleaseNotes.rst | 17 + clang/include/clang/AST/FormatString.h | 3 +- clang/include/clang/ASTMatchers/ASTMatchers.h | 19 + clang/include/clang/Basic/BuiltinsRISCV.def | 6 + clang/include/clang/Basic/CodeGenOptions.def | 5 + clang/include/clang/Basic/DiagnosticASTKinds.td | 5 + clang/include/clang/Basic/DiagnosticGroups.td | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 3 + clang/include/clang/Basic/RISCVVTypes.def | 4 +- clang/include/clang/Basic/riscv_vector.td | 6 +- clang/include/clang/Driver/Options.td | 8 +- .../DependencyScanningFilesystem.h | 347 +- clang/lib/AST/Decl.cpp | 13 - clang/lib/AST/ItaniumMangle.cpp | 22 +- clang/lib/AST/OSLog.cpp | 4 +- clang/lib/AST/PrintfFormatString.cpp | 2 +- clang/lib/AST/RecordLayoutBuilder.cpp | 17 + clang/lib/ASTMatchers/Dynamic/Registry.cpp | 1 + .../Analysis/FlowSensitive/DataflowEnvironment.cpp | 5 + .../FlowSensitive/TypeErasedDataflowAnalysis.cpp | 1 + clang/lib/Basic/Targets/AArch64.h | 1 + clang/lib/Basic/Targets/ARM.h | 1 + clang/lib/Basic/Targets/RISCV.cpp | 29 +- clang/lib/Basic/Targets/Sparc.cpp | 2 - clang/lib/Basic/Targets/X86.h | 11 +- clang/lib/CodeGen/BackendUtil.cpp | 15 +- clang/lib/CodeGen/CGBuiltin.cpp | 16 +- clang/lib/CodeGen/CGCall.cpp | 4 +- clang/lib/CodeGen/CodeGenFunction.cpp | 7 + clang/lib/CodeGen/CodeGenModule.cpp | 3 + clang/lib/Driver/Driver.cpp | 12 + clang/lib/Driver/SanitizerArgs.cpp | 1 + clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp | 23 +- clang/lib/Driver/ToolChains/Arch/AArch64.cpp | 12 +- clang/lib/Driver/ToolChains/Arch/AArch64.h | 1 + clang/lib/Driver/ToolChains/Arch/ARM.cpp | 29 +- clang/lib/Driver/ToolChains/Arch/ARM.h | 1 + clang/lib/Driver/ToolChains/Clang.cpp | 17 +- clang/lib/Driver/ToolChains/MSVC.cpp | 12 + clang/lib/Format/Format.cpp | 8 +- clang/lib/Format/FormatToken.h | 6 + clang/lib/Format/FormatTokenLexer.cpp | 22 +- clang/lib/Format/TokenAnnotator.cpp | 20 +- clang/lib/Format/UnwrappedLineParser.cpp | 7 +- clang/lib/Format/UnwrappedLineParser.h | 3 +- clang/lib/Frontend/CompilerInvocation.cpp | 3 + clang/lib/Frontend/Rewrite/InclusionRewriter.cpp | 20 +- clang/lib/Headers/opencl-c.h | 94 +- clang/lib/Sema/SemaChecking.cpp | 24 +- clang/lib/Sema/SemaCodeComplete.cpp | 7 +- clang/lib/Sema/SemaStmt.cpp | 8 +- .../DependencyScanningFilesystem.cpp | 255 +- clang/test/ClangScanDeps/modules-symlink.c | 54 + .../CodeGen/RISCV/riscv-attr-builtin-alias-err.c | 2 +- .../test/CodeGen/RISCV/riscv-attr-builtin-alias.c | 2 +- clang/test/CodeGen/RISCV/riscv-inline-asm-rvv.c | 4 +- clang/test/CodeGen/RISCV/riscv-v-debuginfo.c | 2 +- clang/test/CodeGen/RISCV/riscv-v-lifetime.cpp | 2 +- .../CodeGen/RISCV/rvb-intrinsics/riscv32-zbt.c | 54 + .../CodeGen/RISCV/rvb-intrinsics/riscv64-zbt.c | 116 + .../RISCV/rvv-intrinsics-overloaded/vaadd.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vadc.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vadd.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vasub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vcompress.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vcpop.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfabs.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfclass.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfcvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfirst.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmerge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmul.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vfmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfncvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfneg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrec7.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrsqrt7.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsgnj.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfslide1down.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfslide1up.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsqrt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwcvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwnmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwsub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vget.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vid.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/viota.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vlmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vloxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vloxseg.c | 4 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vlse.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vlseg.c | 8 +- .../RISCV/rvv-intrinsics-overloaded/vlsegff.c | 8 +- .../RISCV/rvv-intrinsics-overloaded/vlsseg.c | 4 +- .../RISCV/rvv-intrinsics-overloaded/vluxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vluxseg.c | 4 +- .../RISCV/rvv-intrinsics-overloaded/vmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmadc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmand.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmerge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfeq.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfgt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmflt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfne.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmin.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnot.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsbc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsbf.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmseq.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsgt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsif.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmslt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsne.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsof.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmul.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmxnor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmxor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnclip.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vncvt.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vneg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnmsub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vnot.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnsra.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnsrl.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredxor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vreinterpret.c | 2 +- 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| 184 +- .../CodeGen/AMDGPU/GlobalISel/load-unaligned.ll | 56 +- .../postlegalizercombiner-load-and-mask.mir | 11 +- .../CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll | 16 +- .../CodeGen/AMDGPU/GlobalISel/store-local.128.ll | 72 +- .../CodeGen/AMDGPU/GlobalISel/store-local.96.ll | 72 +- .../AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll | 12 +- llvm/test/CodeGen/AMDGPU/cluster_stores.ll | 19 +- llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll | 15 +- llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll | 28 +- llvm/test/CodeGen/AMDGPU/ds-alignment.ll | 183 +- llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll | 12 +- llvm/test/CodeGen/AMDGPU/ds_read2.ll | 170 +- llvm/test/CodeGen/AMDGPU/ds_write2.ll | 96 +- llvm/test/CodeGen/AMDGPU/flat-scratch.ll | 20 +- llvm/test/CodeGen/AMDGPU/image_ls_mipmap_zero.ll | 132 - llvm/test/CodeGen/AMDGPU/licm-valu.mir | 245 ++ llvm/test/CodeGen/AMDGPU/llc-pipeline.ll | 2 - .../AMDGPU/llvm.amdgcn.image.sample.ltolz.ll | 113 - .../CodeGen/AMDGPU/memory-legalizer-flat-agent.ll | 352 +- .../AMDGPU/memory-legalizer-flat-nontemporal.ll | 8 +- .../AMDGPU/memory-legalizer-flat-singlethread.ll | 352 +- .../CodeGen/AMDGPU/memory-legalizer-flat-system.ll | 352 +- .../AMDGPU/memory-legalizer-flat-volatile.ll | 14 +- .../AMDGPU/memory-legalizer-flat-wavefront.ll | 348 +- .../AMDGPU/memory-legalizer-flat-workgroup.ll | 336 +- .../AMDGPU/memory-legalizer-global-agent.ll | 348 +- .../AMDGPU/memory-legalizer-global-nontemporal.ll | 8 +- .../AMDGPU/memory-legalizer-global-singlethread.ll | 352 +- .../AMDGPU/memory-legalizer-global-system.ll | 332 +- .../AMDGPU/memory-legalizer-global-volatile.ll | 14 +- .../AMDGPU/memory-legalizer-global-wavefront.ll | 352 +- .../AMDGPU/memory-legalizer-global-workgroup.ll | 352 +- .../CodeGen/AMDGPU/memory-legalizer-local-agent.ll | 604 ++- .../AMDGPU/memory-legalizer-local-nontemporal.ll | 16 +- .../AMDGPU/memory-legalizer-local-singlethread.ll | 604 ++- .../AMDGPU/memory-legalizer-local-system.ll | 604 ++- .../AMDGPU/memory-legalizer-local-volatile.ll | 20 +- .../AMDGPU/memory-legalizer-local-wavefront.ll | 604 ++- .../AMDGPU/memory-legalizer-local-workgroup.ll | 604 ++- .../AMDGPU/memory-legalizer-private-nontemporal.ll | 16 +- .../AMDGPU/memory-legalizer-private-volatile.ll | 16 +- llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll | 20 +- llvm/test/CodeGen/AMDGPU/remat-vop.mir | 2210 +++++----- llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 9 +- .../CodeGen/AMDGPU/spill-sgpr-stack-no-sgpr.ll | 6 +- llvm/test/CodeGen/AMDGPU/store-local.128.ll | 96 +- llvm/test/CodeGen/AMDGPU/store-local.96.ll | 96 +- llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll | 4 +- llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll | 394 +- .../ARM/xray-armv6-attribute-instrumentation.ll | 4 +- .../ARM/xray-armv7-attribute-instrumentation.ll | 4 +- llvm/test/CodeGen/ARM/xray-tail-call-sled.ll | 4 +- llvm/test/CodeGen/AVR/elpm.ll | 270 ++ llvm/test/CodeGen/AVR/lpmx.ll | 146 + llvm/test/CodeGen/AVR/sections.ll | 41 +- llvm/test/CodeGen/AVR/smul-with-overflow.ll | 2 +- llvm/test/CodeGen/AVR/store-undef.ll | 3 +- llvm/test/CodeGen/AVR/umul-with-overflow.ll | 2 +- llvm/test/CodeGen/CSKY/tls-models.ll | 179 + llvm/test/CodeGen/Hexagon/xray-pred-ret.ll | 2 +- llvm/test/CodeGen/Hexagon/xray.ll | 4 +- .../test/CodeGen/MLRegalloc/dev-rel-equivalence.ll | 2 +- llvm/test/CodeGen/MLRegalloc/rel-codepath.ll | 1 + llvm/test/CodeGen/Mips/vr4300-mulmul.ll | 25 +- .../Mips/xray-mips-attribute-instrumentation.ll | 8 +- llvm/test/CodeGen/Mips/xray-section-group.ll | 8 +- llvm/test/CodeGen/PowerPC/ctrloop-fp128.ll | 52 +- .../PowerPC/xray-attribute-instrumentation.ll | 5 +- .../CodeGen/PowerPC/xray-conditional-return.ll | 2 +- .../test/CodeGen/PowerPC/xray-ret-is-terminator.ll | 2 +- llvm/test/CodeGen/PowerPC/xray-tail-call-hidden.ll | 2 +- llvm/test/CodeGen/PowerPC/xray-tail-call-sled.ll | 2 +- llvm/test/CodeGen/RISCV/add-before-shl.ll | 20 +- llvm/test/CodeGen/RISCV/addcarry.ll | 30 +- llvm/test/CodeGen/RISCV/atomic-rmw.ll | 2400 +++++------ llvm/test/CodeGen/RISCV/atomic-signext.ll | 480 +-- llvm/test/CodeGen/RISCV/attributes.ll | 24 +- llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll | 98 +- llvm/test/CodeGen/RISCV/callee-saved-gprs.ll | 796 ++-- .../calling-conv-ilp32-ilp32f-ilp32d-common.ll | 76 +- .../RISCV/calling-conv-lp64-lp64f-lp64d-common.ll | 38 +- llvm/test/CodeGen/RISCV/double-arith-strict.ll | 92 +- llvm/test/CodeGen/RISCV/double-arith.ll | 208 +- llvm/test/CodeGen/RISCV/double-convert.ll | 186 +- llvm/test/CodeGen/RISCV/double-fcmp-strict.ll | 64 +- llvm/test/CodeGen/RISCV/double-fcmp.ll | 32 +- llvm/test/CodeGen/RISCV/double-round-conv-sat.ll | 940 +++++ llvm/test/CodeGen/RISCV/float-arith-strict.ll | 32 +- llvm/test/CodeGen/RISCV/float-arith.ll | 124 +- llvm/test/CodeGen/RISCV/float-convert.ll | 88 +- llvm/test/CodeGen/RISCV/float-round-conv-sat.ll | 940 +++++ llvm/test/CodeGen/RISCV/fp-imm.ll | 24 +- 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.../CodeGen/RISCV/rvv/legalize-store-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-16.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-32.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-8.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/localvar.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/marith-vp.ll | 4 +- .../CodeGen/RISCV/rvv/mask-exts-truncs-rv32.ll | 2 +- .../CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/masked-load-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-load-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-store-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-store-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/memory-args.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll | 4 +- .../RISCV/rvv/named-vector-shuffle-reverse.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll | 10 +- llvm/test/CodeGen/RISCV/rvv/pr52475.ll | 4 +- .../test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll | 77 + llvm/test/CodeGen/RISCV/rvv/reg-coalescing.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/regalloc-fast-crash.ll | 2 +- .../CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll | 4 +- .../CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll | 2 +- .../CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll | 4 +- .../CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/select-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/select-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/select-sra.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll | 1465 +++++-- llvm/test/CodeGen/RISCV/rvv/smulo-sdnode.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/stepvector.ll | 4 +- .../RISCV/rvv/tail-agnostic-impdef-copy.mir | 6 +- llvm/test/CodeGen/RISCV/rvv/umulo-sdnode.ll | 2 +- .../CodeGen/RISCV/rvv/unaligned-loads-stores.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-policy.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll | 58 +- llvm/test/CodeGen/RISCV/rvv/vand-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vand-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vand-vp.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcpop-rv32.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vcpop-rv64.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vcpop.ll | 284 ++ llvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdiv-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vexts-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfabs-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll | 1417 ------- llvm/test/CodeGen/RISCV/rvv/vfadd-rv64.ll | 1386 ------- llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll | 34 +- llvm/test/CodeGen/RISCV/rvv/vfadd.ll | 1357 +++++++ llvm/test/CodeGen/RISCV/rvv/vfclass-rv32.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfclass-rv64.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfclass.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll | 617 --- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll | 617 --- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x.ll | 619 +++ llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll | 617 --- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll | 617 --- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu.ll | 619 +++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll | 617 --- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll | 617 --- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f.ll | 619 +++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll | 617 --- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll | 617 --- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f.ll | 619 +++ llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll | 617 --- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll | 617 --- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f.ll | 619 +++ llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll | 617 --- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll | 617 --- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f.ll | 619 +++ llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll | 1417 ------- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll | 1385 ------- llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfdiv.ll | 1357 +++++++ llvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vfirst-rv64.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vfirst.ll | 284 ++ llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll | 1154 ------ llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll | 1130 ------ llvm/test/CodeGen/RISCV/rvv/vfmacc.ll | 1108 +++++ llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll | 1154 ------ llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll | 1130 ------ llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmadd.ll | 1108 +++++ llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll | 1417 ------- llvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll | 1385 ------- llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmax.ll | 1357 +++++++ llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll | 933 ----- llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll | 917 ----- llvm/test/CodeGen/RISCV/rvv/vfmerge.ll | 904 +++++ llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll | 1417 ------- llvm/test/CodeGen/RISCV/rvv/vfmin-rv64.ll | 1385 ------- llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmin.ll | 1357 +++++++ llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll | 1154 ------ llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll | 1130 ------ llvm/test/CodeGen/RISCV/rvv/vfmsac.ll | 1108 +++++ llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll | 1154 ------ llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll | 1130 ------ llvm/test/CodeGen/RISCV/rvv/vfmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmsub.ll | 1108 +++++ llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll | 1417 ------- llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll | 1385 ------- llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmul.ll | 1357 +++++++ llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll | 197 - llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll | 197 - llvm/test/CodeGen/RISCV/rvv/vfmv.s.f.ll | 200 + llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv32.ll | 482 --- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv64.ll | 482 --- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f.ll | 484 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll | 380 -- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll | 380 -- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f.ll | 382 ++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll | 380 -- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll | 380 -- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x.ll | 382 ++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll | 380 -- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll | 380 -- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu.ll | 382 ++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll | 380 -- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll | 380 -- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f.ll | 382 ++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll | 632 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll | 632 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f.ll | 634 +++ .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll | 632 --- .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll | 632 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f.ll | 634 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll | 632 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll | 632 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f.ll | 634 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll | 632 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll | 632 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f.ll | 634 +++ llvm/test/CodeGen/RISCV/rvv/vfneg-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll | 1154 ------ llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll | 1130 ------ llvm/test/CodeGen/RISCV/rvv/vfnmacc.ll | 1108 +++++ llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll | 1154 ------ llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll | 1130 ------ llvm/test/CodeGen/RISCV/rvv/vfnmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfnmadd.ll | 1108 +++++ llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll | 1154 ------ llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll | 1130 ------ llvm/test/CodeGen/RISCV/rvv/vfnmsac.ll | 1108 +++++ llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll | 1154 ------ llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll | 1130 ------ llvm/test/CodeGen/RISCV/rvv/vfnmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfnmsub.ll | 1108 +++++ llvm/test/CodeGen/RISCV/rvv/vfpext-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll | 739 ---- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll | 707 ---- llvm/test/CodeGen/RISCV/rvv/vfrdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfrdiv.ll | 679 ++++ llvm/test/CodeGen/RISCV/rvv/vfrec7-rv32.ll | 617 --- llvm/test/CodeGen/RISCV/rvv/vfrec7-rv64.ll | 617 --- llvm/test/CodeGen/RISCV/rvv/vfrec7.ll | 619 +++ llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredmax-rv64.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredmax.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv64.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredmin.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv64.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredosum.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfredusum-rv32.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredusum-rv64.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredusum.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv32.ll | 617 --- llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv64.ll | 617 --- llvm/test/CodeGen/RISCV/rvv/vfrsqrt7.ll | 619 +++ llvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll | 739 ---- llvm/test/CodeGen/RISCV/rvv/vfrsub-rv64.ll | 708 ---- llvm/test/CodeGen/RISCV/rvv/vfrsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfrsub.ll | 679 ++++ llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll | 1417 ------- llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll | 1385 ------- llvm/test/CodeGen/RISCV/rvv/vfsgnj.ll | 1357 +++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll | 1417 ------- llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll | 1385 ------- llvm/test/CodeGen/RISCV/rvv/vfsgnjn.ll | 1357 +++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll | 1417 ------- llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll | 1385 ------- llvm/test/CodeGen/RISCV/rvv/vfsgnjx.ll | 1357 +++++++ llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll | 739 ---- llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll | 707 ---- llvm/test/CodeGen/RISCV/rvv/vfslide1down.ll | 679 ++++ llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll | 754 ---- llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll | 722 ---- llvm/test/CodeGen/RISCV/rvv/vfslide1up.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll | 548 --- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll | 707 ---- llvm/test/CodeGen/RISCV/rvv/vfsqrt-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsqrt.ll | 619 +++ llvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll | 1417 ------- llvm/test/CodeGen/RISCV/rvv/vfsub-rv64.ll | 1386 ------- llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsub.ll | 1357 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll | 848 ---- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll | 848 ---- llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwadd.ll | 832 ++++ llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll | 1275 ------ llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll | 1275 ------ llvm/test/CodeGen/RISCV/rvv/vfwadd.w.ll | 1250 ++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll | 380 -- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll | 380 -- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f.ll | 382 ++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll | 632 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll | 632 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x.ll | 634 +++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll | 632 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll | 632 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu.ll | 634 +++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll | 380 -- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll | 380 -- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f.ll | 382 ++ .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll | 380 -- .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll | 380 -- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f.ll | 382 ++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll | 380 -- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll | 380 -- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f.ll | 382 ++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll | 380 -- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll | 380 -- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f.ll | 382 ++ llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll | 848 ---- llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll | 848 ---- llvm/test/CodeGen/RISCV/rvv/vfwmacc.ll | 832 ++++ llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll | 848 ---- llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll | 848 ---- llvm/test/CodeGen/RISCV/rvv/vfwmsac.ll | 832 ++++ llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll | 848 ---- llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll | 848 ---- llvm/test/CodeGen/RISCV/rvv/vfwmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwmul.ll | 832 ++++ llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll | 848 ---- llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll | 848 ---- llvm/test/CodeGen/RISCV/rvv/vfwnmacc.ll | 832 ++++ llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll | 848 ---- llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll | 848 ---- llvm/test/CodeGen/RISCV/rvv/vfwnmsac.ll | 832 ++++ llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll | 508 --- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll | 508 --- llvm/test/CodeGen/RISCV/rvv/vfwredosum.ll | 510 +++ llvm/test/CodeGen/RISCV/rvv/vfwredusum-rv32.ll | 508 --- llvm/test/CodeGen/RISCV/rvv/vfwredusum-rv64.ll | 508 --- llvm/test/CodeGen/RISCV/rvv/vfwredusum.ll | 510 +++ llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll | 848 ---- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll | 848 ---- llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwsub.ll | 832 ++++ llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll | 1275 ------ llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll | 1275 ------ llvm/test/CodeGen/RISCV/rvv/vfwsub.w.ll | 1250 ++++++ llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll | 758 ---- llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll | 758 ---- llvm/test/CodeGen/RISCV/rvv/vid.ll | 760 ++++ llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll | 882 ---- llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll | 882 ---- llvm/test/CodeGen/RISCV/rvv/viota.ll | 884 ++++ llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlm-rv32.ll | 94 - llvm/test/CodeGen/RISCV/rvv/vlm-rv64.ll | 94 - llvm/test/CodeGen/RISCV/rvv/vlm.ll | 96 + llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64-dead.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmand-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmand-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmand.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmandn-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmandn-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmandn.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmclr-rv32.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmclr.ll | 116 + llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmerge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmnand-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnand-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnand.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmnor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmorn-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmorn-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmorn.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv64.ll | 2 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll | 2 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmset-rv32.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmset-rv64.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmset.ll | 116 + llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 296 -- llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 296 -- llvm/test/CodeGen/RISCV/rvv/vmsif.ll | 298 ++ llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 296 -- llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 296 -- llvm/test/CodeGen/RISCV/rvv/vmsof.ll | 298 ++ llvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmul-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmxnor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmxnor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmxnor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmxor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmxor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmxor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsra-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vor-vp.ll | 32 +- llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll | 270 +- llvm/test/CodeGen/RISCV/rvv/vpload.ll | 54 +- llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll | 269 +- llvm/test/CodeGen/RISCV/rvv/vpstore.ll | 56 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv64.ll | 2 +- .../CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll | 4 +- .../test/CodeGen/RISCV/rvv/vreductions-int-rv32.ll | 2 +- .../test/CodeGen/RISCV/rvv/vreductions-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll | 10 +- llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vredxor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredxor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll | 4 +- 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llvm/test/MC/RISCV/rvv/load.s | 124 +- llvm/test/MC/RISCV/rvv/macc.s | 68 +- llvm/test/MC/RISCV/rvv/mask.s | 60 +- llvm/test/MC/RISCV/rvv/minmax.s | 40 +- llvm/test/MC/RISCV/rvv/mul.s | 72 +- llvm/test/MC/RISCV/rvv/mv.s | 26 +- llvm/test/MC/RISCV/rvv/or.s | 20 +- llvm/test/MC/RISCV/rvv/others.s | 56 +- llvm/test/MC/RISCV/rvv/reduction.s | 50 +- llvm/test/MC/RISCV/rvv/shift.s | 94 +- llvm/test/MC/RISCV/rvv/sign-injection.s | 32 +- llvm/test/MC/RISCV/rvv/snippet.s | 4 +- llvm/test/MC/RISCV/rvv/store.s | 82 +- llvm/test/MC/RISCV/rvv/sub.s | 108 +- llvm/test/MC/RISCV/rvv/vsetvl-invalid.s | 4 +- llvm/test/MC/RISCV/rvv/vsetvl.s | 58 +- llvm/test/MC/RISCV/rvv/xor.s | 24 +- llvm/test/MC/RISCV/rvv/zvlsseg.s | 1020 +++-- llvm/test/ThinLTO/X86/cache.ll | 2 +- llvm/test/ThinLTO/X86/empty_module_with_cache.ll | 2 +- llvm/test/Transforms/Attributor/range.ll | 433 +- .../CodeGenPrepare/AArch64/large-offset-gep.ll | 5 +- llvm/test/Transforms/EarlyCSE/atomics.ll | 194 +- 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