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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/llvm-project.
from 9b8dd004034 Test commit access via git adds bc58e0279b7 [compiler-rt] cmake: add include(BuiltinTests) to CompilerR [...] adds 60b403e75cd Always flush pending errors in MCAsmParser adds 9671d1dc176 [clang]Fixup clang -Werror,,-Wcovered-switch-default build [...] adds 9ab6d8236b1 [clang-scan-deps] Add basic support for modules. adds 0c3921e7b9a [SCEV] Delete unused code from header adds 7fff716ec47 [CMake] Update Fuchsia build configuration adds 6d424a161bf Revert "Recommit "[Clang] Pragma vectorize_width() implies [...] adds ef7a154d17f [clang][ThinLTO] Promote cc1 -fthin_link_bitcode to driver [...] adds c27010ef76a [SCEV] Start reworking backedge taken count APIs to unify m [...] adds 7af309a4ed1 [clang][DependencyScanning] clang-format. adds 81c2a5bb39c Test commit via git. adds 0e8fc21c2ec Fix Clang -Wcovered-switch-default warning by moving llvm_u [...] adds 34f68253ca3 [SCEV] Expose and use maximum constant exit counts for indi [...] adds 27bfee01e96 docs: Update instructions for requesting commit access adds 0eb8a52aeec [X86][GISel] Remove unneeded custom selection code for hand [...] adds 5a48678a6a1 [hip] Allow the declaration of functions with variadic argu [...] adds 45787e56829 Fix compilation warning. NFC. adds 13d8d19d518 gn build: (manually) merge 08074cc9 adds 9c0f66746ca gn build: Merge bb6a27fc257 adds 72d7908afc7 gn build: Merge d0bd3fc88be adds 918b88ab150 gn build: Merge ffa214ef228 adds b96e30c2172 git-llvm: Push to master branch by default adds efcdedd2e72 git-llvm: Drop dependency on github module adds 8c99a549dec [LiveDebugValues] Small code clean up; NFC adds a6712889f5f [lldb] [Host/netbsd] Set Arg0 for 'platform process list -v' adds 822059147bf [PowerPC] [Peephole] fold frame offset by using index form [...] adds 24ef631f433 Fix file-ordering nit in D67161. adds 77b3c794e34 [docs] Update Mips feature table in CodeGenerator.rst adds 2a3dc6b74f4 Fix a variable typo in LiveDebugValues [NFC] adds 53c164e2216 [llvm/Object] - Fix the error message reported for a broken [...] adds 9acaf542771 [obj2yaml] - Better dumping for relocations without symbols [...] adds 74d39a42f10 [clangd] DefineInline action availability checks adds dfd6374c784 [clangd] DefineInline action apply logic with fully qualifi [...] adds d581f68519d gn build: Merge 74d39a42f10 adds d62e3ed3f4b [clangd] Implement GetEligiblePoints adds 8aa84ad37db [clangd] Store Index in Tweak::Selection adds de3cef1d5d3 [yaml2obj, obj2yaml] - Add support for SHT_NOTE sections. adds e3105e71f3a [LLD][ELF] - Update test case after yaml2obj change. adds 11ce19d2119 [clang] Switch arm-mve-intrinsics tests to use %clang_cc1. adds ce1e249a688 Fix compilation error in clangd/refactor/tweaks/ExpandAutoType.cpp adds 3d9632a997f [clang-rename] NFC, make getCanonicalSymbolDeclaration robu [...] adds 417dd678250 [MIPS GlobalISel] Select MSA vector generic and builtin fsqrt adds 43e931cb5fc [clangd][NFC] Get rid of raw string literals in macros to m [...] adds 1baa50396d9 [RISCV] Add support for half-precision floats adds be29d928548 OpenMP Tasks dependencies hash re-sizing fixed. adds 11c2a85db88 [NFC] Rename LLVM_NO_DEAD_STRIP adds 6df7ef0d8ba [clang-format] [NFC] update the documentation in Format.h t [...] adds 59a51d84b3a [CodeGen][SelectionDAG] Fix tiny bug in ExpandIntRes_UADDSUBO adds b2c184458e9 [APInt] Add saturating multiply ops adds 1cc8e1e1d7d [APInt] Add saturating left-shift ops adds b82fa80e807 [SLP] adjust code comment; NFC adds 7ad3636c30a [AMDGPU] Remove update_llc_test_checks for a test adds abd89c243a4 build: reindent text (NFC) adds b85b4e5a6f8 Add an instruction marker field to the ExtraInfo in MachineInstrs. adds 8e567b0730f [clangd] Revert define-inline action changes to un-break wi [...] adds b74d7e5cccb [PowerPC] add test for popcnt with any_extend; NFC adds fd667b860e9 [libcxx] [test] Run `chmod +x` on executables when testing via SSH adds a153233caf6 gn build: Merge 8e567b0730f adds de79836312e [FPEnv] Teach the IRBuilder about correct use of the strict [...] adds 5934cd11ea3 [TableGen] Add asserts to make sure default values match pr [...] adds 7a2b704bf0c [Sema][Typo Correction] Fix another infinite loop on ambiguity adds 4d18b4a7c4f [SCEV] Add a clarifying comment around ExitLimit construction adds 96601ec28b7 ValueObject: Fix a crash related to children address type c [...] adds 197b7b24c33 [NFC][libomptarget] move remaining device specific code out [...] adds 118ceea5c36 Crt files are special cased by name when dealing with ctor [...] adds c35b358b741 AMDGPU/GlobalISel: Legalize FDIV16 adds e6c145e0548 [DAGCombiner] widen zext of popcount based on target support adds 3dd0a896b64 [X86] Add a check for SSE2 to the top of combineReductionTo [...] adds 72105b9dcd6 Fix compilation error in ObjectFileMachO::ParseSymtab adds 0877dd14e4e [Driver] Force llvm to install its handlers before lldb's adds c9c18e5a319 [AMDGPU] Disallow dpp combining for dpp instructions withou [...] adds d4303b38616 [AMDGPU] Fold AGPR reg_sequence initializers adds 074af2daf5f [llvm-objcopy][MachO] Add support for min os version load commands adds 2724d9e1296 build: remove `LLVM_CXX_STD` extension point adds 3c7c3717932 [CVP] add test for poison propagation bug (PR43802); NFC adds a4783ef58d3 [Alignment][NFC] getMemoryOpCost uses MaybeAlign adds cc0b9647b76 [LLD][ThinLTO] Handle GUID collision in import global processing adds 64c1f6602a0 Revert "Add an instruction marker field to the ExtraInfo in [...] adds a6e1de4afc5 [gicombiner] Add parse failure tests for defs/match adds 1ce552f3ef8 AMDGPU: Fix the broken dominator tree when creating waterfa [...] adds 171cf5302f4 AMDGPU/GlobalISel: Handle flat/global G_ATOMIC_CMPXCHG adds 03de2f84fc4 [ARM] Uses "Sun Style" syntax for section switching adds e8a0a0904b2 [Alignment][NFC] Convert AllocaInst to MaybeAlign adds 1a276d1e8c5 GlobalISel: Implement widenScalar for G_INSERT_VECTOR_ELT adds c7dcacf16a6 [AMDGPU] Fixed asan failure in SIFoldOperands adds a6b0219fc4a Revert "[ARM] Uses "Sun Style" syntax for section switching" adds 738af7a6241 Add the ability to pass extra args to a Python breakpoi [...] adds 0e4d4153115 Update version number in llvm python bindings adds e070cf81196 [x86] add tests for extractelement with undef index (PR42689); NFC adds a27c998c006 [BPF] fix a CO-RE issue with -mattr=+alu32 adds 7913126a08e [globalisel] Add LLVMDev 2019 talks and links for the 2017 talks adds 27887bc1e7a [globalisel] Fix typo in 'Add LLVMDev 2019 talks and links [...] adds 4c0251da149 [AMDGPU] Enable SGPR copy folding adds 73a7a55c0ec lldb/COFF: Create a separate "section" for the file header adds 27fdf8a29d1 [lit] Don't fail when printing test output with special chars adds 7c603a41e20 lldb/minidump: Refactor memory region computation code adds 8da20560ab0 [clang][DependencyScanning] 80-col. new 10b5cd8ed52 [LLDB] Fix inline variable only used in assertion. (NFC) new feab0334f57 [globalisel] Restructure the GlobalISel documentation new 6c89392592c Use __builtin_strlen in constexpr StringRef ctor with MSVC new 5a3c657f3e8 Fix after 738af7a6241c98164625b9cd1ba9f8af4e36f197 new a88591cff46 [libFuzzer] Enable extra counters for Fuchsia. new f3ad8ae7b73 [lit] Move sharding logic into separate function
The 6 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang-tools-extra/clangd/SourceCode.cpp | 156 +++- clang-tools-extra/clangd/SourceCode.h | 21 + .../clangd/refactor/tweaks/ExpandAutoType.cpp | 2 +- .../clangd/unittests/SourceCodeTests.cpp | 62 ++ clang/cmake/caches/Fuchsia-stage2.cmake | 20 +- clang/cmake/caches/Fuchsia.cmake | 9 +- clang/include/clang/Driver/CC1Options.td | 2 - clang/include/clang/Driver/Options.td | 3 + clang/include/clang/Format/Format.h | 32 +- .../DependencyScanning/DependencyScanningTool.h | 9 +- .../clang/Tooling/Inclusions/IncludeStyle.h | 9 + clang/lib/CodeGen/CGBuiltin.cpp | 4 +- clang/lib/CodeGen/CGLoopInfo.cpp | 8 - clang/lib/CodeGen/TargetInfo.cpp | 7 + clang/lib/Driver/ToolChains/Clang.cpp | 6 + clang/lib/Driver/ToolChains/HIP.cpp | 2 + clang/lib/Sema/SemaExprCXX.cpp | 5 +- .../DependencyScanningFilesystem.cpp | 42 +- .../DependencyScanning/DependencyScanningTool.cpp | 13 +- .../Refactoring/Rename/USRFindingAction.cpp | 2 + clang/test/ClangScanDeps/Inputs/module.modulemap | 7 + clang/test/ClangScanDeps/Inputs/modules_cdb.json | 13 + clang/test/ClangScanDeps/modules.cpp | 41 + .../CodeGen/arm-mve-intrinsics/scalar-shifts.c | 2 +- clang/test/CodeGen/arm-mve-intrinsics/vadc.c | 4 +- clang/test/CodeGen/arm-mve-intrinsics/vaddq.c | 4 +- clang/test/CodeGen/arm-mve-intrinsics/vcvt.c | 2 +- clang/test/CodeGen/arm-mve-intrinsics/vld24.c | 4 +- clang/test/CodeGen/arm-mve-intrinsics/vldr.c | 2 +- clang/test/CodeGen/arm-mve-intrinsics/vminvq.c | 4 +- clang/test/CodeGen/thin_link_bitcode.c | 4 + clang/test/CodeGenCXX/pragma-loop-predicate.cpp | 5 +- clang/test/CodeGenCXX/pragma-loop.cpp | 34 +- clang/test/Driver/hip-toolchain-no-rdc.hip | 8 +- clang/test/Driver/hip-toolchain-rdc.hip | 4 +- clang/test/Sema/typo-correction-ambiguity.c | 14 + clang/tools/driver/CMakeLists.txt | 4 +- clang/utils/TableGen/CMakeLists.txt | 2 +- .../cmake/Modules/CompilerRTDarwinUtils.cmake | 1 + compiler-rt/lib/fuzzer/FuzzerExtraCounters.cpp | 2 +- libcxx/utils/libcxx/test/executor.py | 20 +- lld/ELF/OutputSections.cpp | 26 +- lld/test/ELF/ctors_dtors_priority.s | 18 +- lld/test/ELF/sht-group-empty.test | 1 + lldb/include/lldb/API/SBBreakpoint.h | 3 + lldb/include/lldb/API/SBBreakpointLocation.h | 7 +- lldb/include/lldb/API/SBBreakpointName.h | 7 +- lldb/include/lldb/API/SBStructuredData.h | 3 + lldb/include/lldb/Core/PropertiesBase.td | 2 + lldb/include/lldb/Core/ValueObject.h | 1 + .../Interpreter/OptionGroupPythonClassWithDict.h | 20 +- lldb/include/lldb/Interpreter/ScriptInterpreter.h | 31 +- lldb/include/lldb/Target/MemoryRegionInfo.h | 30 +- .../breakpoint_command/TestBreakpointCommand.py | 8 +- .../TestBreakpointCommandsFromPython.py | 83 +- .../breakpoint/breakpoint_command/bktptcmd.py | 18 + lldb/scripts/Python/python-wrapper.swig | 17 +- lldb/scripts/interface/SBBreakpoint.i | 8 + lldb/scripts/interface/SBBreakpointLocation.i | 11 +- lldb/scripts/interface/SBBreakpointName.i | 4 + lldb/source/API/SBBreakpoint.cpp | 34 +- lldb/source/API/SBBreakpointLocation.cpp | 31 +- lldb/source/API/SBBreakpointName.cpp | 37 +- lldb/source/Commands/CommandObjectBreakpoint.cpp | 8 +- .../Commands/CommandObjectBreakpointCommand.cpp | 48 +- lldb/source/Commands/CommandObjectThread.cpp | 12 +- lldb/source/Commands/Options.td | 7 - lldb/source/Core/ValueObject.cpp | 53 ++ lldb/source/Core/ValueObjectVariable.cpp | 45 - lldb/source/Host/netbsd/Host.cpp | 1 + .../Interpreter/OptionGroupPythonClassWithDict.cpp | 61 +- lldb/source/Interpreter/ScriptInterpreter.cpp | 12 +- .../Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp | 7 +- .../Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp | 25 +- .../Plugins/Process/minidump/MinidumpParser.cpp | 72 +- .../Plugins/Process/minidump/MinidumpParser.h | 10 +- .../Plugins/Process/minidump/ProcessMinidump.cpp | 41 +- .../Plugins/Process/minidump/ProcessMinidump.h | 3 + .../Python/ScriptInterpreterPython.cpp | 105 ++- .../Python/ScriptInterpreterPython.h | 8 + .../Python/ScriptInterpreterPythonImpl.h | 22 +- lldb/source/Target/CMakeLists.txt | 1 + lldb/source/Target/MemoryRegionInfo.cpp | 20 + lldb/test/Shell/Minidump/memory-region.yaml | 49 ++ .../Shell/ObjectFile/PECOFF/export-dllfunc.yaml | 10 +- .../PECOFF/{subsections.yaml => sections.yaml} | 48 +- .../Shell/SymbolFile/DWARF/DW_OP_piece-struct.s | 113 +++ lldb/tools/driver/Driver.cpp | 19 + .../Process/minidump/MinidumpParserTest.cpp | 163 ++-- .../ScriptInterpreter/Python/PythonTestSuite.cpp | 3 +- lldb/utils/TableGen/LLDBPropertyDefEmitter.cpp | 15 + llvm/CMakeLists.txt | 6 +- llvm/bindings/python/llvm/common.py | 4 +- llvm/cmake/modules/AddLLVM.cmake | 4 +- llvm/cmake/modules/HandleLLVMOptions.cmake | 30 +- llvm/docs/CMake.rst | 14 +- llvm/docs/CodeGenerator.rst | 10 +- llvm/docs/DeveloperPolicy.rst | 55 +- llvm/docs/FuzzingLLVM.rst | 2 +- llvm/docs/GlobalISel.rst | 940 --------------------- llvm/docs/GlobalISel/GMIR.rst | 158 ++++ llvm/docs/GlobalISel/IRTranslator.rst | 57 ++ llvm/docs/GlobalISel/InstructionSelect.rst | 98 +++ llvm/docs/GlobalISel/Legalizer.rst | 351 ++++++++ llvm/docs/GlobalISel/Pipeline.rst | 82 ++ llvm/docs/GlobalISel/Porting.rst | 21 + llvm/docs/GlobalISel/RegBankSelect.rst | 73 ++ llvm/docs/GlobalISel/Resources.rst | 11 + llvm/docs/GlobalISel/index.rst | 94 +++ llvm/docs/Reference.rst | 6 +- llvm/include/llvm/ADT/APInt.h | 4 + llvm/include/llvm/ADT/StringRef.h | 8 +- llvm/include/llvm/Analysis/ScalarEvolution.h | 62 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 9 +- .../llvm/Analysis/TargetTransformInfoImpl.h | 2 +- llvm/include/llvm/CodeGen/BasicTTIImpl.h | 9 +- .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 10 +- llvm/include/llvm/IR/IRBuilder.h | 22 + llvm/include/llvm/IR/Instructions.h | 4 +- llvm/include/llvm/Object/ELF.h | 11 +- llvm/include/llvm/ObjectYAML/ELFYAML.h | 21 + llvm/include/llvm/Support/YAMLTraits.h | 3 +- llvm/lib/Analysis/ScalarEvolution.cpp | 47 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 10 +- llvm/lib/AsmParser/LLParser.cpp | 3 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 25 + llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 5 +- llvm/lib/CodeGen/LiveDebugValues.cpp | 33 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 12 + .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 31 +- llvm/lib/CodeGen/SjLjEHPrepare.cpp | 6 +- llvm/lib/IR/Instructions.cpp | 27 +- llvm/lib/MC/MCParser/AsmParser.cpp | 7 +- llvm/lib/ObjectYAML/ELFEmitter.cpp | 72 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 38 + llvm/lib/Support/APInt.cpp | 40 + .../Target/AArch64/AArch64TargetTransformInfo.cpp | 8 +- .../Target/AArch64/AArch64TargetTransformInfo.h | 2 +- llvm/lib/Target/AMDGPU/AMDGPUGISel.td | 2 + llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 15 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 78 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 5 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 3 +- llvm/lib/Target/AMDGPU/FLATInstructions.td | 85 +- llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp | 3 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 161 +++- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 7 - llvm/lib/Target/AMDGPU/SIISelLowering.h | 8 + llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 28 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 11 + llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 8 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 2 +- llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp | 15 +- .../Target/Hexagon/HexagonTargetTransformInfo.cpp | 31 +- .../Target/Hexagon/HexagonTargetTransformInfo.h | 5 +- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 20 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 4 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 219 +++++ llvm/lib/Target/PowerPC/PPCInstrInfo.h | 10 + llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp | 8 + llvm/lib/Target/PowerPC/PPCRegisterInfo.h | 9 + llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 11 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h | 2 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 7 +- .../Target/SystemZ/SystemZTargetTransformInfo.cpp | 4 +- .../Target/SystemZ/SystemZTargetTransformInfo.h | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 4 + llvm/lib/Target/X86/X86InstructionSelector.cpp | 78 -- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 21 +- llvm/lib/Target/X86/X86TargetTransformInfo.h | 2 +- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 5 +- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 6 +- llvm/lib/Transforms/Scalar/SROA.cpp | 21 +- llvm/lib/Transforms/Utils/FunctionImportUtils.cpp | 16 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 10 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 14 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 6 +- .../inst-select-amdgpu-atomic-cmpxchg-flat.mir | 374 ++++++++ .../legalize-atomic-cmpxchg-with-success.mir | 21 +- .../AMDGPU/GlobalISel/legalize-atomic-cmpxchg.mir | 96 ++- ...lize-fast-unsafe-fdiv.mir => legalize-fdiv.mir} | 468 +++++++--- .../GlobalISel/legalize-insert-vector-elt.mir | 48 ++ llvm/test/CodeGen/AMDGPU/dpp_combine.mir | 16 + llvm/test/CodeGen/AMDGPU/fold-sgpr-copy.mir | 48 ++ llvm/test/CodeGen/AMDGPU/mfma-loop.ll | 368 +++++++- llvm/test/CodeGen/AMDGPU/split-arg-dbg-value.ll | 3 +- .../vgpr-descriptor-waterfall-loop-idom-update.ll | 48 ++ llvm/test/CodeGen/BPF/CORE/field-reloc-alu32.ll | 73 ++ llvm/test/CodeGen/BPF/CORE/intrinsic-array.ll | 1 + .../BPF/CORE/intrinsic-fieldinfo-byte-size-1.ll | 15 +- .../BPF/CORE/intrinsic-fieldinfo-byte-size-2.ll | 12 +- .../BPF/CORE/intrinsic-fieldinfo-byte-size-3.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-existence-1.ll | 15 +- .../BPF/CORE/intrinsic-fieldinfo-existence-2.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-existence-3.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-lshift-1.ll | 15 +- .../BPF/CORE/intrinsic-fieldinfo-lshift-2.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-rshift-1.ll | 15 +- .../BPF/CORE/intrinsic-fieldinfo-rshift-2.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-rshift-3.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-signedness-1.ll | 15 +- .../BPF/CORE/intrinsic-fieldinfo-signedness-2.ll | 12 +- .../BPF/CORE/intrinsic-fieldinfo-signedness-3.ll | 9 +- llvm/test/CodeGen/BPF/CORE/intrinsic-struct.ll | 1 + llvm/test/CodeGen/BPF/CORE/intrinsic-union.ll | 1 + .../CodeGen/BPF/CORE/offset-reloc-access-str.ll | 2 + llvm/test/CodeGen/BPF/CORE/offset-reloc-basic.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-array-1.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-array-2.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-struct-1.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-struct-2.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-struct-3.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-union-1.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-union-2.ll | 2 + .../test/CodeGen/BPF/CORE/offset-reloc-end-load.ll | 6 +- llvm/test/CodeGen/BPF/CORE/offset-reloc-end-ret.ll | 3 +- .../CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll | 1 + .../CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll | 2 + .../test/CodeGen/BPF/CORE/offset-reloc-global-1.ll | 2 + .../test/CodeGen/BPF/CORE/offset-reloc-global-2.ll | 2 + .../test/CodeGen/BPF/CORE/offset-reloc-global-3.ll | 2 + llvm/test/CodeGen/BPF/CORE/offset-reloc-ignore.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-middle-chain.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-multi-array-1.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-multi-array-2.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-multilevel.ll | 6 +- .../CodeGen/BPF/CORE/offset-reloc-pointer-1.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-pointer-2.ll | 2 + .../BPF/CORE/offset-reloc-struct-anonymous.ll | 8 +- .../CodeGen/BPF/CORE/offset-reloc-struct-array.ll | 6 +- .../CodeGen/BPF/CORE/offset-reloc-typedef-array.ll | 2 + .../BPF/CORE/offset-reloc-typedef-struct.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-typedef-union.ll | 2 + llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef.ll | 2 + llvm/test/CodeGen/BPF/CORE/offset-reloc-union.ll | 6 +- .../GlobalISel/instruction-select/fsqrt_vec.mir | 60 ++ .../Mips/GlobalISel/legalizer/fsqrt_vec.mir | 56 ++ .../GlobalISel/legalizer/fsqrt_vec_builtin.mir | 60 ++ .../CodeGen/Mips/GlobalISel/llvm-ir/fsqrt_vec.ll | 34 + .../Mips/GlobalISel/llvm-ir/fsqrt_vec_builtin.ll | 35 + .../Mips/GlobalISel/regbankselect/fsqrt_vec.mir | 58 ++ .../CodeGen/PowerPC/fold-frame-offset-using-rr.mir | 52 +- llvm/test/CodeGen/PowerPC/machine-backward-cp.mir | 1 + llvm/test/CodeGen/PowerPC/popcnt-zext.ll | 55 +- llvm/test/CodeGen/RISCV/fp16-promote.ll | 142 ++++ llvm/test/CodeGen/X86/extractelement-index.ll | 36 + .../MC/ARM/arm-load-store-multiple-deprecated.s | 4 + llvm/test/Object/invalid.test | 2 +- .../TableGen/GICombinerEmitter/defs-invalid.td | 42 + .../TableGen/GICombinerEmitter/match-invalid.td | 71 ++ llvm/test/ThinLTO/X86/Inputs/guid_collision.ll | 12 + llvm/test/ThinLTO/X86/guid_collision.ll | 17 + .../CorrelatedValuePropagation/phi-common-val.ll | 27 + .../llvm-objcopy/ELF/set-section-alignment.test | 1 + .../MachO/Inputs/min_iphoneos_version_lc.yaml | 15 + .../MachO/Inputs/min_macos_version_lc.yaml | 15 + .../MachO/Inputs/min_tvos_version_lc.yaml | 15 + .../MachO/Inputs/min_watchos_version_lc.yaml | 15 + .../MachO/min-version-load-commands.test | 20 + .../test/tools/llvm-readobj/elf-section-types.test | 1 + llvm/test/tools/llvm-readobj/gnu-notes.test | 12 +- llvm/test/tools/llvm-size/elf-sysv.test | 1 + .../test/tools/obj2yaml/elf-ppc64-relocations.yaml | 92 -- llvm/test/tools/obj2yaml/elf-sht-symtab-shndx.yaml | 3 +- llvm/test/tools/obj2yaml/no-symbol-reloc.test | 2 - .../obj2yaml/relocation-unsupported-machine.yaml | 2 - .../tools/yaml2obj/implicit-sections-types.test | 1 + llvm/tools/bugpoint/CMakeLists.txt | 2 +- llvm/tools/llc/CMakeLists.txt | 2 +- .../llvm-objcopy/MachO/MachOLayoutBuilder.cpp | 3 + llvm/tools/obj2yaml/elf2yaml.cpp | 70 +- llvm/tools/opt/CMakeLists.txt | 2 +- llvm/unittests/ADT/APIntTest.cpp | 35 + llvm/unittests/IR/IRBuilderTest.cpp | 9 + llvm/utils/TableGen/GICombinerEmitter.cpp | 3 + llvm/utils/git-svn/git-llvm | 17 +- .../secondary/clang/include/clang/Basic/BUILD.gn | 22 +- llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/CodeGen/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn | 11 +- llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn | 2 + .../gn/secondary/clang/utils/TableGen/BUILD.gn | 1 + .../gn/secondary/llvm/unittests/Support/BUILD.gn | 1 - llvm/utils/lit/lit/cl_arguments.py | 3 + llvm/utils/lit/lit/display.py | 15 +- llvm/utils/lit/lit/main.py | 51 +- llvm/utils/lit/lit/run.py | 3 + llvm/utils/lit/lit/util.py | 2 + .../tests/Inputs/shtest-shell/stdout-encoding.txt | 7 + llvm/utils/lit/tests/max-failures.py | 2 +- llvm/utils/lit/tests/shtest-shell.py | 14 +- .../deviceRTLs/nvptx/src/omptarget-nvptx.h | 22 +- .../deviceRTLs/nvptx/src/target_impl.h | 15 + openmp/runtime/src/kmp_taskdeps.cpp | 8 +- 297 files changed, 6065 insertions(+), 2501 deletions(-) create mode 100644 clang/test/ClangScanDeps/Inputs/module.modulemap create mode 100644 clang/test/ClangScanDeps/Inputs/modules_cdb.json create mode 100644 clang/test/ClangScanDeps/modules.cpp create mode 100644 clang/test/Sema/typo-correction-ambiguity.c create mode 100644 lldb/source/Target/MemoryRegionInfo.cpp create mode 100644 lldb/test/Shell/Minidump/memory-region.yaml rename lldb/test/Shell/ObjectFile/PECOFF/{subsections.yaml => sections.yaml} (65%) create mode 100644 lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-struct.s delete mode 100644 llvm/docs/GlobalISel.rst create mode 100644 llvm/docs/GlobalISel/GMIR.rst create mode 100644 llvm/docs/GlobalISel/IRTranslator.rst create mode 100644 llvm/docs/GlobalISel/InstructionSelect.rst create mode 100644 llvm/docs/GlobalISel/Legalizer.rst create mode 100644 llvm/docs/GlobalISel/Pipeline.rst create mode 100644 llvm/docs/GlobalISel/Porting.rst create mode 100644 llvm/docs/GlobalISel/RegBankSelect.rst create mode 100644 llvm/docs/GlobalISel/Resources.rst create mode 100644 llvm/docs/GlobalISel/index.rst create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-c [...] rename llvm/test/CodeGen/AMDGPU/GlobalISel/{legalize-fast-unsafe-fdiv.mir => legal [...] create mode 100644 llvm/test/CodeGen/AMDGPU/fold-sgpr-copy.mir create mode 100644 llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll create mode 100644 llvm/test/CodeGen/BPF/CORE/field-reloc-alu32.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/fsqrt_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/fsqrt_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/fsqrt_vec_builtin.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fsqrt_vec.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fsqrt_vec_builtin.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/regbankselect/fsqrt_vec.mir create mode 100644 llvm/test/CodeGen/RISCV/fp16-promote.ll create mode 100644 llvm/test/TableGen/GICombinerEmitter/defs-invalid.td create mode 100644 llvm/test/TableGen/GICombinerEmitter/match-invalid.td create mode 100644 llvm/test/ThinLTO/X86/Inputs/guid_collision.ll create mode 100644 llvm/test/ThinLTO/X86/guid_collision.ll create mode 100644 llvm/test/tools/llvm-objcopy/MachO/Inputs/min_iphoneos_version_lc.yaml create mode 100644 llvm/test/tools/llvm-objcopy/MachO/Inputs/min_macos_version_lc.yaml create mode 100644 llvm/test/tools/llvm-objcopy/MachO/Inputs/min_tvos_version_lc.yaml create mode 100644 llvm/test/tools/llvm-objcopy/MachO/Inputs/min_watchos_version_lc.yaml create mode 100644 llvm/test/tools/llvm-objcopy/MachO/min-version-load-commands.test create mode 100644 llvm/utils/lit/tests/Inputs/shtest-shell/stdout-encoding.txt