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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/llvm-project.
from e9775bb5d81 Hexagon: Fix missing tablegen mode comment adds 5ce2ca524e9 AMDGPU/GlobalISel: Use SReg_32 for readfirstlane constraining adds 33a1b3d8fce [sanitizer] Link Sanitizer-x86_64-Test-Nolibc with -static adds dce7a362bed [ELF] Improve the condition to create .interp adds a33cab0f06e AMDGPU: Adjust test so it will work with GlobalISel adds c51b45e32ef DebugInfo: Fix rangesBaseAddress DICompileUnit bitcode seri [...] adds 22f34c7f34a lld: Remove explicit copy ops from AssociatedIterator, rely [...] adds f7910496c83 [Intrinsic] Delete tablegen rules of llvm.{sig,}{setjmp,longjmp} adds 044cc919f4b Delete setjmp_undefined_for_msvc workaround after llvm.setj [...] adds 0bc7665d988 [ADT] Fix FoldingSet documentation typos adds f83a8efe879 [mlir] Merge the successor operand count into BlockOperand. adds a3f89648132 [TargetLowering] Update comment to reference the correct co [...] adds d1b51c5de7a [PowerPC] Modify the hasSideEffects of some VSX instruction [...] adds 8612e92ed59 [lldb][NFC] Remove GetASTContext call in ClangDeclVendor adds 128f39da932 Fix crash in getFullyQualifiedName for inline namespace adds 34769e07835 SimplifyDemandedBits - Remove duplicate getOperand() call. NFC. adds a9ad65a2b34 [PowerPC] Change default for unaligned FP access for older [...] adds b6cf400aaea Fix bots after a9ad65a2b34f adds 3b6aec79b2c [X86] Add test cases for v4i64->v4f32 and v8i64->v8f32 stri [...] new e7853a5ce21 [CMake] Fix lld detection after D69685 new 7ca86ee6494 [COFF] Make the autogenerated .weak.<name>.default symbols static new 0acfc493171 Allow redeclaration of __declspec(uuid) new 36fb199ecaa [lldb][NFC] Remove GetASTContext call in ClangPersistentVariables new bc5b7217dce Revert "[COFF] Make the autogenerated .weak.<name>.default [...]
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Summary of changes: clang/lib/AST/QualTypeNames.cpp | 2 +- clang/lib/Sema/SemaDecl.cpp | 4 + clang/lib/Sema/SemaDeclAttr.cpp | 8 +- clang/test/SemaCXX/ms-uuid.cpp | 6 + clang/unittests/Tooling/QualTypeNamesTest.cpp | 11 + compiler-rt/cmake/Modules/AddCompilerRT.cmake | 2 +- .../lib/sanitizer_common/tests/CMakeLists.txt | 2 +- lld/COFF/Chunks.h | 5 - lld/ELF/Writer.cpp | 2 +- lld/test/ELF/dynamic-linker.s | 12 +- lld/test/ELF/ppc64-func-entry-points.s | 4 +- .../Clang/ASTResultSynthesizer.cpp | 13 +- .../ExpressionParser/Clang/ClangDeclVendor.cpp | 15 +- .../ExpressionParser/Clang/ClangDeclVendor.h | 8 +- .../Clang/ClangModulesDeclVendor.cpp | 6 +- .../Clang/ClangPersistentVariables.cpp | 38 ++-- .../Clang/ClangPersistentVariables.h | 12 +- .../ObjC/AppleObjCRuntime/AppleObjCDeclVendor.cpp | 11 +- .../ObjC/AppleObjCRuntime/AppleObjCDeclVendor.h | 2 +- llvm/include/llvm/ADT/FoldingSet.h | 10 +- llvm/include/llvm/IR/Intrinsics.td | 6 - llvm/lib/AsmParser/LLParser.cpp | 4 +- llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 2 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 1 + llvm/lib/CodeGen/IntrinsicLowering.cpp | 8 - .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 8 - llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 18 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 2 +- llvm/lib/Target/PowerPC/PPC.td | 6 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 3 + llvm/lib/Target/PowerPC/PPCInstrAltivec.td | 4 +- llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 1 + llvm/lib/Target/PowerPC/PPCSubtarget.h | 2 + llvm/test/Assembler/dicompileunit.ll | 4 +- .../regbankselect-amdgcn.ds.gws.init.mir | 4 +- .../regbankselect-amdgcn.ds.gws.sema.v.mir | 2 +- .../regbankselect-amdgcn.ds.ordered.add.mir | 4 +- .../regbankselect-amdgcn.ds.ordered.swap.mir | 4 +- .../GlobalISel/regbankselect-amdgcn.readlane.mir | 4 +- .../GlobalISel/regbankselect-amdgcn.s.sendmsg.mir | 2 +- .../regbankselect-amdgcn.s.sendmsghalt.mir | 2 +- .../GlobalISel/regbankselect-amdgcn.writelane.mir | 8 +- llvm/test/CodeGen/AMDGPU/read_register.ll | 16 +- llvm/test/CodeGen/PowerPC/2007-09-08-unaligned.ll | 3 +- llvm/test/CodeGen/PowerPC/pre-inc-disable.ll | 60 ++--- llvm/test/CodeGen/PowerPC/unaligned-floats.ll | 43 ++++ llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll | 242 +++++++++++++++++++++ llvm/test/CodeGen/X86/vec-strict-inttofp-512.ll | 232 ++++++++++++++++++++ llvm/test/DebugInfo/X86/range_reloc.ll | 2 +- llvm/utils/TableGen/IntrinsicEmitter.cpp | 28 --- mlir/include/mlir/IR/BlockSupport.h | 2 - mlir/include/mlir/IR/Operation.h | 16 +- mlir/include/mlir/IR/UseDefLists.h | 59 +++-- mlir/lib/IR/Operation.cpp | 67 ++---- mlir/lib/IR/Value.cpp | 33 +++ 55 files changed, 798 insertions(+), 277 deletions(-) create mode 100644 llvm/test/CodeGen/PowerPC/unaligned-floats.ll