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from 6c9938cf11d [RISCV] Codegen support for memory operations on global addresses new eacca308e4e [RISCV] Codegen for conditional branches
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Summary of changes: lib/Target/RISCV/RISCVCallingConv.td | 3 + lib/Target/RISCV/RISCVISelLowering.cpp | 1 + lib/Target/RISCV/RISCVInstrInfo.cpp | 33 +++++++++ lib/Target/RISCV/RISCVInstrInfo.h | 12 +++- lib/Target/RISCV/RISCVInstrInfo.td | 36 +++++++++- lib/Target/RISCV/RISCVMCInstLower.cpp | 4 ++ lib/Target/RISCV/RISCVRegisterInfo.cpp | 31 ++++++++- lib/Target/RISCV/RISCVRegisterInfo.h | 2 + test/CodeGen/RISCV/branch.ll | 121 +++++++++++++++++++++++++++++++++ 9 files changed, 239 insertions(+), 4 deletions(-) create mode 100644 test/CodeGen/RISCV/branch.ll