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from a5dd191d8dc [llvm-lipo] Update llvm-lipo docs for -archs flag new 81930059a1c [Mips] Add s.d instruction alias for Mips1 new 7a1388e6efb [AMDGPU] gfx1010 premlane instructions
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Summary of changes: include/llvm/IR/IntrinsicsAMDGPU.td | 12 + lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 19 ++ lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 44 +++ lib/Target/AMDGPU/GCNHazardRecognizer.h | 2 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 12 + lib/Target/AMDGPU/SIISelLowering.cpp | 18 ++ lib/Target/AMDGPU/SIInstrInfo.cpp | 20 ++ lib/Target/AMDGPU/VOP3Instructions.td | 28 ++ lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 50 ++++ lib/Target/Mips/MipsInstrFPU.td | 8 + test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll | 311 +++++++++++++++++++++ test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir | 145 ++++++++++ test/MC/Mips/mips1/sd.s | 13 + 13 files changed, 681 insertions(+), 1 deletion(-) create mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll create mode 100644 test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir create mode 100644 test/MC/Mips/mips1/sd.s