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from f9cb357ae96 RISC-V: Fix incorrect nregs calculation for VLS modes new a0e042d61da RISC-V: Suppress bogus warning for VLS types new 5ead44d0d02 Revert "libstdc++: Use GLIBCXX_CHECK_LINKER_FEATURES for cr [...] new 0c37fef39fa riscv: bitmanip: Remove duplicate zero_extendhiGPR:mode2 pattern new 109c11f62b0 Daily bump. new 62a550e7ec9 LoongArch: Adjust C++ multilib header layout. new d07682dc254 LoongArch: Fix unintentional bash-ism in r14-3665. new f3ba57163ce LoongArch: Enable -fsched-pressure by default at -O1 and higher. new 478c37e7234 Update contrib + libgomp ChangeLogs for failed reject-commi [...] new 0e25761b373 riscv: thead: Fix mode attribute for extension patterns new d8bdc978dc9 riscv: xtheadbb: Fix extendqi<SUPERQI> insn
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Summary of changes: contrib/ChangeLog | 41 +++++++ gcc/ChangeLog | 133 ++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 26 +++++ gcc/common/config/loongarch/loongarch-common.cc | 1 + gcc/config.gcc | 2 +- gcc/config/riscv/bitmanip.md | 13 +-- gcc/config/riscv/riscv.cc | 2 +- gcc/config/riscv/thead.md | 21 +++- gcc/cp/ChangeLog | 5 + gcc/rust/ChangeLog | 11 ++ gcc/testsuite/ChangeLog | 83 ++++++++++++++ gcc/testsuite/gcc.target/riscv/xtheadbb-ext-2.c | 12 ++ gcc/testsuite/gcc.target/riscv/xtheadbb-ext-3.c | 12 ++ libgomp/ChangeLog | 11 ++ libstdc++-v3/ChangeLog | 144 ++++++++++++++++++++++++ libstdc++-v3/config/cpu/loongarch/t-loongarch | 1 + libstdc++-v3/configure.host | 5 +- 18 files changed, 504 insertions(+), 21 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadbb-ext-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadbb-ext-3.c create mode 100644 libstdc++-v3/config/cpu/loongarch/t-loongarch