This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/llvm-project.
from 88b0d20edf6 Revert "[FileCheck] Simplify numeric variable interface" adds b6654319f7a Remove `XFAIL: ios` from test that passes in CI adds b1ff896e92a XFAIL a few failing TSan-fiber tests for iOS adds 705e46f449e RegUsageInfoCollector: Skip AMDGPU entry point functions adds 0ffe0db6fab [RegisterCoalescer] Fix an overzealous assert adds a2ca358291a [TSan] Attempt to fix iOS on-device test adds adeb5ac2d64 [Rewrite] Extend to further accept CharSourceRange adds 9e62c864087 [IRBuilder] Introduce helpers for and/or of multiple values [...] adds 9812668d771 [IRBuilder] Fold consistently for or/and whether constant i [...] adds 1ab3fe8a7a6 Make list::remove/remove_if/unique all return void before C [...] adds a01502f1bab [LFTR] Regenerate test checks; NFC adds 7770f83d614 [Rewrite] Try to fix buildbot link fail caused by r365258 adds 87856e739c8 [Rewrite] Try to fix buildbot link fail left by r365263 adds 8c036bf784e [X86] Copy some test cases from vector-shuffle-sse1.ll to v [...] adds 913105ca42b [X86] Add patterns to select MOVLPDrm from MOVSD+load and M [...] adds 317d6093df7 [X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions. adds e753247b061 [X86] Add PS<->PD domain changing support for MOVH/MOVL loa [...] adds 9c68aa33e3b [DAGCombine] convertBuildVecZextToZext - remove duplicate g [...] adds 01f1bad6182 [X86] LowerBuildVectorv16i8 - pull out repeated getOperand( [...] adds a7145c45a7e [X86] SimplifyDemandedVectorEltsForTargetNode - fix shadow [...] new 9e52c43090f Treat the range of representable values of floating-point t [...]
The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang/docs/UndefinedBehaviorSanitizer.rst | 18 +- clang/include/clang/Basic/Sanitizers.def | 2 +- clang/include/clang/Rewrite/Core/Rewriter.h | 18 +- clang/lib/AST/ExprConstant.cpp | 22 +- clang/lib/CodeGen/CGExprScalar.cpp | 178 ++++------- clang/lib/Rewrite/Rewriter.cpp | 9 +- clang/test/CXX/expr/expr.const/p2-0x.cpp | 28 +- clang/test/CodeGen/catch-undef-behavior.c | 42 +-- clang/test/Driver/fsanitize.c | 18 +- clang/test/SemaCXX/constant-expression-cxx1y.cpp | 5 +- clang/unittests/Rewrite/CMakeLists.txt | 4 + clang/unittests/Rewrite/RewriterTest.cpp | 80 +++++ compiler-rt/test/fuzzer/fuzzer-printcovpcs.test | 1 - compiler-rt/test/fuzzer/seed_inputs.test | 8 +- compiler-rt/test/tsan/fiber_from_thread.cc | 1 + compiler-rt/test/tsan/fiber_longjmp.cc | 1 + compiler-rt/test/tsan/fiber_race.cc | 1 + compiler-rt/test/tsan/fiber_simple.cc | 1 + compiler-rt/test/tsan/fiber_two_threads.cc | 1 + libcxx/include/list | 33 ++- .../sequences/list/list.ops/remove.pass.cpp | 27 +- .../sequences/list/list.ops/remove_if.pass.cpp | 30 +- .../sequences/list/list.ops/unique.pass.cpp | 16 +- .../sequences/list/list.ops/unique_pred.pass.cpp | 30 +- llvm/include/llvm/IR/IRBuilder.h | 22 ++ llvm/lib/CodeGen/RegUsageInfoCollector.cpp | 48 ++- llvm/lib/CodeGen/RegisterCoalescer.cpp | 9 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 12 +- llvm/lib/Target/X86/X86InstrAVX512.td | 12 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 30 +- llvm/lib/Target/X86/X86InstrSSE.td | 34 ++- .../Transforms/Instrumentation/MemorySanitizer.cpp | 6 +- llvm/lib/Transforms/Scalar/LoopPredication.cpp | 18 +- llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 11 +- .../wrapping-pointer-versioning.ll | 24 +- llvm/test/CodeGen/ARM/ipra-reg-usage.ll | 3 + .../regcoal-undef-lane-4-rm-cp-commuting-def.mir | 131 +++++++++ llvm/test/CodeGen/X86/avx2-masked-gather.ll | 18 +- llvm/test/CodeGen/X86/avx512-insert-extract.ll | 4 +- llvm/test/CodeGen/X86/avx512-masked-memop-64-32.ll | 2 +- llvm/test/CodeGen/X86/dag-merge-fast-accesses.ll | 4 +- llvm/test/CodeGen/X86/extract-store.ll | 8 +- llvm/test/CodeGen/X86/extractelement-load.ll | 4 +- llvm/test/CodeGen/X86/fma.ll | 62 ++-- llvm/test/CodeGen/X86/gather-addresses.ll | 20 +- llvm/test/CodeGen/X86/half.ll | 12 +- .../CodeGen/X86/insert-into-constant-vector.ll | 30 +- llvm/test/CodeGen/X86/insertelement-ones.ll | 12 +- llvm/test/CodeGen/X86/ipra-inline-asm.ll | 2 + llvm/test/CodeGen/X86/ipra-reg-usage.ll | 3 + llvm/test/CodeGen/X86/masked_compressstore.ll | 144 ++++----- llvm/test/CodeGen/X86/masked_expandload.ll | 324 ++++++++++----------- .../CodeGen/X86/masked_gather_scatter_widen.ll | 8 +- llvm/test/CodeGen/X86/masked_load.ll | 282 +++++++++--------- llvm/test/CodeGen/X86/masked_store.ll | 44 +-- .../CodeGen/X86/merge-consecutive-loads-128.ll | 2 +- .../CodeGen/X86/merge-consecutive-loads-256.ll | 38 +-- .../CodeGen/X86/merge-consecutive-loads-512.ll | 4 +- llvm/test/CodeGen/X86/nontemporal-2.ll | 8 +- llvm/test/CodeGen/X86/oddshuffles.ll | 18 +- llvm/test/CodeGen/X86/pr11334.ll | 10 +- llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll | 36 +-- llvm/test/CodeGen/X86/sse-only.ll | 6 +- llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll | 48 +-- llvm/test/CodeGen/X86/sse2.ll | 24 +- llvm/test/CodeGen/X86/sse3.ll | 12 +- llvm/test/CodeGen/X86/var-permute-128.ll | 4 +- llvm/test/CodeGen/X86/vec_insert-2.ll | 2 +- llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll | 60 +++- llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll | 64 +++- llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 6 +- llvm/test/CodeGen/X86/vector-shuffle-combining.ll | 4 +- .../CodeGen/X86/vector-shuffle-variable-128.ll | 4 +- .../CodeGen/X86/vector-shuffle-variable-256.ll | 8 +- llvm/test/Instrumentation/BoundsChecking/opt.ll | 2 - .../IndVarSimplify/{pr20680.ll => lftr-pr20680.ll} | 150 +++++++++- .../LoopDistribute/scev-inserted-runtime-check.ll | 29 +- llvm/test/Transforms/LoopPredication/basic.ll | 3 +- .../basic_widenable_branch_guards.ll | 5 +- .../Transforms/LoopPredication/invariant_load.ll | 3 +- .../X86/illegal-parallel-loop-uniform-write.ll | 35 ++- llvm/test/Transforms/LoopVectorize/X86/pr35432.ll | 45 ++- .../LoopVectorize/pr30654-phiscev-sext-trunc.ll | 6 +- 84 files changed, 1534 insertions(+), 1021 deletions(-) create mode 100644 clang/unittests/Rewrite/RewriterTest.cpp create mode 100644 llvm/test/CodeGen/SystemZ/regcoal-undef-lane-4-rm-cp-commuting-def.mir rename llvm/test/Transforms/IndVarSimplify/{pr20680.ll => lftr-pr20680.ll} (53%)