[Tcwg-commits] [llvm] branch master updated (fe252ffdaa6 -> d9d2f4eb1fc)

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from fe252ffdaa6 [AArch64] Fix order of checks in shouldScheduleAdjacent. new d9d2f4eb1fc Add test for store merge with noimplicitfloat

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Summary of changes: .../CodeGen/AArch64/mergestores_noimplicitfloat.ll | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 test/CodeGen/AArch64/mergestores_noimplicitfloat.ll