[Tcwg-commits] [llvm] branch stable updated (985d9f16815 -> 36b8e0d064a)

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from 985d9f16815 Creating branches/google/stable and tags/google/stable/2018 [...] adds b10248393f5 [ARM] Fix correctness checks in promoteToConstantPool. adds 552971168d6 [WebAssembly] Fix memory leak on WasmEHFuncInfo adds 7776c2f4d8d [LLVM-C] Add an accessor for the "value type" of a global adds 30635bc8de5 [ValueTracking] Allow select patterns to work on FP vectors adds 7373792b4aa [ORC] Add more utilities to aid debugging output. adds 94cc8ba7207 [ORC] Make MaterializationResponsibility::getRequestedSymbo [...] adds 05252670a61 [cxx2a] Fix warning triggered by r343285 adds cde69b248ec Fix comment indentation in addLandingPad adds a1ab6444810 [X86][SSE] Fixed issue with v2i64 variable shifts on 32-bit [...] adds 2a55d07e77a [X86] getTargetConstantBitsFromNode - add support for peeki [...] adds db283fd1bb3 [X86] Regenerate fma comments. adds 25f97823145 [X86] getTargetConstantBitsFromNode - fix self-move asserti [...] adds 5bf17aa03a0 [InstCombine] add test for vector widening of insertelements; NFC adds bdd68c5514e [InstCombine] fix formatting in vector evaluators; NFC adds 9e59026f782 [X86][SSE] LowerScalarImmediateShift - use getTargetConstan [...] adds bb664accc23 [X86] getTargetConstantBitsFromNode - add support for rearr [...] adds 204e40ee59d Fix signed/unsigned mismatch warning. NFCI. adds aa55d1b77cb [X86][SSE] LowerScalarImmediateShift - remove 32-bit vXi64 [...] adds 59b80ed4d57 [X86] Add fast-isel test cases for unaligned load/store int [...] adds bbb291c0d3c [X86] SimplifyDemandedVectorEltsForTargetNode - remove iden [...] adds ca85b1757cd [X86][AVX2] Cleanup shuffle combining tests - add common prefixes adds 21b46b07d71 [DAGCombiner][NFC] Tests for X div/rem Y single bit fold adds efac3737826 [PDB] Better native API support for pointers. adds c7013cd325e Add a comment to clarify the contract for LLVMGetErrorMessa [...] adds 974e7049611 [ORC] Clear SymbolToDefinitionMap when materializing a Mate [...] adds 90c3271e8e4 [ORC] Add partitioning support to CompileOnDemandLayer2. adds 02b1e4becf7 Fix some tests on Windows. adds 78ce4df1177 Only dump the types we need in the test. adds ecbe2f8e5e0 [X86] Disable BMI BEXTR in X86DAGToDAGISel::matchBEXTRFromA [...] adds 523dd2651f3 [PDB] Fix this test for real. adds d09ede48281 [X86] Regenerate MMX coalescing test adds 219704f8eed [NFC][CodeGen][X86][AArch64] Add 64-bit constant bit field [...] adds 435f54e4646 [DAG] Don't perform SINT_TO_FP<->UINT_TO_FP custom conversi [...] adds 22030c13ce7 [InstCombine] allow lengthening of insertelement to elimina [...] adds 8594ae08601 [InstCombine] try to convert vector insert+extract to trunc adds 0de6a84fee3 [X86][BtVer2] Add the ability to add additional uops for fo [...] adds e1b020acef2 [PDB] Add native support for dumping array types. adds 7eb858a56a2 [X86][Btver2] Fix PCmpIStrI/PCmpIStrM schedules adds 40eee5d07bd [LLVM-MCA][X86] Add some AVX512 tests adds e299be6492d [PHIElimination] Update the regression test for PR16508 adds cce9df65256 [PHIElimination] Lower a PHI node with only undef uses as I [...] adds c4936565e39 [X86] Copy memrefs when folding a load for division instruc [...] adds 62431ad72c3 [LLVM-MCA][X86] Add missing VCMPESTR/VCMPESTR tests adds 04756ee5266 [ORC] Extract and tidy up JITTargetMachineBuilder, add unit test. adds abccef1dfdd [X86] Fix scheduler class for BTmi instructions adds c466264b345 Use the container form llvm::sort(C, ...) adds 0e735f0b53f [ORC] Add an 'intern' method to ExecutionEngine for interni [...] adds 6b41faf1c9e [X86] Change an llvm_unreachable to a report_fatal_error so [...] adds 4e8d0ef849e [ORC] Add a method to JITTargetMachineBuilder to get the de [...] adds 2887f2e5941 [ORC] Add convenience methods for creating DynamicLibraryFa [...] adds eaf1a19dc4a [ORC] Pass Symbols to ExecutionSession::lookup by value, po [...] adds 62c612fdecf [X86] Stop X86DomainReassignment from creating copies betwe [...] adds e7e54cd1867 [CodeGen][NFC] Add tests for heterogeneous types in MergeCo [...] adds 42b54435076 [DebugInfo][Dexter] Incorrect DBG_VALUE after MCP dead copy [...] adds 90a5fbf4c67 [X86][Sched] Add pfm uop counter definitions for SNB,BDW,SKX. adds d80543967df [X86][Sched] Update scheduling information for VZEROALL on [...] adds 9cfef4ca8ff Recommit r343308: [LoopInterchange] Turn into a loop pass. adds cc27a05389e [llvm-objcopy] Adding support for decompressing zlib compre [...] adds f7f974d7eff [X86][BtVer2] Teach how to identify zero-idiom VPERM2F128rr [...] adds 2d661fe936f [NFC] Adding "REQUIRES: zlib" to a llvm-objcopy test for bo [...] adds 00e50653ed5 [AMDGPU] Divergence driven instruction selection. Shift ope [...] adds 0640a7318b1 [llvm-exegesis][NFC] Make randomizeUnsetVariables a free function. adds f7f9563cf46 Revert r343407 "[InstCombine] try to convert vector insert+ [...] adds a46ae181007 [Support] Listing a directory containing dangling symlinks [...] adds ed2d3e4fffe [llvm-exegesis][NFC] Move random functions from CodeTemplat [...] adds 1607bc84f24 [X86][Btver2] Fix masked load schedule adds eab58e03b0f [LLVM-C] Add an accessor for the kind of a Metadata Node adds 71670be4acf Move llvm util dependencies from clang-tools-extra to add_l [...] adds 3e27a44e649 [X86] Create schedule classes for BTmi and BTmr instructions adds 0b13e127297 [InstCombine] add more insert-extract tests for D52439; NFC adds f7cc35b1ce4 [InstCombine] try to convert vector insert+extract to trunc [...] adds a1b6ce1b110 [X86][Btver2] Fix BTmr schedule uop counts adds b4f7a97945b [mips] Generate tests expectations using update_llc_test_ch [...] adds 6b99c7f259d [InstCombine] Handle vector compares in foldGEPIcmp(), take 2 adds 9a604d610c6 [X86] Remove unnecessary BTmi/BTmr scheduler overrides adds a86f87cfc71 [AArch64] Refactor cheap cost model adds 3865b5ff69b [X86] Create schedule classes for BT(C|R|S)mi and BT(C|R|S) [...] adds f8aaa5b2fb4 [x86] add tests for 256- and 512-bit vector types for scala [...] adds c2625345a6c DAGCombiner: StoreMerging: Fix bad index calculating when a [...] adds c442198d91f [X86][Btver2] Fix BT(C|R|S)mr & BT(C|R|S)mi schedule latenc [...] adds b023cfc60d2 [X86] Improve test instruction shrinking when the sign flag [...] adds f0bd8cc3086 [X86] Enable load folding in the test shrinking code adds 2e04af78a2d [WebAssembly] Fixed AsmParser not allowing instructions with / adds 429bce6ae9f MIRParser: Check that instructions only reference DILocatio [...] adds a93560b336f [PDB] Add support for parsing VFTable Shape records. adds b47810926d8 [PDB] Add support for dumping Typedef records. adds cdda304902d [AMDGPU] Fixed SIInstrInfo::getOpSize to handle subregs adds beae29ccd48 [Hexagon] Remove incorrect pattern for swiz adds 5c1f4358a9b Revert r343499 and r343498. X86 test improvements adds f6d7cdc06b5 [X86] Add more test shrinking with truncate and sign bit us [...] adds 79816c8fee1 X86, AArch64, ARM: Do not attach debug location to spill/re [...] adds 55eda328c50 [globalisel] Add a combiner helpers for extending loads and [...] adds 2f73099e903 Temporarily revert "[GVNHoist] Re-enable GVNHoist by default" adds e957cca256c [PowerPC] Folding XForm to DForm loads requires alignment f [...] adds aba2e4f0055 [InstCombine] regenerate test checks; NFC adds e467ad47eaa [InstCombine] add inverse test for vector trunc canonical f [...] adds 6ba8c38c500 Recommit r343498 "[X86] Improve test instruction shrinking [...] adds d8de965221a Recommit r343499 "[X86] Enable load folding in the test shr [...] adds 02b91a8b773 Fix the Windows build in GlobalISel adds 6d4c271eeb2 [codeview] Emit S_FRAMEPROC and use S_DEFRANGE_FRAMEPOINTER_REL adds 9c94c5fb80f [codeview] Simplify S_DEFRANGE emission code, NFC adds d31f3f62272 Revert: r343521 and r343541: [globalisel] Add a combiner he [...] adds 5877e4ed63b [PDB] Add support for more kinds of PDB Sym Tags. adds e9e1c785d62 [SimplifyCFG] Update comments that refer to CondBB to say T [...] adds 9aca4e8d364 [llvm-mca] Rename the 'Subtract' method to 'subtract' adds 2982360e7a9 [SimplifyCFG] Use Value::hasNUses instead of 'getNumUses() [...] adds 8ffa63b4d58 [AArch64][DAGCombiner]: change -stop-after=isel to instruct [...] adds 0dc07911df8 [MCA] Remove SM.hasNext() call in FetchStage::execute. adds 73aeabb0f06 [WebAssembly] Restore slashes in SIMD conversion names adds b3a02e19253 AMDGPU: Expand atomicrmw nand in IR adds abe8e0a65ff [InstCombine] Tests for ~A - Min/Max(~A, O) -> Max/Min(A, ~ [...] adds 16b860b6ae0 [X86] Standardize floating point assembly comments adds 637450a7f29 [AArch64][v8.5A] Add MTE as an optional AArch64 extension adds cf1b18658c5 [InstCombine] Fold ~A - Min/Max(~A, O) -> Max/Min(A, ~O) - A adds ea81843dbdc [AArch64][v8.5A] Add MTE system instructions adds cc07c6d0507 [AArch64][v8.5A] Add Memory Tagging system registers adds 08e636c3eb8 [AArch64][v8.5A] Add Memory Tagging instructions adds 2c248c12135 [X86] Add APInt constant assembly printer helper adds d3241c78215 [NFC][CodeGen][X86] fma.ll: fix check prefixes for -mcpu=bdver2 adds 67253e401e0 [NFC][CodeGen][X86] lwp-intrinsics.ll: fix check prefixes adds 68276e8ffbf [X86] Remove unnecessary BT(C/R/S)m(i/r) scheduler overrides adds cbe63a8c2bc [InstCombine] add more insert/extract vector tests with FP [...] adds fc829e82f68 [NFC][CodeGen][X86] fma.ll, lwp-intrinsics.ll: actually spe [...] adds f646df2dd3f [ARM] Emmit data symbol for constant pool data adds 1b9f2a9da5f [InstCombine] add tests with undef elements; NFC adds 4cd3487f7fe [Hexagon] Fix extracting subvectors of non-HVX vNi1 adds 2e34e6d02ba [X86][Btver2] Fix BLENDV and AESDEC schedules adds a507425e00f [codeview] Fix 32-bit x86 variable locations in realigned s [...] adds 8f3aebf19b3 [globalisel][verifier] Run the MachineVerifier from IRTrans [...] adds 4e511d4c19d [X86][Disassembler] Add bizarro versions of the MOVSXD inst [...] adds e3f19a892df [llvm-mca] Constify the 'notify' routines. NFC. adds 2a77d5ea7cd Revert "X86, AArch64, ARM: Do not attach debug location to [...] adds cf3208c68b9 [llvm-mca] Remove unecessary forward decls. NFC. adds ab0e7288a66 [CodeView] Emit function options for subprogram and member [...] adds a1e00c37fc0 [CodeView] Only add the Scoped flag for an enum type when [...] adds d4c2f778f77 [globalisel] Attempt to fix llvm-clang-x86_64-expensive-checks-win adds 519b917bb02 [CodeView] Try fixing DebugInfo/X86/dbg-declare-inalloca.ll adds d73a6dca938 [WebAssembly] Stop generating helper functions in WebAssemb [...] adds 1e45d61508b Relax dbg-declare-inalloca.ll test more adds 20ec0569b5a [InstCombine] add icmp+logic tests with commuted ops; NFC adds 2c2c51be40b IR: Move AtomicRMW string names into class adds 90589b69f22 [AMDGPU] Assert in getOpSize() there are no sub-dword subregs adds db3d49018b6 [WebAssembly] any_true and all_true intrinsics and instructions adds 5a81c73c73a Re-commit: [globalisel] Add a combiner helpers for extendin [...] adds 1c8988249a3 Add the missing new files from r343654 adds 9bda9a4b479 Add atomicrmw operation to error messages adds 47e2c38609d AMDGPU: Always run AMDGPUAlwaysInline adds a8aaa535a73 [globalisel] Fix one more missing Verifier pass from gisel- [...] adds 49cc1ce73d4 [AMDGPU] Rename pass "isel" to "amdgpu-isel" adds f7ae0df6544 Add support for new pass manager adds ce8f59266c6 Improve static analysis of cold basic blocks adds f7055267ae2 [X86] ALU/ADC RMW instructions should use the WriteRMW sequ [...] adds 2b610ad4837 [X86][Btver2] Most RMW instructions don't require an additi [...] adds 5c738478d09 [AMDGPU] Fix for negative offsets in buffer/tbuffer intrinsics adds 17120e19403 [CodeGen] NFC fix pedantic warning from extra semicolon adds 2cad546297b [RISCV] Remove RV64 test lines from umulo-128-legalisation- [...] adds 1b130ed5dca [LoopInterchange] Remove unused variable PreserveLCSSA (NFC). adds c9c097dc7c6 [RISCV] Gate simm32 materialisation pattern and SW pattern [...] adds 2fcb9c7a2b3 [RISCV] Remove XLenVT==i32 assumptions from RISCVInstrInfo td adds 9e4a6daf235 [RISCV] Gate float<->int and double<->int conversion patter [...] adds f188396df5a [llvm-exegesis] Resolve variant classes in analysis. adds e7f7cd8bf8d [llvm-exegesis][NFC] Fix unused variable warning. adds ad242ffec21 [llvm-exegesis] Fix rL343680 in release mode. adds 12b71448c41 [llvm-exegesis][NFC] Revert rL343682 "Fix unused variable w [...] adds abaa9ca66ae [RA CopyHints] Fix compile-time regression adds b818787c3e6 [ThinLTO]Expose cache entry expiration time option in llvm- [...] adds c1d6f75b126 [RISCV][NFC] Refactor RISCVDAGToDAGISel::Select adds 0fbe023b079 [X86] Correctly use SSE registers if no-x87 is selected. adds 445c3f14aba [llvm-exegesis] Avoid yaml parser from calling sscanf for o [...] adds 97666c4d717 [llvm-mca] Add support for move elimination in class RegisterFile. adds 2aa873478d0 [InstCombine] name change: foldShuffledBinop -> foldVectorB [...] adds 96c454b924d [globalisel][combines] Don't sink G_TRUNC down to use if th [...] adds cf8ba840b8a [InstCombine] clean up foldVectorBinop(); NFC adds 9f149bc4ffc Correct implementation of -verify-machineinstrs such that i [...] adds 1ac9a626ccb [X86] Add SkylakeClient uops counter - same as the other In [...] adds 7624a6e73d7 [X86] Move Atomic CMPXCHG to WriteCMPXCHGRMW schedule class adds e9bd0c92b04 [X86][Btver2] Fix MMX PSHUFB schedule adds 796acd42b6d [X86] Move Atomic binops to use WriteALURMW schedule class adds fff44e68bae Emit template type and value parameter DIEs for template va [...] adds 58f59fb8cc8 [X86] PUSH/POP 'mem-mem' instructions are not RMW - these a [...] adds 946f07773b3 [X86] Don't break CMOV pseudo instructions down by type. Ju [...] adds bd8934fa436 [X86] Add CMOV pseudos for VR128X and VR256X register class [...] adds df9220fd714 [RISCV][NFCI] Handle redundant splitf64+buildpairf64 pairs [...] adds 02b73b4b279 [X86] Add CMOV_VK2/VK4 pseudos and remove lowering code tha [...] adds 748b49e3891 [InstCombine] add tests for binop undef-into-constant propa [...] adds 8521a3b90e2 [X86] Stop promoting vector ISD::SELECT to vXi64. adds 2058e014752 Make meanings of variables clearer in action table generati [...] adds 44cfbc7d137 [InstCombine] allow SimplifyDemandedVectorElts to work with [...] adds 2f53e1def5e [mips] Remove -allow-deprecated-dag-overlap flag from tests. NFC adds b95f965d7b2 [machineverifier] Detect PHI's that are preceeded by non-PHI's adds ab9755b8039 [WebAssembly] Refactor WasmSignature and use it for MCSymbolWasm adds 093b780cea1 [RISCV][NFC] Refactor LocVT<->ValVT converstion in RISCVISe [...] adds 6f31a46f4ac [WebAssembly] Bitselect intrinsic and instruction adds 1aba29db25e [RISCV] Handle redundant SplitF64+BuildPairF64 pairs in a D [...] adds 59b44e12949 [llvm-nm] Print an explicit "no symbols" message when an ob [...] adds 5e1a042afec [WebAssembly] Add WebAssembly to LLVM_ALL_TARGETS adds 6fa3b9479f7 [LegalizeIntegerTypes] Fix typo in comment. NFC adds c3c07bfd737 [llvm-exegesis] Unbreak analysis-uops-variant.test introduc [...] adds f590076c467 [RISCV][NFC] Fix naming of RISCVISelLowering::{LowerRETURNA [...] adds c1f3550351e [X86] Merge matchANDXORWithAllOnesAsANDNP into combineANDXO [...] adds f6c6a84a300 [llvm-exegesis][NFC] Test sched class names only in !NDEBUG mode. adds af8412e6ae7 [RISCV] Bugfix for floats passed on the stack with the ILP3 [...] adds c9b5c59206b [RISCV][NFC] Remove dead CHECK lines from vararg.ll test adds edb8892da34 Fix MSVC "not all control paths return a value" warning. NFCI. adds 11510934d7f [llvm-mca] Check for inconsistencies when constructing inst [...] adds 0ee905200b8 [doc] Update the programmer's manual about SmallSet's iterator adds 8ef94cfd7b4 [llvm-exegesis][NFC] Improve parsing of the YAML files adds c7144779933 [PassTimingInfo] cleanup on TimingData's Timer handling adds e13455ff38a [llvm-mca][x86] Add tests demonstrating ReadAfterLd delay adds e3c126f7cb2 [X86] Set correct MMO offset on scalarized load pieces adds 22abcbc182c [RISCV] Remove overzealous is64Bit checks adds 440a48b3e41 [utils] simple refactor in update_mca_test_checks.py to mak [...] adds 59b22373c7b [utils] Ensure that update_mca_test_checks.py writes prefix [...] adds 49595868917 [X86][AVX] Add PR39161 test case for v4f64 zzww shuffle adds 367ebf05cf7 [llvm-mca] Move field 'AllowZeroMoveEliminationOnly' to cla [...] adds 62aab8af14d [InstCombine] allow bitcast to/from FP for vector insert/ex [...] adds af1f1aafa46 [llvm-mca][x86] Add PR36951 ReadAfterLd test case adds b3e54123c53 [AMDGPU] Match signed dot4/8 pattern. adds 5fffc119967 AArch64: Fix XSeqPairs/WSeqPairs problems adds ef9b7604b61 [x86] add test for SSE sqrtss register dep (PR22206) adds c07d6f2d53c [globalisel][combine] Improve the truncate placement for th [...] adds 0101af51140 Give same-named members unique timestamps on Darwin in llvm-ar. adds 9e29af39fd9 [InstCombine] reduce code duplication in SimplifyDemandedVe [...] adds 67b5d05d6d7 [COFF] [X86] Don't use llvm_unreachable for unsupported rel [...] adds b57394b3c20 AMDGPU: Rename isAmdCodeObjectV2 -> isAmdHsaOrMesa adds 65c237b70d6 [WebAssembly] Don't modify preds/succs iterators while eras [...] adds bb5ea99c111 [SimplifyCFG] Change recursive calls to llvm::SimplifyCFG t [...] adds 95dbc86d2d7 [X86][LegalizeVectorOps] Use MERGE_VALUES to return two res [...] adds f2f6f77ac44 [InstCombine] drop poison flags in SimplifyVectorDemandedElts adds ae0852b7ac1 [globalisel][combine] Fix a rare crash when encountering an [...] adds 22bcdce166d [RISCV] Support named operands for CSR instructions. adds a978525b641 [llvm-mca] Remove unused/stale forward decl. NFC. adds 9c4d2a20d7e [WebAssembly] Ignore DBG_VALUE in WebAssemblyCFGStackify pa [...] adds c801f261266 [SimplifyCFG] Pass AggressiveInsts to DominatesMergePoint b [...] adds 48a6c8baacb [globalisel][combine] When placing truncates, handle the ca [...] adds 11a31132ba9 [WebAssembly] Fixed missing "global" symbol type in AsmParser. adds 24abcf4cda4 [cmake] Also create lowercase extension WinSDK symlinks adds 70285a03596 [WebAssembly] Saturating arithmetic intrinsics adds 69f718971f5 AMDGPU/GlobalISel: Add support for G_INTTOPTR adds f4bd5343c9a Add missing period to comment to match style of file. adds af9a1a11d8d [TargetRegisterInfo] Remove temporary hook enableMultipleCo [...] adds 9a16b611a76 [LoopVectorizer] Use TTI.getOperandInfo() adds d327e07926e [X86][AVX] getFauxShuffleMask - add support for INSERT_SUBV [...] adds 99f3c46cafd [x86] add test for fneg matching failure; NFC adds ece1a2dc300 [x86] regenerate full checks; NFC adds 22609030b4e [X86][SSE] Try to make MOVLPS/MOVHPS(+PD) instructions Simp [...] adds eb13633ec75 [x86] add test for (X - 0.0) vector with undef elts; NFC adds 24a3723b3a8 Format the dwarfdump --statistics version as an integer ins [...] adds 9d809925c65 [SelectionDAG] allow undefs when matching splat constants adds 41c8ada9ddc [X86] Move ReadAfterLd functionality into X86FoldableSchedW [...] adds 6bab3515ebc [X86] Don't promote i16 compares to i32 if the immediate wi [...] adds 628b7f58852 [RISCV] Regenerate several tests now enableMultipleCopyHint [...] adds 20785750a9e DwarfDebug: Pick next location in case of missing location [...] adds a8691d04397 Fix dwarf-no-source-loc.ll path separator on Windows adds b1bffa1a5b9 [x86] make blend tests resistant to demanded elements impro [...] adds 78b8f9db177 [DebugInfo] Add support for DWARF5 call site-related attributes adds 626a8eb0549 dwarfdump: Avoid parsing units unnecessarily adds 5fccc463e03 [GlobalIsel] Add llvm.invariant.start and llvm.invariant.end adds 72d0d2c07ee Avoid hardcoding PC addresses in a dwarf test adds 00a8b036c26 [llvm-nm] Write "no symbol" output to stderr adds f5174dba590 Disable the dwarf callsite attrs test on Windows adds ff3a583947d Clarify debug output in LiveDebugValues adds a01d5b88eb0 [LiveDebugValues] Extend var ranges through artificial blocks adds e1a7411e93f [X86][AVX] Limit getFauxShuffleMask INSERT_SUBVECTOR suppor [...] adds 094f8ead3ad Specify -mtriple=x86_64 in an X86-specific dwarf test adds a722d373617 X86, AArch64, ARM: Do not attach debug location to spill/re [...] adds 644c1ed5a96 [llvm-nm] Update all tests to redirect stderr to stdout adds 741cd84853f [AArch64] -mcpu=native CPU detection for Cavium processors adds 17dce3bea3d [New PM][PassTiming] implement -time-passes for the new pas [...] adds 4f840f1dc36 [llvm-ar] Use POSIX-specified timestamps for 'tv'. adds 84a8da9431f AMDGPU: Consolidate SMRD TableGen patterns adds 199c0d32e96 [RISCV] Compress addiw rd, x0, simm6 to c.li rd, simm6 adds 0d0e510068b [SelectionDAG] Add SimplifyDemandedBits to SimplifyDemanded [...] adds 6b32c5aee11 Wdocumentation fix adds df6aa317095 [X86] Use the SimplifyDemandedBits wrappers where possible. NFCI. adds 80200289573 [X86][SSE] SimplifyDemandedVectorEltsForTargetNode - simpli [...] adds 29dbca16bf1 [x86] add test for masked store with extra shift op; NFC adds 942f89c8035 [X86] Regenerate LSR loop iteration test adds 9c587960b3f [X86] combinePMULDQ - add op back to worklist if SimplifyDe [...] adds 46f18c38323 [X86][AVX] Ensure resolveTargetShuffleInputs shuffle masks [...] adds e4c0278ac67 [X86][SSE] Add SSE41 vector int2fp tests adds e52b757e5dc [X86] getFauxShuffleMask - Handle undef + sentinel values i [...] adds c8d6c1623d5 [ORC] Pass symbol name to discard by const reference. adds ee5c35b1a78 [ORC] Add a 'remove' method to JITDylib to remove symbols. adds f66e35e8c00 [ORC] Consume unhandled errors in unit test. adds bb3be36c554 [RISCV] Introduce alu8.ll and alu16.ll tests adds 2e1904606dc [IAI,LV] Avoid creating interleave-groups for predicated accesse adds 77c5e43bd2b [LegalizeVectorOps] Make ExpandStrictFPOp return the result [...] adds fd84d483ad7 [AARCH64][X86] Remove _nonsplat from test names adds b1a2f9aee33 [SelectionDAG] Respect multiple uses in SimplifyDemandedBit [...] adds d28883e6157 [InstSimplify] add vector test for fneg+fdiv; NFC adds d827820a369 [clangd] NFC: Migrate to LLVM STLExtras API where possible adds 5edfe6ab5d1 [x86] add tests for FP logic folding for vectors with undefs; NFC adds f681ac49ad8 [DAGCombiner] shorten code for bitcast+fabs fold; NFC adds 0620db49508 [DAGCombiner] allow undef elts in vector fabs/fneg matching adds 9cc55166d54 [x86] add vector fmul with undef elts tests; NFC adds 199609a85f6 [DAGCombiner] allow undefs when matching vector splats for [...] adds 049dc00383f [x86] remove redundant tests; NFC adds c708db84ee7 [x86] add vector fadd with undef elts test; NFC adds a2434c2657e [DAGCombiner] allow undef elts in vector fadd matching adds 2eda4af476f [LegalizeDAG] Move legalization of scatter and masked store [...] adds e3e684c361c [LegalizeDAG] Make one of the ReplaceNode signatures take a [...] adds 78efcda4e24 Revert r343948 "[LegalizeDAG] Make one of the ReplaceNode s [...] adds cffc876a145 [PDB] Add the ability to lookup global symbols by name. adds 25a2b438a40 Fix a compilation failure on non-MSVC compilers. adds 251720c5388 Fix a -Wsign-compare warning. adds eb3fd4c932d [LV] Do not create SCEVs on broken IR in emitTransformedInd [...] adds 16686d37ce5 [SelectionDAGBuilder][NFC] Pass LHSTy to getShiftAmountTy r [...] adds 3948aa1d82c [InstCombine] Fix incongruous GEP type addrspace adds 990c587f42a [DebugInfo][PDB] Fix a signed/unsigned coversion warning adds 7d468f2a871 [RISCV] Update alu8.ll and alu16.ll test cases adds ca6a9e3669b [AArch64] Fix verifier error when outlining indirect calls adds 944e6c56f7b [ARM] Account for implicit IT when calculating inline asm size adds 9a00564d887 [AsmParser] Return an error in the case of empty symbol ref [...] adds 74655970605 [IRBuilder] Fixup CreateIntrinsic to allow specifying Types [...] adds 6a25e9b7c66 [x86] add 16 missed hadd patterns (PR39195); NFC adds c190984a44d [GlobalIsel][X86] Support G_UDIV/G_UREM/G_SREM adds 4bc81028d48 [AArch64][v8.5A] Branch Target Identification code-generation pass adds 764fdc0b3e2 [AArch64][v8.5A] Restrict indirect tail calls to use x16/17 [...] adds 8a4fa4a92db [AArch64][v8.5A] Don't create BR instructions in outliner w [...] adds 773ad8be845 [ThinLTO] Keep non-prevailing (linkonce|weak)_odr symbols live adds 706f3b0b72e Don't use back-quotes in a run line. adds b461f4de295 [AMDGPU] Add an AMDGPU specific atomic optimizer. adds 3c6deb08bb6 [x86] simplify hadd tests; NFC adds 0649ebe3a18 [x86] add hadd test with no undefs, remove duplicate tests; NFC adds 56c22a9e141 Fix test case for @r343970 adds 9d072d8bb21 TableGen/CodeGenDAGPatterns: addPredicateFn only once adds 2550649d6bf AMDGPU: Future-proof {raw,struct}.buffer.atomic intrinsics adds 1298296a640 Fix incorrect Twine usage in CFGPrinter adds 0861fa2a97f AMDGPU/GlobalISel: Select amdgcn.cvt.pkrtz to 64-bit instructions adds 791162c4879 [TailCallElim] Enable marking of calls with byval as tails adds 8c00cc11f9c [x86] make horizontal binop matching clearer; NFCI adds 0cccaa3bd10 [X86][AVX2] Enable ZERO_EXTEND_VECTOR_INREG lowering of 256 [...] adds 9099160b879 [AMDGPU] Legalize VGPR Rsrc operands for MUBUF instructions adds fa7848b1a02 [X86] condition branches folding for three-way conditional codes adds 84a731f2822 [x86] add tests for phaddd/phaddw; NFC adds 4fac31c8505 [X86] Prefer isTypeLegal over checking isSimple in a DAG combine. adds 780daee51ea [DAGCombiner] simplify code for fmul with constant fold; NFCI adds f2c7cc4b649 [X86] Revert r343993 condition branches folding for three-w [...] adds 9a29a011554 [DebugInfo] Fix debug information label tests adds 602f2b50662 [PDB] fix a bug in global stream name lookup. adds 78fee6e56c3 Remove unused variable. adds fabae5e3170 MachineFunctionPrinterPass: Declare SlotIndexes as used if [...] adds 5a629bf3d8e PHIElimination: Remove wrong comment; NFC adds dd8cebd2be4 TwoAddressInstructionPass: Modernize/fix some comments; NFC adds 48d3a5535e7 [MIPS GlobalISel] Legalize i64 add adds 3ff2ad5558f ExpandPostRAPseudos: Fix alldefsAreDead() not removing operands adds aba277a1d1a llvm-link: Improve diagnostic for module-level metadata mismatch adds 5454da3a19a Use locals instead of struct fields; NFC adds def2c06ca28 Make LocationSize a proper Optional type; NFC adds c179d7b0063 [CFG Printer] Add support for writing the dot files with a [...] adds 7f9eb168a9a [ADT] Change the `IntervalMap` alignment assert for x86 MSVC adds 729310ff093 [X86][AVX1] Enable *_EXTEND_VECTOR_INREG lowering of 256-bi [...] adds 8cc4d7e1c6c Revert "[ADT] Change the `IntervalMap` alignment assert for [...] adds 3659c41ec52 [ADT] Force the alignment of the `data` field of `IntervalMap` adds 9925bf1d88e [llvm-exegesis][NFC] Use accessors for Operand. adds 6844640a5ee [llvm-exegesis] Fix unused lambda capture. adds 6027f5ef522 [llvm-exegesis] Fix wrong index type. adds edb9a19f380 [PowerPC] Remove self-copies in pre-emit peephole adds 43136901183 Fix buildbot failures with the newly added test case (tripl [...] adds 00973e3c15c [mips] Set pointer size to 4 bytes for N32 ABI adds 244c796c894 [mips] Fix FDE/CFI encoding in case of N32 ABI adds e574f76b8f5 [SelectionDAG] Add SIGN_EXTEND_VECTOR_INREG and CONCAT_VECT [...] adds 968d0cc02d8 [x86] use demanded bits to simplify masked store codegen adds 437c485aa9f [llvm-exegesis] Fix invalid return type and add a Dump function. adds 6a2b0733679 Fix function case. adds dd6a1fbcd5c [InstCombine] make helper function 'static'; NFC adds 0bcf39f903a [AArch64][x86] add tests for bitcasted fnabs; NFC adds 81b8d4b9e2a [X86] Autogenerate complete checks. NFC adds dccf3ce84ae [PDB] Fix failure on big endian machines. adds 0a3d7dbe84a Add missing space adds 4db5dbc6373 [InstCombine] add tests for extract subvector shuffles; NFC adds 6c508a5190e [DWARF] Make llvm-dwarfdump display the .debug_loc.dwo sect [...] adds 36b0632ee09 [SLPVectorizer] Check that lowered type is floating point b [...] adds b5c5010513d [X86] When lowering unsigned v2i64 setcc without SSE42, fli [...] adds 7df2b65a853 [PowerPC] Implement hasBitPreservingFPLogic for types that [...] adds 5148047f082 [ORC] Promote and rename private symbols inside the Compile [...] adds 0f4106775e3 llvm-dwarfdump: Extend --name to also search DW_AT_linkage_name. adds 10e3a5f0a76 [llvm-objcopy] Make -S an alias for --strip-all adds 6b971fb3697 [PDB] Fix another bug in globals stream name lookup. adds 1dd3c06445a [InstCombine] reverse 'trunc X to <N x i1>' canonicalization adds fe584de3052 [FPEnv] PatternMatcher support for checking FNEG ignoring s [...] adds c97898e7653 Recommit r343993: [X86] condition branches folding for thre [...] adds 048b5399127 [WebAssembly] Improve readability of SIMD instructions (NFC) adds a219e952b71 [LV] Move test for r343954 into x86 subdirectory adds 2e2e17dd9c8 [PowerPC][NFC] Commit nabs test case in preparation for com [...] adds dcc47f96ca8 [X86] Fix sanitizer bot failure from 344085 adds 53979264b2e [DAGCombiner] Expand combining of FP logical ops to sign-se [...] adds ce406930453 [WebAssembly] Handle V128 register class in explicit locals pass adds 98649f627c1 [git-llvm] Fix some issues surrouding EOL conversion on Windows. adds 42f63b6f964 [opt] Change the parameter of OptTable::PrintHelp from Name [...] adds 96ce5eaa493 [sancov] Generalize the code to get the previous instructio [...] adds bca81ff3bea [WebAssembly] Improve comments for SIMD instruction definitions adds de0558be123 [WebAssembly] Fix fneg lowering adds 952e752071b [Analysis] Make LocationSize pretty-printing more descriptive adds 64c3a57bec9 [PowerPC] Fix the assert of ISD::SIGN_EXTEND_INREG when typ [...] adds 44cb9341251 [AVR] Fix the 'call.ll' CodeGen test adds 0bb919938f1 [PowerPC][NFC] Add a test case for extract and store patterns adds 625a776545f [NFC] Make a variable const adds 91f4bc63a87 [Analysis] Make LocationSizes carry an 'imprecise' bit adds 24446e792a3 [SystemZ] Take better care when computing needed vector re [...] adds 18c07e13a7c [X86] Remove FeatureRTM from Skylake processor list adds 4ffb89c65a8 [DebugInfo][Dexter] Unreachable line stepped onto after Sim [...] adds 5df653595ad [llvm-exegesis] Remove unused variable, add more semantic t [...] adds cc2cbf39f25 Fix an ordering bug in the scalarizer. adds 20f5c44b25b [SystemZ] Temporarily disable high VFs with integer div/rem. adds 29beaa2badc [llvm-exegesis][NFC] Simplify code now that Instruction has [...] adds 4e824350040 [llvm-exegesis] Fix broken build. adds f9d46e9db36 [TargetLowering] Add root node back to work list after succ [...] adds cfd600bc40b [TableGen] fix assert in !cast when used out of definition [...] adds 73cebd79c51 Revert "[DebugInfo][Dexter] Unreachable line stepped onto a [...] adds c195d382a13 [TargetLowering] SimplifyDemandedBits - pull out repeated g [...] adds 85645eb0d48 [llvm-exegesis][NFC] Fix typo adds efbdbcea746 [TargetLowering] SimplifyDemandedBits - rename demanded mas [...] adds 8e17e96c81f [llvm-exegesis] Fix function return generation so it doesn' [...] adds 765115422be Lift VFS from clang to llvm (NFC) adds 8798ea68b0a [x86] allow single source horizontal op matching (PR39195) adds df002d74e3e [DAGCombine] Improve Load-Store Forwarding adds 444acbd0615 [llvm-exegesis][NFC] Code simplification adds e144c76bb4f [llvm-mca][BtVer2] Add two more move-elimination tests. NFC adds 09f76c80ba8 [llvm-exegesis][NFC] Pass Instruction instead of bare Opcode adds d93bcaaa5bc [llvm-mca] Minor refactoring in preparation for a patch tha [...] adds 0768811666e [llvm-exegesis] Fix always true assert adds 7b3bebb1978 Relax trivial cast requirements in CallPromotionUtils adds a50609a0fa1 Change the timestamp of llvmcache-foo file to meet the thin [...] adds 3b607cb1fc8 [VPlan] Fix CondBit quoting in dumpBasicBlock adds 1cc98e6672b [OptRemarks] Add library for parsing optimization remarks adds f6b8b02db76 [GlobalISel] Fix the artifact combiner to fold G_IMPLICIT_D [...] adds b501cdb9f55 Revert "[OptRemarks] Add library for parsing optimization remarks" adds 2a9ea3459b2 [Support] Remove redundant qualifiers in YAMLTraits (NFC) adds 105b05e0855 Reland: [OptRemarks] Add library for parsing optimization remarks adds ca0c32a3b8c [LV] Add a new reduction pattern match adds c8b6096ed08 [WebAssembly][NFC] Use vnot patfrag to simplify v128.not adds 4942b853a9c [DwarfVerifier] Fixed -Wimplicit-fallthrough warning adds 9f5daa2df05 revert r344082: [InstCombine] reverse 'trunc X to <N x i1>' [...] adds 6029ddd2298 [X86] Move X86DAGToDAGISel::matchBEXTRFromAnd() into X86ISe [...] adds 2870bb06155 [WebAssembly][NFC] Remove repetition of Defs = [ARGUMENTS] adds 66a2c5ecaae [InstCombine] reverse 'trunc X to <N x i1>' canonicalizatio [...] adds 4c5954f7cf9 [NFC][X86][AArch64] extract-bits.ll: add tests with constan [...] adds 742beb6d7db llvm-ar: Darwin archive format fixes. adds 3b1e430b900 Support for remapping profile data when symbols change, for [...] adds 3cf846acd82 Test commit: fix typo in comment adds ea46abe2cc7 Replace most users of UnknownSize with LocationSize::unknow [...] adds 04af5ff3eb6 Support for remapping profile data when symbols change, for [...] adds 8313c3b553f [CMake] NFC. Updating documentation on options adds 63c98b33197 [X86] Prevent non-temporal loads from folding into instruct [...] adds d784be6ea22 [MC][ELF] compute entity size for explicit sections adds 7f7ab9f57f5 [LTO] Account for overriding lib calls via the alias attribute adds 63ec2563a97 Add a flag to remap manglings when reading profile data inf [...] adds 9528e40193f llvm-c: Add C APIs to access DebugLoc info adds ca6f7dc5ec2 [WebAssembly] Saturating float to int intrinsics adds d36df14f65d [MC][ELF] Fix section_mergeable_size.ll adds 119d9f6b0f7 [WebAssembly][NFC] Use intrinsic dag nodes directly adds 4599ef42e71 Use fully qualified namespace name. adds 0801e41a519 [Coverage] Apply filtered paths to summary adds 6fb010f388b [CMake] Unconditionally add .h and .td files to target sources adds b1493403a41 [CMake] Temporarily remove the LLVM_ENABLE_IDE option adds d342bc787ac [llvm-nm] Include the text "@FILE" in the output of --help adds d7e48738baf [IndVars] Drop "exact" flag from lshr and udiv when substit [...] adds b4d0c491d05 [X86][BMI1]: X86DAGToDAGISel: select BEXTR from x & ~(-1 << [...] adds fb7e6913cb7 [NFC] Factor out getOrCreateAddRecExpr method adds 6298cb983b2 [gcov] Display the hit counter for the line of a function d [...] adds 522fc4db7cd [LV] Ignore more debug info. adds e13d0945215 [LV] Use SmallVector instead of DenseMap in calculateRegist [...] adds 7a175729942 [tblgen][CodeGenSchedule] Add a check for invalid RegisterF [...] adds 3572c80cdbe [InstCombine] Add tests for demand bits of min/max. NFC. adds c3c05ee92fb [InstCombine] Demand bits of UMax adds 3e9802e2f98 [RISCV] Re-generate test/CodeGen/RISCV/vararg.ll after r344142 adds b4f227a2a58 [InstCombine] Demand bits of UMin adds 14c745c241f Generalize an IR verifier check to work with non-zero progr [...] adds 1f4ef788a3b [AARCH64][FIX] Emit data symbol for constant pool data adds 4b25d67d1bc [InstCombine] Fix SimplifyLibCalls erasing an instruction w [...] adds 09ab8e9f3ad [llvm-mca][BtVer2] Add tests for optimizable GPR register m [...] adds 7b42e952770 [DAGCombiner] move comment closer to the corresponding code; NFC adds ea0a193dbf8 [llvm-nm] Fix crash when running with --print-armap on corr [...] adds 488a8b20ffd Better support for POSIX paths in PDBs. adds a6f9ade27a7 [X86] Restore X86ISelDAGToDAG::matchBEXTRFromAnd. Teach add [...] adds 29b3e08ecf4 [Hexagon] Eliminate potential sources of non-determinism in HCE adds f5647cf249a [DAG] Fix Big Endian in Load-Store forwarding adds 2f2ce25a6b4 [PassManager/Sanitizer] Port of AddresSanitizer pass from l [...] adds 4db84ee724a Revert r344197 "[MC][ELF] compute entity size for explicit [...] adds 75105c59a05 Revert SymbolFileNativePDB plugin. adds 07125b4a5bd [WebAssembly] Revert rL344180, which was breaking expensive checks adds 19a8ca2849d [Pipeliner] Fix the Schedule DAG topoligical order. adds ba50914be1a [Pipeliner] Use the Index from Topo instead of relying on N [...] adds 2141d146188 [Hexagon] Restrict compound instructions with constant value. adds 43adb6744a1 Update test of r344198 to work with release builds. adds b536aafd96d [WebAssembly][NFC] Remove repetition of Defs = [ARGUMENTS] (fixed) adds efad4789d86 [X86] Type legalize v2f32 loads by using an f64 load and a [...] adds 7034ff81096 [llvm-pdbutil] Pretty print PDBSymbolUsingNamespace symbols adds b4c8a95abbb [x86] regenerate CHECKs; NFC adds 9b3effed99d [x86] add tests for extract_element; NFC adds d7ed5b6ae7e [SampleFDO][NFC] Remove debugging log left over in the code. adds 744c960d128 [llvm-pdbutil] Add missing pdb for test adds bd934ffaabd [llvm-objcopy] Factor out CopyConfig adds 0739d3ad547 Inline variable into assert to avoid unused variable warning. adds 81c9e86b06f [RISCV] Fix disassembling of fence instruction with invalid field adds 1a0ffaa4541 AMDGPU/GlobalISel: Implement select for G_INSERT adds 8e011ae1984 merge two near-identical functions createPrivateGlobalForSt [...] adds f7c87d986fb X86/TargetTransformInfo: Report div/rem constant immediate [...] adds 639949cb150 Revert "AMDGPU/GlobalISel: Implement select for G_INSERT" adds 0af72938856 Revert "DwarfDebug: Pick next location in case of missing l [...] adds bd755d4e272 [DAGCombiner] rearrange extract_element+bitcast fold; NFC adds 3b7de9d1bb4 [llvm-objcopy] Add -F|--target compatibility adds 441f8c5b1f4 [ThinLTO] Don't import GV which contains blockaddress adds edac9f00e9e [mips] Mark fmaxl as a long double emulation routine adds 66c3f51a527 SCCP: avoid caching DenseMap entry that might be invalidated. adds 39e3cf3d167 [X86] Ignore float/double non-temporal loads (PR39256) adds 0b50ad3f833 [X86][AVX] Add examples of shuffles that can be reduced to [...] adds f39b0d9784b [tblgen][llvm-mca] Add the ability to describe move elimina [...] adds d584a99dbb2 [X86][SSE] Add extract_subvector(PSHUFB) -> PSHUFB(extract_ [...] adds 9a6d7be910d Fix documentation of MachineInstr::getNumOperands adds 638941f488d [llvm-mca] Remove method RegisterFileStatistics::initialize [...] adds cadc63b548f [X86][AVX] Regenerate tzcnt tests adds 29956bffea8 [SanitizerCoverage] Make Inline8bit and TracePC counters de [...] adds 706d3da44f2 [PowerPC] avoid masking already-zero bits in BitPermutation [...] adds c4e53cf2f67 [X86][SSE] LowerVectorCTPOP - pull out repeated byte sum stage. adds 08bc40e744f [SelectionDAG] Move VectorLegalizer::ExpandCTLZ codegen int [...] adds 1cea19bc982 Fix unused variable warning after r344348 adds 05638b189e1 [llvm-exegesis][NFC] Simplify code at the cost of small cod [...] adds a6b5202ae09 [AArch64][x86] add tests for trunc disguised as vector ops [...] adds 150e4ae6c16 Pull out repeated value types. NFCI. adds 7dac907c9c2 Pull out repeated value types. NFCI. adds 185de913d57 Make YAML quote forward slashes. adds 7b3c1886414 Revert "Make YAML quote forward slashes." adds d5e155bacd7 Make YAML quote forward slashes. adds b609135fc92 [MC][ELF] fix newly added test adds 8f99faa030c [x86] add and use fast horizontal vector math subtarget feature adds f0303e43079 [BPF] Add BTF generation for BPF target adds 2649515d3f3 [Support] exit with custom return code for SIGPIPE adds 1172319f2e0 [BPF] Some fixes after rL344366 adds 91defc144e1 Better support for POSIX paths in PDBs. adds a73f1cf1de2 [BPF] Don't include linux/types.h and fix style adds 9a80e3fe5a8 Disambiguate: s/make_unique/llvm::make_unique/. NFC adds ee500a52211 [BPF] Use cstdint {,u}int*_t instead of linux/types.h __u32 [...] adds f5782f7024e Fix MCBTF string array initialization so its MSVC friendly. NFCI. adds 40c1d29a9d1 [SanitizerCoverage] Prevent /OPT:REF from stripping constructors adds 78735571302 [llvm-mca] Correctly set aliases for register writes introd [...] adds a5213c4729d [codeview] Emit S_BUILDINFO and LF_BUILDINFO with cwd and s [...] adds 6316db4486f Replace assert() with llvm_unreachable because it's obvious [...] adds c27563a1428 Regenerate test. NFCI. adds c6422e18ae6 Fix Wdocumentation warning. NFCI. adds 6147a037f6c [LegalizeVectorTypes] When unrolling in WidenVecRes_Convert [...] adds c646992975f [LegalizeVectorTypes] When widening the operands to a conca [...] adds c206978e8af Revert BTF commit series. adds 5650e8ff907 [LegalizeVectorTypes] When widening the result of a bitcast [...] adds 18cda814123 [X86] Skip (v2i32/v4i16/v8i8 (bitcast (f64))) handling in R [...] adds e9abd40f5c6 [X86] Simplify the end of custom type legalization for (v2i [...] adds bb098ae6254 [X86] Improve type legalization of (v2i32/v4i16/v8i16 (bitc [...] adds cb064c84c54 [LegalizeVectorTypes] Use TLI.getVectorIdxTy instead of DAG [...] adds 8aea7592db2 [llvm-readobj] Fix an error message about .llvm.call-graph-profile adds 56ebea371fc [RISCV] Eliminate unnecessary masking of promoted shift amounts adds d069d45aa88 move GetOrCreateFunctionComdat to Instrumentation.cpp/Instr [...] adds 93c7b61d509 [WebAssembly][NFC] Unify ARGUMENT classes adds 6e3463c0eb4 [Intrinsic] Add llvm.minimum and llvm.maximum instrinsic functions adds 3baba1cf36a [WebAssembly] SIMD min and max adds 952b7309b14 [AArch64] Swap comparison operands if that enables some folding. adds 0f13604417a [X86][AVX] Add lowerVectorShuffleAsLanePermuteAndPermute fo [...] adds e76d7099025 [X86][SSE] Change CTTZ vector lowering to cttz(x) = ctpop(~ [...] adds 3b18a97f3ac [X86][SSE] Improve CTTZ lowering when CTLZ is legal adds 1a9bbe2528f Remove unused variable. NFCI. adds 7ecda486e97 Pull out repeated getOperand(). NFCI. adds 8965b5dc749 [X86] Pull out target constant splat helper function. NFCI. adds 097be3b516e [X86][SSE] combineIncDecVector - use isConstantSplat adds e3800c79ea4 [X86][SSE] Begin removing vector CTTZ custom lowering and u [...] adds c323e923ae3 [InstCombine] Fixed crash with aliased functions adds e9226f019e3 [NFC] Fixed duplicated test file adds 7875f53fbec [InstCombine] add tests for operand complexity canonicaliza [...] adds 1000de2443c [X86][SSE] Remove most of vector CTTZ custom lowering and u [...] adds 21706932d74 [InstCombine] fix complexity canonicalization with fake una [...] adds bb14c3e538c [WebAssembly][NFC] Fix signed/unsigned comparison warning adds ebbe7135795 [LegalizeTypes] Prevent an assertion from PromoteIntRes_BSW [...] adds 80d43025545 Pull out repeated variables from SelectionDAGLegalize::Expa [...] adds 12898607321 [ARM] Regenerate popcnt tests adds cc018b73f8c [AARCH64] Regenerate popcnt tests adds 54d4881c352 [ORC] During lookup, do not match against hidden symbols in [...] adds 3898e47d1e7 Move some helpers from the global namespace into anonymous ones. adds 1ccfde68b89 [X86] Type legalize v2f32 stores by widening to v4f32, cast [...] adds 6c09fbd91a8 [X86] Fix bad indentation. NFC adds a3ff03e8e2b [IAI,LV] Add support for vectorizing predicated strided acc [...] adds 473da035601 revert 344472 due to failures. adds 7d7250490bd recommit 344472 after fixing build failure on ARM and PPC. adds 33941481666 [InstCombine] combine a shuffle and an extract subvector shuffle adds ffc6fe67276 [LegalizeDAG] Don't bother with final MUL+SRL stage for byt [...] adds c8309b5ac33 [ORC] Remove XXLayer::add methods that default to using the [...] adds 7e9c8da5fd4 [ARM] Regenerate cttz tests adds d92ffe66987 [X86][AVX] Enable lowerVectorShuffleAsLanePermuteAndPermute [...] adds 631cfd79b32 [LV] Fix comments reported when not vectorizing single iter [...] adds c76c02e1ed1 [InstCombine] Add PR27343 test cases adds be51e5f9632 [X86] Autogenerate complete checks. NFC adds 5854a1f2831 [X86] Add 128 MOVDDUP to the constant pool printing in X86A [...] adds a0b9470673c [X86] Move promotion of vector and/or/xor from legalization [...] adds aa8c49dafa1 [ORC] Simplify naming for JITDylib definition generators. adds 15ca92098aa [X86] Autogenerate checks. NFC adds ffc5ec8c812 [TwoAddressInstructionPass] Replace subregister uses when p [...] adds 919972ec1f0 [llvm-exegesis][NFC] Return many CodeTemplates instead of one. adds dc5c9c28094 [TI removal] Remove TerminatorInst as an input parameter fr [...] adds 7c0f083bcb9 [TI removal] Remove a unnecessary use of `TerminatorInst` f [...] adds 9d078e56967 [llvm-exegesis] Fix missing std::move. adds f2c212eed34 [TI removal] Just use Instruction in the CFG printer code. NFC. adds ce1e09bcf53 [TI removal] Remove `TerminatorInst` from BasicBlockUtils.h adds ac346921b56 [TI removal] Remove a dead forward declaration of Terminato [...] adds fc6649b88c1 [TI removal] Remove `TerminatorInst` from SparsePropagation [...] adds aa517f562fb [TI removal] Remove `TerminatorInst` from GVN.h and GVN.cpp. adds 2aaf7228e0e [TI removal] Make variables declared as `TerminatorInst` an [...] adds 2b7e80d846d [TI removal] Rework `InstVisitor` to support visiting instr [...] adds d8d83714690 [TI removal] Make `getTerminator()` return a generic `Instr [...] adds 4b284c14ecd [NewPM] implement SCC printing for -print-before-all/-print [...] adds 69b3f302bf6 AMDGPU: Test showing a scalar buffer load deficiency adds ee084ebe8c4 [mips][micromips] Fix overlaping FDEs error adds 7f770f7d215 [ARM][NEON] Improve vector popcnt lowering with PADDL (PR39281) adds 1f57e3857aa [mips][micromips] Revert "Fix overlaping FDEs error" adds c2c7e976de7 [mips][micromips] Fix overlaping FDEs error adds bce0a9abfff [NewPM] teach -passes= to emit meaningful error messages adds cb8b3a2740a [ADT] Adds equality operators for DenseMap and DenseSet, an [...] adds 8559689cb23 [x86] add tests for fma with undef elts; NFC adds dea3b338ac8 Revert "[NewPM] teach -passes= to emit meaningful error messages" adds fb06745cac3 [DAGCombiner] allow undef elts in vector fma matching adds 0ea7fc0dde4 [x86] add tests for fma with undef elts; NFC adds 907565571c1 [DAGCombiner] allow undef elts in vector fma matching adds 772e632e254 [AArch64] add tests for fmul x, -2.0 with undef elts; NFC adds 9e0d834cc56 [DAGCombiner] refactor folds for fadd (fmul X, -2.0), Y; NFCI adds 2ef4e14af3f [DAGCombiner] allow undef elts in vector fmul matching adds abfefc95baa [SelectionDAG] allow FP binops in SimplifyDemandedVectorElts adds fcb831da6a9 [ADT] Fix a bug in DenseSet's initializer_list constructor. adds 0a2a30e517c [CodeExtractor] Erase debug intrinsics in outlined thunks ( [...] adds ecabdb23f63 [llvm-objcopy] NFC: update TODO test comment adds bea8b730d34 AMDGPU: Generate .amdgcn_target for object code v3 adds b34f2ee301e [CMake] Change the default value of LLVM_ENABLE_IDE adds 5e9d76b982a [AARCH64] Improve vector popcnt lowering with ADDLP adds 11b69c205d9 [CMake] Use LLVM_ENABLE_IDE instead of CMAKE_CONFIGURATION_TYPES adds e2d6b27abc8 [hot-cold-split] fix static analysis of cold regions adds a379b4f9b55 [InstCombine] add tests for bitwise logic --> select; NFC adds dea373926eb [X86] Regenerate avx2-intrinsics-x86.ll to compress the 32 [...] adds 672e9ba7300 [X86] Disable the peephole pass on avx2-intrinsics-x86.ll a [...] adds f27f35e3318 [X86] Add test cases showing failure to fold load into vpsr [...] adds c6a0661256a [X86] Fix a bad bitcast in the load form of vXi16 uniform s [...] adds 726b0ec4982 NFC: Fix a -Wsign-conversion warning adds 52ff03cff90 [ORC] Switch to DenseMap/DenseSet for ORC symbol map/set types. adds 6712561e190 Change a TerminatorInst* to an Instruction* in HotColdSplit [...] adds 4812114f295 [ORC] Rename MultiThreadedSimpleCompiler to ConcurrentIRCompiler. adds 01e314f12f6 [CMake] Fix a missing LLVM_ENABLE_IDE from r344555 adds 270bd836f89 StructurizeCFG,AMDGPU: Test case of a redundant phi and cod [...] adds 582b1196240 [ORC] Rename ORC layers to make the "new" ORC layers the default. adds 3926274437d [X86] Remove some isel patterns that shouldn't be possible. adds 2fa550c88a1 [WebAssembly] LSDA info generation adds 341f13c81dc [hot-cold-split] fix failing testcases adds f2cb5da6a45 [SCEV] Limit AddRec "simplifications" to avoid combinatoria [...] adds d0437910341 [llvm-objcopy] Factor out Buffer adds 600d43cad27 [NFC] Turn isGuaranteedToExecute into a method adds 2173a4b23e5 [NFC] Move block throw check inside allLoopPathsLeadToBlock adds 72b430c741d [DebugInfo][LCSSA] Rewrite pre-existing debug values outside loop adds d871042d601 [NFC] Encapsulate work with BlockColors in LoopSafetyInfo adds e3a3e26e8f6 [mips][micromips] Fix how values in .gcc_except_table are c [...] adds 288477a9492 [NFC] Make LoopSafetyInfo abstract to allow alternative imp [...] adds 141415c0fe2 [NFC] Remove obsolete method headerMayThrow adds 6ccf5849d20 [VPlan] Script to extract VPlan digraphs from log adds 1f1ae517ddc [X86] Fix Skylake ReadAfterLd for PADDrm etc. adds b22a1a5cdb2 [NFC] Introduce ICFLoopSafetyInfo adds 09fdf061bbf [LegalizeDAG] ExpandLegalINT_TO_FP - cleanup UINT_TO_FP i64 [...] adds dacda52aca9 [LV] Add test checks when vectorizing loops under opt for s [...] adds 42fced4e53b [InstCombine] try harder to form select from logic ops adds 0f096ec04e2 [InstCombine] make sure type is integer before calling Comp [...] adds 5973d705524 revert rL344609: [InstCombine] try harder to form select fr [...] adds c2874102cb0 [LV] Teach vectorizer about variant value store into unifor [...] adds 6d4ce2a09e2 fix an out of date paragraph noticed by Bryce Lelbach adds f0b741493a2 [NFC][AArch64] Refactor macro fusion adds ae40630a7b6 [NFC][ARM] Refactor macro fusion adds b325eb110ca [Intrinsic] Signed Saturation Addition Intrinsic adds db949a77216 [LTO] Call InitLLVM from llvm-lto2 adds 93dff1efc9f [PATCH] [NFC][AArch64] Fix refactoring of macro fusion adds 4998e62d574 Revert "[WebAssembly] LSDA info generation" adds e87aaa10938 [ORC] Make the VModuleKey optional, propagate it via Materi [...] adds 2914ea59ea6 [InstCombine] Cleanup libfunc attribute inferring adds 3b4af70c092 [X86] Match (cmp (and (shr X, C), mask), 0) to BEXTR+TEST. adds 97dd9835bef [SanitizerCoverage] Don't duplicate code to get section pointers adds 6d3a501fba9 [ThinLTO] Add importing stats to thin link adds ef4467e35f5 [Sanitizer][PassManager] Fix for failing ASan tests on arm- [...] adds 12561544308 [ThinLTO] Fix test to require asserts adds ea56a5932c3 New test requires x86-registered-target adds 73405ef1630 [BuildingAJIT] Update chapter 1 to use the ORCv2 APIs. adds 5090f032e2f Document the behavior of option passing when using -DCLANG_ [...] adds 5e40c8ba6a0 [ARM][NFCI] Do not fuse VADD and VMUL, continued (1/2) adds 860a0bdd39a [ARM] Follow up of rL344671, attempt to pacify a buildbot adds edcfeaeb8e6 [LoopPredication] add some simple stats adds 573330f677f [ARM] Do not fuse VADD and VMUL, continued (2/2) adds c99132a7275 [MIPS GlobalISel] Legalize constants adds ff88649977a [NewPM] teach -passes= to emit meaningful error messages adds 422c9c46fe5 [NewPM] Fixing test failure on Windows - removed opt binary [...] adds 1e04734fb63 [NFC] Remove GOTO from SCEV adds 91e6826692e [llvm-exegeis] Computing Latency configuration upfront so w [...] adds 2a8a161371d BuildBot fix, compiler complains about array decay to pointer adds e20d360976a AMDGPU: Remove dead TableGen code adds d259ba70025 Fix uninitialized variable adds 0cb92ac202a [ARM] bottom-top mul support in ARMParallelDSP adds 0a1aef00955 [llvm-exegesis] Allow measuring several instructions in a s [...] adds cc436fd2663 AMDGPU: Divergence-driven selection of scalar buffer load i [...] adds 2026bfdfbd1 StructurizeCFG: Simplify inserted PHI nodes adds 1db6c096861 AMDGPU: Avoid selecting ds_{read,write}2_b32 on SI adds 97b215a7732 Port libcxxabi r344607 into llvm adds 8728549da33 [BuildingAJIT] Fix a function signature in the documentation. adds 986e22dd7d3 [BuildingAJIT] Simplify a tutorial example and fix a syntax error. adds 5b21ab8321c [TI removal] Switch an analysis to just use Instruction. adds c01b38a2d4a [TI removal] Switch MergeFunctions to directly use Instruct [...] adds cb0797beaa9 [TI removal] Switch ObjCARC code to directly use the nice r [...] adds 7d0753a0013 [TI removal] Update CodeExtractor to use Instruction directly. adds 17441525816 [TI removal] Use `Instruction` instead of `TerminatorInst` [...] adds a2da1d01556 [TI removal] Switch NewGVN to directly use `Instruction`. adds 56c38515176 [TI removal] Switch simple loop unswitch to `Instruction`. adds 009a7621a37 [BuildingAJIT] Update the Ch1 KaleidoscopeJIT class to expo [...] adds d2a4fba6e8b [llvm-exegesis] Mark destructor virtual after r344695 adds e97176ffbab [X86] Support for the mno-tls-direct-seg-refs flag adds 577c9cec20a Add a emitUnaryFloatFnCall version that fetches the functio [...] adds 17fa14ff8e0 [TI removal] Remove TerminatorInst references from bindings. adds d95ef31baaa [TI removal] Remove discussion of `TerminatorInst` from the [...] adds acedb9c3916 [llvm-exegesis] Fix off by one error adds 6071e3bbc00 [Support] json::Value construction from std::vector<T> and [...] adds 981ceb83bd0 [DA] DivergenceAnalysis for unstructured, reducible CFGs adds c7fe2166e90 DivergenceAnalysisTest: fix use of uninitialized memory adds 9e75857c929 [LV] Fold tail by masking to vectorize loops of arbitrary t [...] adds 39197f38a5a [Pipeliner] copyToPhi DAG Mutation to improve scheduling. adds 14914d033ea Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP") adds 4aeb7d033ae Make Function::getInstructionCount const adds 7d144ecd33f Support of hurd in llvm-shlib adds 356cab04d8d [ORC] Add a createJITDylib method to LLJIT. adds 8a6d7347bab [TI removal] Update the C API for the move away from `Termi [...] adds 39edf631ef8 [TI removal] Switch some newly added code over to use `Inst [...] adds 09ebf7a44c3 [TI removal] Remove `TerminatorInst` from the IR type system! adds deadb20e811 [CodeGen] Fix for PR39094. adds 7d3ea70f001 Use llvm::{all,any,none}_of instead std::{all,any,none}_of. NFC adds 5eae65a2bb3 [pipeliner] Fix test added in rL344748 to require asserts adds d6be509b756 [llvm-exegesis] X87 RFP setup code. adds cbce2985b72 [llvm-exegesis] Re-enable liveliness tracker. adds ddc35926a19 [MC][DWARF][AsmParser] Ensure nested CFI frames are diagnosed. adds 0624b8fbe06 [llvm-exegesis] Mark second-form X87 instructions as unsupported. adds 42984f10a23 [InstCombine] move/add tests for sub/neg; NFC adds 01296663677 [Hexagon] Remove support for V4 adds 69b6ec046a5 [InstCombine] use m_Neg() in dyn_castNegVal() to match vect [...] adds 65b8c0fe7a5 [dwarfdump] Hide ranges in diff-mode. adds aff56dc8f1e [ConstantFolding] Constant fold minimum and maximum intrinsics adds 37f8c97acd3 [llvm-mca] Remove a stale TODO comment. NFC adds 9e79a4ff275 [InstCombine] InstCombine and InstSimplify for minimum and maximum adds 4806c82bb2a Fix a use-after-RAUW bug in large GEP splitting adds 203691d83a7 [WebAssembly] Handle undefined lane indices in SIMD patterns adds 3b86c685544 [DWARF] Make llvm-dwarfdump display location lists in a .dw [...] adds 582cb39ac30 [X86] In PostprocessISelDAG, start from allnodes_end, not t [...] adds 4505dff9b28 [GISel]: Allow PHIs to be DCEd adds 1c40da96052 Fix typos in assert message adds 87f7bbe2f23 [X86] Remove some left over code from when MVT:i1 was a leg [...] adds 71c6b614f3d [NFC][InstCombine] Undo stray change adds 595770b8c9c AMDGPU: Add support pattern for SUB of one bit adds 97a6779252c [LoopVectorize] Loop vectorization for minimum and maximum adds 95eb91571b2 [llvm-objdump] Fix --file-headers (-f) option adds 315f6cf87cd [MachineCSE][GlobalISel] Making sure MachineCSE works mid-G [...] adds 7366ef73c48 [WebAssembly] Custom lower i64x2 constant shifts to avoid wrap adds 1a048fad673 [WebAssembly] Implement vector sext_inreg and tests with co [...] adds 616537d9aa7 [X86] Add additional CPUs and features to Host.cpp and X86T [...] adds b5d5e5ebf64 DebugInfo: Use debug_addr for non-dwo addresses in DWARF 5 adds 3a1bc560ac4 llvm-dwarfdump: Support RLE_addressx and RLE_startx_length [...] adds 9a16d2deaa0 DebugInfo: Use address pool forms in debug_rnglists adds 9d207e6821d DebugInfo: Implement debug_rnglists.dwo adds b772afaaa9e DebugInfo: Use DW_OP_addrx in DWARFv5 adds cbf08ad2291 Add missed file from previous commit (r344838) adds 101b0b8556c DebugInfo: Use base address specifiers more aggressively adds 6493c695297 Replace setFeature macro with lambda to fix MSVC "shift cou [...] adds bc54072bd31 [CostModel][X86] Add integer vector reduction cost tests adds 40da074bdf4 [SLPVectorizer] regenerate test checks; NFC adds db6c8767cd7 [SLPVectorizer][X86] Add mul/and/or/xor unrolled reduction tests adds 04e0dbca23f [InstCombine] add explanatory comment for strange vector lo [...] adds f521828b267 [InstCombine] make code more flexible with lambda; NFC adds 7f64213612b [InstCombine] use 'match' to simplify code; NFC adds a4ef13eefb6 [CostModel][X86] Add some initial extract/insert subvector [...] adds c4cfe4768cd [InstCombine] add test for possible shuffle fold; NFC adds dae6a45f280 [ORC] Add some more basic sanity tests for the LLJIT. adds ef0e188cb54 [WebAssembly] Change tabs to spaces in basic-assembly.s adds 593972ff78a [X86] Only extract constant pool shuffle mask data with zer [...] adds e24f4ecbb05 [X86][AVX] Enable lowerVectorShuffleAsLanePermuteAndPermute [...] adds 0ee7db4eac1 Schedule Hot Cold Splitting pass after most optimization passes adds e69e0d92a0b [DAGCombiner] reduce insert+bitcast+extract vector ops to t [...] adds 75cb0ad4ddf foo adds 80da74b7494 [X86] Remove SDIVREM8_SEXT_HREG/UDIVREM8_ZEXT_HREG and thei [...] adds de6038d9af3 Revert r344873 "foo" adds e01c86dd475 [X86] Stop promoting integer loads to vXi64 adds c7a8ddb8493 [IAI,LV] Avoid creating a scalar epilogue due to gaps in in [...] adds c2ec04c61ca [X86] Add patterns for vector and/or/xor/andn with other ty [...] adds b5c7e2f9a4d [PDB] Extend IPDBSession's interface to retrieve frame data adds 084d5e1748d [CGProfile] Turn constant-size SmallVector into array adds 872c921c7d4 [PowerPC][NFC] Fix bugs in r+r to r+i conversion adds 879e2ef2a67 [llvm-dwarfdump] - Add the support of parsing .debug_loclists. adds ce9fb23fb1f [llvm-dwarfdump] - Fix win10 build bot failture. adds ca81ba500b0 Test commit: change comment. adds 090b8892dc1 [X86][BMI1]: X86DAGToDAGISel: select BEXTR from x & ((1 << [...] adds 9b7ef04cfb2 Document bisect-skip-count adds a1fe5fbd7ae [X86] X86DAGToDAGISel: handle BZHI selection too, not just BEXTR. adds 84a4ea35b3b [llvm-exegesis] Reject x86 instructions that use non unifor [...] adds 66e9f9ca3b5 [llvm-exegesis] Mark x86 segment register instructions as u [...] adds 502027b7197 [llvm-exegesis] Crash when assembling invalid Operand adds affca964205 [InstCombine] add tests for shuffle+insert folds; NFC adds 466ce67d6ec Revert "[PDB] Extend IPDBSession's interface to retrieve fr [...] adds b7afff3a69a [X86][SSE] getTargetShuffleMask - pull out repeated shuffle [...] adds 2ec3239eb10 [llvm-mca] Use llvm::ArrayRef in class SourceMgr. NFCI adds c1d5ac81906 Some cleanups to the native pdb plugin [NFC]. adds c0db9a7416d DAG: Change behavior of fminnum/fmaxnum nodes adds b582972288e [llvm-mca] Remove a couple of using directives and a bunch [...] adds 19bc740d06f [test] Relax test/Other/opt-hot-cold-split.ll adds 2af624687d1 Revert r344877 "[X86] Stop promoting integer loads to vXi64" adds e234be51dae [llvm-exegesis] Move namespace exegesis inside llvm:: adds a6d25f294e7 [X86] getTargetConstantBitsFromNode - handle extraction fro [...] adds 305c774f246 [llvm-exegesis] Fix name lookup ambiguity in MSVC after 344922 adds ded7818bb75 [hot-cold-split] Add missing FileCheck invocations adds 1aa867a4398 [SourceMgr][FileCheck] Obey -color by extending WithColor adds 3807aafb6e4 [X86][SSE] getTargetShuffleMaskIndices - allow opt-in suppo [...] adds 49bd6e1c1f6 [X86][SSE] Tidyup DecodeVPERMILPMask shuffle mask decoding adds 30353731ceb Revert r344930 as it broke some of the bots on Windows. adds 6a96dba94ba Revert rL344933 from llvm/trunk: [X86][SSE] Tidyup DecodeVP [...] adds 4762f7cfd74 Revert rL344931 from llvm/trunk: [X86][SSE] getTargetShuffl [...] adds 7e3227d6f10 [hot-cold-split] Add opt remark on success adds db46784d645 Reapply "[MachineCopyPropagation] Reimplement CopyTracker i [...] adds 101d24deace X86: add alias for pushfw/popfw in Intel mode adds 0f65a4fb051 [x86] add test for PR25498 and complete checks; NFC adds 56e3b243da9 [ORC] Guard access to the MemMgrs vector in RTDyldObjectLin [...] adds 353c741e8e2 [Reassociate] add 'using namespace' to reduce bloat; NFC adds 8266f03bf7f [DWARF] Use a function-local offset for AT_call_return_pc adds fbc926ad9ac [WebAssembly][NFC] Remove WebAssemblyStackifier TableGen backend adds 5528b0e4848 [Reassociate] add vector tests with undef elements; NFC adds a551fc94848 Recommit r344877 "[X86] Stop promoting integer loads to vXi64" adds 4235b9cb6e5 [ARM] Regenerate reverse shuffle costs adds e2097155c1c [MC] Shrink MCAsmParser by grouping bools, add const, NFC adds 8f75264f16f [Reassociate] remove bogus tests; NFC adds d8c89437902 X86: Do not optimize branches with undef eflags inputs adds 152aae5d0d5 [Intrinsic] Unigned Saturation Addition Intrinsic adds c06413bb743 [X86] Remove unused entries from the X86ProcFamily enum. Ad [...] adds 4d0646db972 X86: fix a comment copy-paste issue (NFC) adds d248358db82 [WebAssembly] Added test for inline assembly roundtrip. adds 8ad683cced1 [WebAssembly] Fix assembly printing of br_table adds 956dada0280 [dsymutil] Improve error reporting when we cannot create ou [...] adds ac0745ecd05 [hwasan] add stack frame descriptions. adds abbd80eecc4 [ORC] Dump flags for JITDylib symbol table entries. adds 41fdb6ac056 [ORC] Show JITDylib search order in JITDylib::dump. adds c407a17bdd0 [RuntimeDyld][COFF] Skip non-loaded sections when calculati [...] adds 5eb2e5b8a8d [X86] Regenerate test checks to show fma comments. NFC adds 2cf3038ef72 Add support for GNU Hurd in Path.inc and other places adds 40760b733d9 [MachinePipeliner] Split MachinePipeliner code into header [...] adds 7fc581a267d Revert "Revert "[PDB] Extend IPDBSession's interface to ret [...] adds 8e47a8d1a66 Fix non-Windows build for D53324 adds 62bea74cfa2 [X86][BMI1] X86DAGToDAGISel: select BEXTR from x << (32 - y [...] adds befe74f5035 [TTI] Add generic cost handling of SK_Reverse shuffles adds 54030c22de0 Revert "[X86][BMI1] X86DAGToDAGISel: select BEXTR from x << [...] adds 477d32c48ae [X86][SSE] Update raw mask shuffle decoders to handle UNDEF [...] adds ee6a84b4fee [lit] Only return a found bash executable on Windows if it [...] adds e7a92994d43 Leftover bits from https://reviews.llvm.org/D53420 that wer [...] adds f3f126519d7 Add BROADCAST shuffle cost tests. adds bd0ecc17b79 Add BROADCAST shuffle cost tests. adds 778349e2df2 Experimental re-land of [X86][BMI1] X86DAGToDAGISel: select [...] adds 191127eb32c [SLSR] auto-generate full test assertions; NFC adds 8a6e76e6c9f [SLSR] use 'match' to simplify code; NFC adds d07f87e01a0 Revert "[MachinePipeliner] Split MachinePipeliner code into [...] adds b0f74f04d32 [InstCombine] add/move tests for select with inverted condi [...] adds fa8e666b551 [InstCombine] swap select profile metadata when swapping se [...] adds f46dd75b538 [InstCombine] use 'match' to handle vectors and simplify code adds 838ac3865fe [SLPVectorizer] Add basic support for mul/and/or/xor horizo [...] adds e3237d202fb [LegalizeDAG] Share Vector/Scalar CTTZ Expansion adds 8681ecc0ffb [LegalizeDAG] Remove unused variable adds 3a1d78fdddf [SelectionDAG] use 'match' to simplify code; NFC adds 1a72ab0867c [Reassociate] replace fake binop queries with 'match' API adds c924df94b9c [WebAssembly] use 'match' to simplify code; NFC adds 922e1373b54 [CostModel][X86] Add transpose shuffle cost tests adds 22a8730763c [DebugInfo][GlobalOpt] Fix -debugify for globalopt shrinkin [...] adds 6fffb2a18e1 [TTI][X86] Treat SK_Transpose shuffles as SK_PermuteTwoSrc [...] adds c04985c6062 [InstCombine] use 'match' to simplify code adds 6e614234d5d [IR] remove fake binop queries for not/neg adds c0de197df0d [Power9] Add __float128 support in the backend for bitcast [...] adds b63f24a552f [PDB] Fix -Wunused-private-field in DIA adds ca762c62ed4 [tblgen] Allow FixedLenDecoderEmitter to use APInt-like obj [...] adds 68de396c344 [IR] Fix -Wunused-function after r345052 adds 5b2930967ec Fix MSVC build by correcting placement of declspec after r345056 adds 79b7ee93442 [LegalizeDAG] Share Vector/Scalar CTLZ Expansion adds 2ea19c8e668 X86DAGToDAGISel::matchBitExtract(): lambdas can't have defa [...] adds d537407cfe0 [LegalizeDAG] Share Vector/Scalar CTPOP Expansion adds 863ec6dadfe [llvm-strip] Support -s alias for --strip-all. Make both st [...] adds 75e42f666e0 [X86][SSE] Revert rL343922 combinePMULDQ AddToWorklist (PR39398) adds fda29c9e709 [HotColdSplitting] Attach MinSize to outlined code adds 39f6fac74bc [test-suite/doc] Add list of programs we might add. adds e4c9c3925cc [ORC] Change how non-exported symbols are matched during lookup. adds 1989ce13fd9 Revert r345077 "[ORC] Change how non-exported symbols are m [...] adds c2e4d07208a [llvm-objcopy] Fix use-after-move clang-tidy warning adds 47fe3c0d791 CGP: Clear data structures at the end of a loop iteration i [...] adds f5961147fde Fix typo in verifier error message adds ed9fa1afb6d [dwarfdump] Make incompatibility between -diff and -verbose [...] adds 1bbd49ae6f1 Print out DebugCounter info with -print-debug-counter adds 26f7b1bbdf5 [X86] Autogenerate comple checks. NFC adds c8b72a05135 Fix test after r345085 adds eec87eef417 Actually fix test from r345085 REQUIRE: asserts adds fe08d6738fe [ThinLTO] Fix a crash in lazy loading of Metadata adds 70fc21b85b4 [hot-cold-split] Only perform splitting in ThinLTO backend [...] adds 2a04af10be8 Revert "[ThinLTO] Fix a crash in lazy loading of Metadata" adds 8b9cbda1b32 [ORC] Re-apply r345077 with fixes to remove ambiguity in lo [...] adds 078522725a5 SelectionDAG: Reuse bigger sized constants in memset expansion. adds a73d657b589 [PM] keeping history when original SCC split and then merge [...] adds bd267780752 [hurd] Make getMainExecutable get the real binary path adds 0253f7506fa Commit missing comment edit and use correct cast to fix std [...] adds 9a2b84c9515 ARM: handle checking aliases with out-of-bounds GEPs adds e10866a63f9 [ARM64][Windows] Add unwind support to llvm-readobj adds bb45f1e99f8 [X86] Correct a bad isel predicate. Though I don't think it [...] adds edb9243e2d3 [LSR] Combine unfolded offset into invariant register adds 63aae622d8e [LV] Don't have fold-tail under optsize invalidate interlea [...] adds 8b5bda22ebf [ThinLTO] Fix dot dumper for regular LTO modules adds 7d5e5c27471 [AMDGPU] Defined gfx909 Raven Ridge 2 adds 37f7dbe1858 Revert r345114 adds 62af346c35b [ThinLTO] Change parameter type. NFC adds 8f55d0922bb [llvm-mca] [llvm-mca] Improved error handling and error rep [...] adds 2191c153b0a [llvm-exegesis] Implements a cache of Instruction objects. adds 0fd37a09705 [MinGW] Enable large file for mingw-w64 adds 1dca9776067 [X86][SSE] Update PMULDQ schedule tests to survive more agg [...] adds 306868b91c0 Fix llvm-strings crash for negative char values adds 99402db0aa1 [DEBUGINFO, NVPTX] Try to pack bytes data into a single string. adds 31fda7550e7 [FPEnv] Convert more BinaryOperator::isFNeg(...) to m_FNeg(...) adds a9c48593d99 [llvm-mca] Refactor class SourceMgr. NFCI adds c26bd2324dd [InstCombine] try harder to form select from logic ops (2nd try) adds 0ca5e5ea617 IR: Optimize FunctionType::get to perform one hash lookup i [...] adds ed350b9c592 [InstCombine] add test for select with shuffled condition ( [...] adds 8ae5d120406 [LegalizeDAG] ExpandLegalINT_TO_FP - cleanup UINT_TO_FP i64 [...] adds 3f46d1d9fae [llvm-mca] Remove dependency from InstrBuilder in class Ins [...] adds 95f42d0b8c4 [InstCombine] add test for ComputeNumSignBits with shuffle; NFC adds e781359f6e6 [CodeGen] skip lifetime end marker in isInTailCallPosition adds b3b0836b9b3 [CostModel][X86] Enable non-uniform vector division by cons [...] adds a1d58c65372 [X86] Bring back the MOV64r0 pseudo instruction adds 048958afe03 [docs] Add rawspeed to test-suite proposals. adds 3be6adfc140 [Hexagon] Flip hexagon-autohvx to be true by default adds fdd0e51f3ee ARM: Use BKPT instead of TRAP to implement llvm.debugtrap. adds 5b4f9ef85eb [CostModel][X86] Add vXi8 vector division by constants costs. adds 0c69da83b35 [hot-cold-split] Name split functions with ".cold" suffix adds 3cc8b4921a6 [TargetLowering] Add SimplifyDemandedBitsForTargetNode callback adds 24c5a02353e [X86][SSE] Add SimplifyDemandedBitsForTargetNode PMULDQ/PMU [...] adds c76c43b05e9 [X86] Explicitly list all KNL features of inheriting from IVB. NFC adds e65789f9913 [llvm-mca] Simplify the logic in FetchStage. NFCI adds b0a35e2f85d [AArch64] Fix overlapping instructions adds 07660eab690 [AArch64] Refactor Exynos machine model (NFC) adds 55134c631c6 AArch64: add a pass to compress jump-table entries when possible. adds 3435941b05c [MC] Separate masm integer literal lexer support from inline asm adds 679afabe4ef [llvm-mca] Replace InstRef::isValid with operator bool. NFC. adds e7543196c95 [ExecutionEngine] Remove some dead code from JITEventListener.h. adds b8895a84ec6 [MIR] Add hasWinCFI field adds 04070efcd23 [X86] Add *SP to tailcall register class to fix verifier error adds 76616be80bb [DAG] check more operands for cycles when merging stores. adds 36c040be6bd [AArch64] Refactor Exynos machine model adds 718a779582c [SourceMgr][FileCheck] Obey -color by extending WithColor adds d51aaa8a3f6 Make llvm-dwarfdump -name work on type units. adds a5ed0ab1fe7 [InstCombine] add test for fptrunc with vector with undef elt; NFC adds c0bb0349d79 [HotColdSplitting] Identify larger cold regions using domtr [...] adds a740192ca60 [SelectionDAG] DAG combiner for fminnan and fmaxnan adds 69b255770f9 [VFS] Remove 'ignore-non-existent-contents' attribute for Y [...] adds b8fd9d55db1 llvm-dwarfdump: Account for skeleton addr_base when dumping [...] adds 86e199d8d61 Update MemorySSA in LoopRotate. adds bcfd1f3eadd [llvm-objcopy] Introduce dispatch mechanism based on the input adds bbc2ea9b218 [NFC] Rename minnan and maxnan to minimum and maximum adds 59116cffe1e [ELF] Fix large code model MIR verifier errors adds d63364426de Make fminimum/fmaximum SDNodes commutative and associative adds 409b1027e90 [WebAssembly] Retain shuffle types during custom lowering adds d5d108ee21b [WebAssembly] Fix immediate of rethrow when throwing to caller adds 57075a5226d DebugInfo: Reuse common addresses for rnglist base address [...] adds 3d8e85cd863 [X86] Fix pipeline tests when enabling MIR verification, NFC adds 7b105bc3a6c [X86] Adjust MIR test case to pacify machine verifier adds 7c10f9a44d5 [WebAssembly] Set LoadExt and TruncStore actions for SIMD types adds 21435b345c5 [X86] Fix typo in comment. NFC adds 5c27f3e8877 [llvm-readobj] Print ELF header flags names in GNU output adds 42e23ebc6e4 [X86] Don't use the OriginalDemandedBits to calculate the D [...] adds f4fb61b34ba [MCSched] Bind PFM Counters to the CPUs instead of the SchedModel. adds 65f864674d9 [llvm-exegesis] Fix warning in r345243. adds a06ebcb65fa [llvm-exegesis] Fix VC build of r345243. adds 4a4eaf68ea0 [llvm-exegesis] Add missing initializer. adds e658a002300 Add -instcombine-code-sinking option adds 406bb74d509 [DebugInfo][Dexter] Unreachable line stepped onto after Sim [...] adds 5d0d6ef5911 Fix MSVC llvm-exegesis build. NFCI. adds 474181f1d60 [TTI] Add generic SK_Broadcast shuffle costs adds 8377922c282 [llvm-dwarfdump] - Fix incorrect parsing of the DW_LLE_star [...] adds f86533efab9 [TargetLowering] Improve vXi64 UINT_TO_FP vXf64 support (P38226) adds 8893acb1d7d Missing semicolon. adds aa7c2d802d9 [llvm-mca] Removed a couple of redundant method declaration [...] adds 6f98ad09313 [CostModel][X86] Add realistic i64 uitofp f64 scalar costs adds a9f0942cd97 [RISCV] Use PatFrags for variable shift patterns adds 8a10b6b077a [CostModel][X86] Add realistic vXi64 uitofp vXf64 costs adds 5b13734c4d8 IR: Optimize StructType::get to perform one hash lookup ins [...] adds 497bf4892d2 [GlobalISel] Use the target preferred type for G_EXTRACT_VE [...] adds c00e256ef2c [X86] Fix llc invocation on MIR test case adds 1b6f74f7adc [DEBUG_INFO][NVPTX]Fix processing of DBG_VALUES. adds b79b03ee2a8 [AArch64] Do 64-bit vector move of 0 and -1 by extracting f [...] adds 4f4e519ae66 [AArch64] Refactor definition of EXT patterns to use a multiclass adds 7efb6dd83cf [ARM] Use Cortex-A57 sched model for Cortex-A72 adds 7dddaa81329 [AArch64] Add EXT patterns for 64-bit EXT of a subvector of [...] adds c8f0858dfc5 [ARM] Regenerate vdup tests adds c915aaf6e9a [AArch64] Refactor Exynos feature sets (NFC) adds a64e4ae25fd [llvm-mca] Introduce a new base class for mca::Instruction, [...] adds a46fc2a0845 [AArch64][GlobalISel] Fix the LegalityPredicate for lowerIf [...] adds 681afad76c7 [X86] Remove some uarch tuning flags from KNL that look to [...] adds e662a68784e [X86] Remove ProcIntelKNL and replace with a SlowPMADDWD fl [...] adds af0086ca57f [GISel] LegalizerInfo: Rename MemDesc::Size to SizeInBits t [...] adds 4532ef4dfdf [LegalizeDAG] Remove dead SINT_TO_FP legalization code adds 32b8b6b1e18 [GlobalISel] LegalizerHelper: Fix the incorrect alignment w [...] adds f6da6905251 [X86] Add KNL command lines to movmsk-cmp.ll. adds 88b2c1ee841 [FPEnv] Last BinaryOperator::isFNeg(...) to m_FNeg(...) changes adds ee0e48f6cbb [X86] Add some non-AVX512VL command lines to the *vl-vec-te [...] adds 6c8035cd897 [WebAssembly] Use target-independent saturating add adds 5b2a5eeabc6 [AArch64][GlobalISel] Simplify a legalizer test. NFC. adds 02558799ed8 [AArch64] Create proper memoperand for multi-vector stores adds 4619b40840b [CodeGen] Remove operands from FENTRY_CALL adds b23940c3585 [X86] Change X86 backend to look for 'min-legal-vector-widt [...] adds e87a916f684 [Pipeliner] Remove the unneeded include header(NFC). adds 4b57585e55d [Pipeliner] Ignore Artificial dependences while computing r [...] adds 441900b083e llvm-dwarfdump: loclists: Don't expect an (albeit empty) ex [...] adds ff3c72bc7c5 [SystemZ] Improve handling and cost estimates of vector in [...] adds bf9eac7026c [x86] add tests for missed load folding; NFC adds f9dc2283f4f DebugInfo: Explain why DW_LLE_(GNU_)startx_length is used adds bc1846b491b [SystemZ] Improve getMemoryOpCost() to find foldable loads [...] adds aa15a2efde1 [SystemZ] NFC reformatting in SystemZTargetTransformInfo.cpp adds 35a25c7fdd0 [WebAssembly] Error out when block/loop markers mismatch adds dcebff85b48 Address comments adds 8b707d72225 Tidy up test case adds 0c69a17dcce Delete test case. Assertions can't be tested. adds 50bf7df5bb7 [AArch64] Implement FP16FML intrinsics adds b829dc35499 Fix in MachineOperand::printIRValueReference(). adds 81e90c1e1e8 [WebAssembly] Support EH instructions in InstPrinter adds 397841e1d34 Reland "[WebAssembly] LSDA info generation" adds 9067288adc5 [SystemZ] Pass the DAG pointer from SystemZAddressingMode: [...] adds f3aabb0947b Dump public symbol records in pdb2yaml mode adds 23962bb2765 [SystemZ] Implement SystemZOperand::print() adds 8b17cc87ef7 Teach the DominatorTree fallback to recalculation when appl [...] adds 24e43efe87f add myself to the CREDITS.TXT adds 7a69d009b10 Revert "[AArch64] Create proper memoperand for multi-vector [...] adds 44ed3ae63d6 [PowerPC][NFC] Add tests for some missed optimization oppor [...] adds 775f2aaa830 Add dependency from SystemZAsmParser to SystemZAsmPrinter a [...] adds 5fca6050754 [Pipeliner] Mark swp-art-deps-rec.ll as REQUIRES: asserts a [...] adds 699414a4935 [PowerPC] Keep vector int to fp conversions in vector domain adds 3dfd21e1862 [NFC] Fix the regular expression for BE PPC in update_llc_t [...] adds bd16cc646c6 This reverts commit r345357, It is wrong to create a new d [...] adds 61aa414e834 [PowerPC][NFC] Add tests for some missed optimization oppor [...] adds ad84a8b9be8 [PowerPC] Fix some missed optimization opportunities in com [...] adds cb46794300b [llvm-nm] Simplify. NFC adds 9da5c176f07 [NFC] Add periods to CREDITS.txt (testing git-llvm) adds 6a2012a85f7 [SystemZ] Fix -Wcovered-switch-default as coding standard r [...] adds 8af523842a7 [SimpleLoopUnswitch] Make all checks before actual non-triv [...] adds 390074be651 [llvm-mca] Removed dependency on mca::SourcMgr in some Views. NFC adds 500b851fc5b [Codegen] - Implement basic .debug_loclists section emissio [...] adds d362f0fbbba [llvm-mca] Fix -wreorder and -Wunused-private-field after r [...] adds 6080e680f1f Regenerate test adds 92794ee479f [AMDGPU] Add a pass to promote bitcast calls adds 0cb7fad74cf [llvm-ar] Access ADDLIB in llvm-ar via command line adds f01b04819ec [CodeGen] Remove out operands from PATCHABLE_OP adds 1911e927c06 [ARM] Fix ARMCodeGenPrepare test cases adds 79fad5df81b [SimpleLoopUnswitch] Unswitch by experimental.guard intrinsics adds 49cd7dd878d [X86] Use existing pulled out VT variables. NFCI. adds 8d07a140f25 [x86] commute blendvb with constant condition op to allow l [...] adds 35e2b773d7a [X86][SSE] Move 2-input limit up from getFauxShuffleMask to [...] adds 1ba9cfd74f1 [MIR] Simplify and move MIR test adds 78b827929db Revert "UBSan blacklist workaround for bot timeouts" adds 79135142e40 [tblgen] Improve comments in TargetInstrPredicate.td. NFC adds d0ae3cb27e5 [DWARF][NFC] cleanup (mostly leftovers from the implementat [...] adds 571f8d7f8e9 [llvm-ar] Add a dependency to BinaryFormat after rL345383 adds 39e6c05285c [X86] Add -LABEL to some FileCheck checks. NFC adds e6fdc842f78 [X86] Stop promoting vector and/or/xor/andn to vXi64. adds a8aac85576d [llvm-ar] Strip trailing \r and format adds 11f7e93c155 [ADT] Use explicit constructors for DenseMapPair to work ar [...] adds d87fb985a5d Pointer types were treated as zero-size by MergeICmps adds aff6cf49108 [PowerPC] Improve BUILD_VECTOR of 4 i32s adds d8ceaaa597e [XRay] Use std::errc::invalid_argument instead of std::errc [...] adds d1f07078e8d [ARM] Make InstrEmitter mark CPSR defs dead for Thumb1. adds 9bd251e6a00 [Spectre] Fix MIR verifier errors in retpoline thunks adds 15176255437 Add docs+a script for building clang/LLVM with PGO adds 556cad18dba [LegalizeTypes] Stop DAGTypeLegalizer::getSETCCWidenedResul [...] adds 52931b4520c [ValueTracking] peek through shuffles in ComputeNumSignBits [...] adds 36943624b27 [DAGCombiner] rearrange code in narrowExtractedVectorBinOp(); NFC adds 2d7ab83128c [VFS] Add property 'fallthrough' that controls fallback to [...] adds b49d1c1b41a Revert "[PassManager/Sanitizer] Enable usage of ported Addr [...] adds 0cbc52e6d48 [llvm-readobj] Fix bugs with unrecognized types in switch s [...] adds 00233291cf2 [x86] adjust tests to preserve behavior; NFC adds 3875fd1877c Further split cpus test adds 3e9dcf4c0bf DebugInfo: reduce DIE range verification on object files adds 29640ad38b7 [Hexagon] Add missing assignment to Itinerary in Call_nr adds f20a65307c9 test: add missing -triple adds 6cf89e3f848 Revert r345169 [along with its llvm counterpart r345170] as [...] adds 797a40a2bbc [X86] Add some isel patterns for scalar_to_vector/extract_v [...] adds 18412a68d2c [ARM64][Windows] MCLayer support for exception handling adds 643e94644ec Revert rL345395: [X86][SSE] Move 2-input limit up from getF [...] adds 57aa4fc38b0 [TargetLowering] Move LegalizeDAG FP_TO_UINT handling to Ta [...] adds 5bdc0dc5915 Regenerate FP_TO_INT tests. adds 81777361078 Fix -Wdocumentation warning. NFCI. adds 59de0e0629d [x86] make test immune to improved extraction in D53784; NFC adds 196c0605296 [Local] Keep K's range if K does not move when combining metadata. adds 836c763dadb Revert "DebugInfo: reduce DIE range verification on object files" adds 549f6670073 [X86][SSE] LowerVSELECT - pull out repeated getOperand(). NFCI. adds 97adbba88e8 [utils] Run tests in the proper directory. adds 69daf48aab5 [NFC][X86] Baseline tests for AMD BdVer2 (Piledriver) Sched [...] adds 3a8afbd8a1a AMD BdVer2 (Piledriver) Initial Scheduler model adds a8bdd2f2388 Revert r344172: [LV] Add a new reduction pattern match adds 98cb136da40 [utils] Fix _run_benchmark in collect_and_build_with_pgo.py adds ff6f0b2f418 [utils] collect_and_build_with_pgo.py: revert part already [...] adds 03f7634b5d1 [X86] Add test cases showing missed opportunities for optim [...] adds 346342d0699 [DAGCombiner] Better constant vector support for FCOPYSIGN. adds 5c0be92e193 [VectorLegalizer] Enable TargetLowering::expandFP_TO_UINT support. adds 340f56a47cc [X86][NFC] sse2-schedule.ll: disable XOP for BdVer2 tests adds 459b074278f [X86][NFC] sse41-schedule.ll: disable XOP for BdVer2 tests adds b757770914c [X86][NFC] sse42-schedule.ll: disable XOP for BdVer2 tests adds 1798150a2b1 [TargetLowering] Move i64/vXi64 to f32/vXf32 UINT_TO_FP han [...] adds 218c641bcf8 [llvm-exegesis] Fix SNB counter definition and handling. adds 5984510fd0f [SelectionDAG] Fix bad indentation. NFC adds a8288db8057 Revert "Revert "DebugInfo: reduce DIE range verification on [...] adds 7577443d842 [X86] Add test case to show failure to handle splat vectors [...] adds 020d70964c6 [X86] Recognize constant splats in LowerFCOPYSIGN. adds f3ae95d632a [X86] Force floating point values in constant pool decoding [...] adds 3bb7e2936fb [ARM][NFC] Fix test inlineasm-X-allocation.ll adds 198a3abf530 [llvm-objdump] Add '--full-contents' as alias for '-s' adds 11ead03db9d [llvm-mca][UpdateTestChecks] Don't try to align blocks that [...] adds ee5a5147a14 [llvm-mca] Lower to mca::Instructon before the pipeline is run. adds 578a996f812 [X86] Remove outdated test adds d32696ac377 [llvm-objdump] Don't crash when using `-a` on non-archives adds 6b8000447a6 [git/svn] Ignore Visual Studio's CMakeSettings.json. adds ef885d5463d [LLVM-C] Add Builder Bindings to Common Memory Intrinsics adds e7732100b88 [AArch64] Return address signing B key support adds 5aeb36fdcb2 [Intrinsic] Signed and Unsigned Saturation Subtraction Intirnsics adds fef0a760bec [X86] Enable the MachineVerifier by default adds 2aa608814cd [AMDGPU] Match v_swap_b32 adds e6817098ad0 [AArch64] Rename FP16FML instruction format (NFC) adds 06c7d86e498 [AMDGPU] Fixed return value causing warning and regression adds 69e1e93c55c [X86] Add AES to KNL CPUs to match clang. adds 125dd26c10d [X86][SSE] getFauxShuffleMask - Fix shuffle mask adjustment [...] adds 7b852b7b76c [WebAssembly] Lower away condition truncations for scalar selects adds c65373c0983 [HotColdSplitting] Allow outlining single-block cold regions adds fe506c93e9a [X86] Set isMachineVerifierClean() back to false (PR27481) adds 8f7dc5cb4ec Relax fast register allocator related test cases; NFC adds 53e05d372d0 [MachineOutliner] Inherit target features from parent function adds fb954c0ce16 [LoopUnroll] NFC. Factor out runtime-loop.ll common test behavior. adds d06dc588fe6 [InstSimplify] add tests for abs/nabs+icmp folding; NFC adds 93ce40bd23b AMDGPU: Enable code object v3 by default adds 0763384459e Add parens to fix incorrect assert check. adds 245f8d7f3fb [llvm-objcopy] Move elf-specific code into subfolder adds 3efd3a74afe [DWARF][NFC] Refactor range list extraction and dumping adds 6be73e7eade [AliasSetTracker] Cleanup addPointer interface. [NFCI] adds ea8bef6b826 Remove unneeded friend declarations that clang-cl warns on adds 54d12f35afd Pass TRI to printReg adds 03eb1d66574 Fix typos in comment adds 3311128c587 Remove dead declaration adds 4ae1eac0ecb AMDGPU: Use scavengeRegisterBackwards adds 3031f2125fb AMDGPU: Remove custom BUILD_VECTOR combine adds 1de3cb13c18 [X86] Stop changing f128 fand/for/fxor to v2i64. adds 141f443f641 [X86] Cleanup the code in LowerFABSorFNEG and LowerFCOPYSIG [...] adds 4bef8b292d3 [AArch64] Add test case for D53229. NFC adds 52ba37f41c7 [LegalizeTypes] Teach PromoteIntRes_BITCAST to better handl [...] adds 8f9fb8bab2e [DAGCombiner] Improve X div/rem Y fold if single bit element type adds e55c3ed6b1f [SelectionDAG] Add FoldBUILD_VECTOR to simplify new BUILD_V [...] adds e1ffb34fd88 [AArch64] Add support for UDF instruction adds f276cd65598 [X86] Add extra-uses on the mask of pattern c of extract-{l [...] adds ae66d6c1092 [X86][BMI1] X86DAGToDAGISel: select BEXTR from x & (-1 >> [...] adds 8125e33cdb8 [SROA] Use offset sizes from the DataLayout instead of the [...] adds 7a9cc35ddd8 [FIX][AArch64] Add support for UDF instruction adds 077c1227927 [llvm-size] Reject unknown radix values adds 6165c5d19d4 [llc] Error out when -print-machineinstrs is used with an u [...] adds 0d3744e3d70 [X86] Re-enable the machine verifier after fixing more tests adds bb950aec63a [SystemZ] Improve isFoldableLoad() for Sub, SDiv and UDiv. adds 237ef87e5bb [SelectionDAG] fix build warning for mismatched signs in co [...] adds d19bba6122b [FIX][AArch64] Add support for UDF instruction adds 895148a2801 [DAGCombiner] narrow vector binops when extraction is cheap adds ccd4f446eb6 [LoopVectorizer] Fix for cost values of memory accesses. adds 78f5683a63c [SchedModel] Fix for read advance cycles with implicit pse [...] adds 36d678978c9 [InstCombine] try to turn shuffle into insertelement adds 467c30721bb [llvm-mca] Move namespace mca inside llvm:: adds 7e791322571 [InstCombine] use getFltSemantics() instead of duplicating it; NFC adds 0a2198d1201 [llvm-objcopy] Fix --keep-global-symbol/--globalize-symbol [...] adds 9abf4aed732 [InstSimplify] add tests for fcmp folds; NFC adds cbcde934b39 [InstCombine] Add preliminary tests for nested min/max comb [...] adds 38ad550dd9a [TTI] Fix uses of SK_ExtractSubvector shuffle costs (PR39368) adds 0a9adfeb4f0 [SystemZ] Simplify LRV/STRV ISD nodes adds 92ddcaeaddf [DebugInfo] Define base function on DWARFDie reverse iterators adds e446f79b59c Fix printing bug in pdb2yaml. adds b79937c9738 [DAG] Add const variants for BaseIndexOffset functions. adds 14842a4c81b [GCOV] Function counters are wrong when on one line adds 528c13b2d37 [X86] In lowerVectorShuffleAsBroadcast, make peeking throug [...] adds bbd45bf0b7c [AArch64] Create proper memoperand for multi-vector stores adds 76f9294c76f [AArch64] [Windows] SEH opcodes should be scheduling boundaries. adds e7db9d074e2 [DAGCombiner] Fix for big endian in ForwardStoreValueToDirectLoad adds a0a61c42505 [ScalarizeMaskedMemIntrin] Limit the scope of some variable [...] adds dfdeb96122e [x86] try to make test immune to better div optimization; NFCI adds 94a3208c98e [x86] try to make test immune to better div optimization; NFCI adds 80491cca53e [COFF, ARM64] Make sure to forward arguments from vararg to [...] adds bf4357523a6 [x86] try to make test immune to better div optimization; NFCI adds 044ef75cd4e [InstCombine] Teach the move free before null test opti how [...] adds ef977847393 [InstCombine] use 'match' to reduce code; NFC adds 3277e77bfd3 [FPEnv] [FPEnv] Add constrained intrinsics for MAXNUM and MINNUM adds b5d6bd0e486 Revert r345542: AMDGPU: Enable code object v3 by default adds fbcb9d60a26 [ARM][NFC] Make tests immune to better div optimizations adds 83c015bd734 MachineOperand/MIParser: Do not print debug-use flag, infer it adds 1c6bfcc50c3 DWARFVerifier: make the verifier more comprehensive for objects adds b3bc95870d9 ADT/STLExtras: Introduce llvm::empty; NFC adds 72e5d0dd3b2 Don't duplicate function/class name at the beginning of the [...] adds f087eba4103 Use the container form llvm::sort(C) adds 0fecaffa305 Use llvm::any_of instead std::any_of. NFC adds fe0f4354daf [llvm-objcopy] Delete a redundant override whose base is empty adds daecf945cc4 [DWARF] Revert r345546: Refactor range list extraction and dumping adds b6dd98ba241 Try to fix ambiguities with C++17 headers in unittest adds 4f277569500 2nd attempt to fix ambiguities because of ADL adds d71ec721146 [ORC] Fix hex printing of uint64_t values. adds 6ee01635feb [llvm-objdump] support '--syms' as an alias of -t adds d75205d3b71 [AArch64] Mark condition flags and x16/x17 as clobbered whe [...] adds 2c097a41315 [ARM64] [Windows] Exception handling support in frame lowering adds 761dc549d14 [MSan] another take at instrumenting inline assembly - now [...] adds bb1b895ac06 [llvm-objdump] Add --reloc alias for -r (PR39407) adds a3cc6ce0cb7 [llvm-objdump] Mark syms/t flags as NotHidden. NFC. adds 06bac6c858a [LV] Support vectorization of interleave-groups that requir [...] adds b1ebaf21d0d [IndVars] Strengthen restricton in rewriteLoopExitValues adds 5ab552691a8 [AMDGPU] support image load/store a16 adds c8be3e89c6e [ADT] Remove illegal comparison of singular iterators from [...] adds ce084155a27 [NFC] Add tests for loop-simplifycfg for further development adds cf7570b9ac8 [tblgen][PredicateExpander] Add the ability to describe mor [...] adds 893f08bea2e [InstSimplify] fold icmp based on range of abs/nabs adds 91533e99d40 AMDGPU: Remove PHI loop condition optimization adds 776a459079f AMDGPU: Rewrite SILowerI1Copies to always stay on SALU adds 125c8f987dd [DAGCombiner] Fold 0 div/rem X to 0 adds ea1119a1f58 [InstSimplify] add tests for fcmp and known positive; NFC adds 2f9c8a0c1d8 [LoopUnroll] allow customization for new-pass-manager versi [...] adds 1ef057dce8d [InstSimplify] fold 'fcmp nnan oge X, 0.0' when X is not negative adds 123a45feb66 [InstCombine] add assertion that InstSimplify has folded a [...] adds 5406c80642f [InstSimplify] fold 'fcmp nnan ult X, 0.0' when X is not negative adds d510dbfbdb1 [llvm-mca] Remove namespace prefixes made redundant by r345 [...] adds aaf702f58f4 [Hexagon] Make sure not to use GP-relative addressing with PIC adds 22968f72bdd [InstCombine] refactor fabs+fcmp fold; NFC adds 08b668a1c47 MachineModuleInfo: Initialize DbgInfoAvailable depending on [...] adds 99c33171a13 [globalisel][irtranslator] Verify that DILocations aren't l [...] adds 8fa1a87ff8c TableGen: Fix ASAN error adds ec248eb35c4 [llvm-mca] Remove the verb 'assemble' from a few options in [...] adds b5378372b8a [InstCombine] Combine nested min/max intrinsics with constants adds da002c73974 [InstCombine] add tests for fcmp with -0.0; NFC adds 39aa3ef71c8 [globalisel][irtranslator] Fix test from r345743 on non-ass [...] adds 94e927ca2ef [SelectionDAG] SelectionDAGLegalize::ExpandBITREVERSE - ens [...] adds 0a69194ac1f [InstCombine] regenerate test checks; NFC adds ed6d50a5c3b Fix comment typo. NFCI. adds b52849d771c [SelectionDAGISel] Suppress a -Wunused-but-set-variable war [...] adds 3c1f69b206d [AMDGPU] Remove FeatureVGPRSpilling adds 6bf883d664c [globalisel] Add comments indicating the operand order adds 30005234d7d [SelectionDAG] Handle constant range [0,1) in lowerRangeToA [...] adds cd627aacb4c [InstCombine] add tests for fmin/fmax pattern matching fail [...] adds 792c305d691 [adt] SparseBitVector::test() should be const adds 63293707a9b Remove unused internal template parameter. adds 29d4d646370 [DWARF][NFC] Refactor a function to return Optional<> inste [...] adds b98edf7f1c3 [ValueTracking] add tests for fmin/fmax; NFC adds 832efd7ec3d Check shouldReduceLoadWidth from SimplifySetCC adds 9268a4a0f0e revert rL345717 : [InstSimplify] fold icmp based on range o [...] adds d001dd065e3 [ARM] Add missing pseudo-instruction for Thumb1 RSBS. adds c5f8ae0a0fb Revert r345165 "[X86] Bring back the MOV64r0 pseudo instruction" adds 844c605ee0b [AArch64] Sort switch cases (NFC) adds 4cf0e5ba23e [InlineCost] Remove a dead constant; NFC adds 58970cd2b44 [IR] Allow increasing the alignment of dso-local globals. adds 585b6667b47 [COFF, ARM64] Implement Intrinsic.sponentry for AArch64 adds d886fa44972 [VFS] Add support for "no_push" to VFS recursive iterators. adds 41079ac2534 [WebAssembly] Handle vector IMPLICIT_DEFs. adds 6700bd314aa [WebAssembly] Process p2align operands for SIMD loads and stores adds f4bf727b251 [WebAssembly] Lower vselect adds 3fe1b12fca9 [XRay] Add CPU ID in Custom Event FDR Records adds e19f1300d60 X86: Consistently declare pass initializers in X86.h; NFC adds fb149994336 [PowerPC] Support constraint 'wi' in asm From the gcc man [...] adds fd25d2bf307 [CodeView] Emit the correct TypeIndex for std::nullptr_t. adds 27ade8ff0f1 [SCEV] Avoid redundant computations when doing AddRec merge adds 2f425e9c794 [IndVars] Smart hard uses detection adds b7d7362e652 [SystemZ::TTI] Accurate costs for i1->double vector conversions adds e46f5df5597 [SystemZ::TTI] Recognize the higher cost of scalar i1 -> f [...] adds 1edc3c60f39 [NFC] Reorganize code to prepare it for more transforms adds eae41c39e72 [Mips] Conditionally remove successor block adds 477ccd4e50e [NFC] Specialize public API of ICFLoopSafetyInfo for insert [...] adds 04cce6e8dc7 [X86][SSE] Move 2-input limit up from getFauxShuffleMask to [...] adds 4234638f13b [AArch64] Add support for ARMv8.4 in Saphira. adds 5c891e3a6b9 [ADT] Clean up SparseBitVector copying and make it moveable adds f097f64ecbf [mips][micromips] Fix JmpLink to TargetExternalSymbol adds 258eac5bd6d [InstSimplify] add tests for icmp fold bug (PR39510); NFC adds 148536769ac [InstSimplify] fold icmp based on range of abs/nabs (2nd try) adds aa868d8549e [X86][X86FixupLEA] Rename processInstructionForSLM to proce [...] adds c35d5db855b [MS Demangler] Expose the Demangler AST publicly. adds b74f1454d8d [ARM][CGP] Negative constant operand handling adds 14550f9fb5e [MC] Implement EmitRawText in MCNullStreamer adds 69778b6a711 [DAGCombiner] make sure we have a whole-number extract befo [...] adds b530051d914 [llvm-objcopy] Use proper cases adds 0fc1aec92a5 [NativePDB] Get LLDB types from PDB function types. adds 376ec2b8fb9 [ARM] Attempt to fix ppc64be buildbot adds b5216e928ab Fix whitespace in test/Assembler/fast-math-flags.ll adds f4dd4f28a9f [InstCombine] add test for ComputeNumSignBits on 2-input sh [...] adds d919ed9caca [llvm-objcopy] For multiclass Eq, associate help text with [...] adds 1033d5958c9 [llvm-objcopy] Don't apply --localize flags to common symbols adds 167fb187524 [llvm-objcopy] Support --{enable,disable}-deterministic-archives adds 9a78ad0d49c [llvm-strip] Support --keep and --strip-all-gnu from llvm-objcopy adds fb61af32fa7 Revert "[COFF, ARM64] Implement Intrinsic.sponentry for AArch64" adds f8ad7b8535a [AArch64] Fix unintended fallthrough and strengthen cast adds daf3fe16b9b [llvm-mca] Add extra counters for move elimination in view [...] adds 6e439b1d65c [Hexagon] Fix MO_JumpTable const extender conversion adds 03e85999496 [LegalizeDAG] Add generic vector CTPOP expansion (PR32655) adds 2ef07e92b85 [GlobalISel] Fix a bug in LegalizeRuleSet::clampMaxNumElements adds cf5c71234a4 Remove unnecessary fallthrough annotation after unreachable adds f31487a7c3c [LoopInterchange] Remove support for inner-only reductions. adds a5b7f8b4abd Annotate possibly unintended fallthroughs in Hexagon MC code, NFC adds a754e02f2af [codeview] Add breaks to fix -Wimplicit-fallthrough adds 63131d5e338 [WebAssembly] Fixup `main` signature by default adds 797cdde77bb [LoopInterchange] Fix unused variables in release build adds b7d45e1d881 Fix clang -Wimplicit-fallthrough warnings across llvm, NFC adds 064632dac71 [Hexagon] Remove unintended fallthrough from MC duplex code adds 3c3bf738409 Enable -Wimplicit-fallthrough for clang as well as GCC adds 11545515d0e [WebAssembly] Fix signature parsing for 'try' in AsmParser adds 3516febde5b [COFF, ARM64] Implement llvm.addressofreturnaddress intrinsic adds 1e74971827b Silence -Wimplicit-fallthrough in gold plugin adds 78ba7a6ff0d [llvm-objcopy/strip] [NFC] Clean up tablegen opts (clang-fo [...] adds 212225ec620 [AMDGPU] Handle the idot8 pattern generated by FE. adds c429a87ae9e [IR] remove fake binop query for fneg adds a921b710dfa [XRay] Fix TSC and atomic custom/typed event accounting adds 41e2e9fdff8 [MachineOutliner][NFC] Remember when you map something ille [...] adds 7cdbd1162cb [X86] Add test cases for adding vector support to isTruncat [...] adds 41672bb1ce0 [DAGCombiner] Make the isTruncateOf call from visitZERO_EXT [...] adds 08238b7fa9a [COFF, ARM64] Implement Intrinsic.sponentry for AArch64 adds badd06e25e5 [gold-plugin] Fix a bunch of build warnings adds 782574b28c5 [AliasSetTracker] Misc cleanup (NFCI) adds a00405d87a7 [WebAssembly] Expand inserts and extracts with variable indices adds c46ca76214e [NFC][LICM] Factor out instruction erasing logic adds 437a9372206 [WebAssembly] General vector shift lowering adds 2495823e188 [WebAssembly] Added a .globaltype directive to .s output. adds 94f7fc2ccd3 LLVMTargetMachine/TargetPassConfig: Simplify handling of st [...] adds f4ddd6209c2 test/DebugInfo: Convert some tests to MIR adds e64378786d0 AMDGPU: Fix assertion with bitcast from i64 constant to v4i16 adds 8de3dff1923 [XRay] Update delta computations in runtime adds b562d40af4a [XRay] Fix tests with updated fdr-dump adds 6d0de656828 [LV] Avoid vectorizing loops under opt for size that involv [...] adds 180fb865fc1 Fix a typo in a function name adds 70c62a14e09 [AMDGPU] UBSan bug fix for r345710 adds 44ee0056851 [DAGCombiner] Remove reduceBuildVecConvertToConvertBuildVec [...] adds 11ef6e19fe8 Allow null-valued function operands in getCalledFunction() adds c5e4cd20b51 [DEBUGINFO, NVPTX]DO not emit ',debug' option if no debug i [...] adds b7577abc110 [Hexagon] Do not reduce load size for globals in small-data adds 1b82386f5eb [NFC] Remove some extra characters from docs/LangRef.rst adds 6709348e9f6 [ValueTracking] allow non-canonical shuffles when computing [...] adds 2033b5aeb4d [MachineSink][DebugInfo] Correctly sink DBG_VALUEs adds 7e36a98252d [SystemZ] Rework getInterleavedMemoryOpCost() adds 062cd21484f Fixed inclusion of M_PI fow MinGW-w64 adds 6ed7d3348e3 [ProfileSummary] Add options to override hot and cold count [...] adds 4860c625396 Refactor the lit configuration files adds 04550cf8d34 [SystemZ::TTI] Improve cost handling of uint/sint to fp co [...] adds 437cbaffffc Fix a few small issues in llvm-pdbutil adds 6892afb33a7 [ValueTracking] add test for non-canonical shuffle; NFC adds 7a01cbd4a15 ARMExpandPseudoInsts: Fix CMP_SWAP expansion adding a kill [...] adds b11a4e59cca [DebugInfo][InstMerge] Fix -debugify for phi node created b [...] adds 088dcea9b16 [WebAssembly] Fix bugs in rethrow depth counting and InstPrinter adds 11e8afc67a2 [WebAssembly] Change indices types to unsined int (NFC) adds f15ca65fe6c [X86][AVX512] Change mask ops on vpermi2var tests to not us [...] adds 584721e76a3 [RISCV] Add some missing expansions for floating-point intrinsics adds 34975426257 [AArch64] [Windows] Misc fixes for llvm-readobj -unwind. adds e29a02ac3f1 [DWARF] Fix typo, .gnu_index -> .gdb_index adds 83e97cbe0d2 [X86] Don't emit *_extend_vector_inreg nodes when both the [...] adds ef5bf36c741 [WebAssembly] Parsing missing directives to produce valid .o adds aeef43e1bb2 [X86] In LowerEXTEND_VECTOR_INREG, emit a vector shuffle in [...] adds 057bda604a7 [LTO] Fix a crash caused by accessing an empty ValueInfo adds 974dfd1b517 [DWARF v5] Verifier: Add checks for DW_FORM_strx* forms. adds cc8a1a635b5 [codeview] Let the X86 backend tell us the VFRAME offset ad [...] adds 7fad5fb0d0d [ValueTracking] peek through 2-input shuffles in ComputeNum [...] adds ad3c2dda979 [X86] Update comment I forgot to change in r346043. NFC adds 3ba729d2704 [SelectionDAG] Remove special methods for creating *_EXTEND [...] adds 88f96230a84 [DAGCombiner] Remove 'else' after return. NFC adds fd7c7ddb556 [ValueTracking] determine sign of 0.0 from select when matc [...] adds 0547a961bb2 [X86] Add vector shift by immediate to SimplifyDemandedBits [...] adds 42f23f52839 [X86] Regenerate test checks to merge 32 and 64 bit. Remove [...] adds ad684cff052 [X86] Add nounwind to some tests to remove cfi directives f [...] adds fd24147338c [HotColdSplitting] Use TTI to inform outlining threshold adds 32afb0f40d5 [X86] Fix typo in test comment. NFC adds 9de46729ce2 [AVR] Disallow the LDDWRdPtrQ instruction with Z as the des [...] adds e1bfe1a5fa5 [X86] Custom type legalize v2i8/v2i16/v2i32 mul to use to pmuludq. adds 2674d3c5ccb [AVR] Fix a backend bug that left extraneous operands after [...] adds 8fe35cc92ba [DAGCombiner] Remove an unused argument from tryFoldToZero. NFC adds 29dd59de7e1 [DAGCombiner] Use tryFoldToZero to simplify some code and m [...] adds 98b26220ebd [NFC][x86][AArch64] extract-bits.ll: add test with 'ashr'. adds 13d535a9c98 Exclude wasm target from Windows packaging due to PR39448 adds 76d01007eee [ARM][ARMCGP] Remove unecessary zexts and truncs adds 4bf0a8ee3f8 [ARM] Turn assert into condition in ARMCGP adds 040e4d75d3b [CMake] Expose opt-remark tooling through libOptRemarks.dylib adds 5efc1996cee [AMDGPU] Fix the new atomic optimizer in pixel shaders. adds 7051a2ef11c [NFC][ARM] Adding extra test for ARM CGP adds a6a81aee0be [Mips] Supplement long branch pseudo instructions adds 5cc99f0569c [Inliner] Penalise inlining of calls with loops at Oz adds 74ece931185 [InstCombine] add tests for select with FP identity op; NFC adds 570bf673b09 [NFCI][FPEnv] Split constrained intrinsic tests adds 28d03091b9b [InstCombine] add/adjust tests for select with fsub identit [...] adds e3b515280e3 [TargetLowering] Begin generalizing TargetLowering::expandF [...] adds fbe10782a95 [ThinLTO] Add an option to disable (thin)lto internalization. adds 7c442634fab [FPEnv] Add constrained CEIL/FLOOR/ROUND/TRUNC intrinsics adds 36d0612088f [InstCombine] adjust tests for select with FP identity op; NFC adds 60a9b3360da [InstCombine] loosen FP 0.0 constraint for fcmp+select subs [...] adds ab049d88fa9 [InstCombine] canonicalize -0.0 to +0.0 in fcmp adds 26835b9b0c8 [Power9] Add support for stxvw4x.be and stxvd2x.be intrinsics adds 513520e5af9 [InstCombine] add/adjust tests for fcmp+select substitution; NFC adds 960c5993194 [MergeICmps] Do not perform the transformation if GEP is us [...] adds c0bf8d6c82c Only call FlushFileBuffers() when writing executables on Windows adds 4a52ea2ea29 [COFF][LLD] Add link support for Microsoft precompiled head [...] adds 24e02bb6e1f [X86] Regenerate test checks in preparation for a patch. NFC adds 4d360e23f7d [GlobalISel] Refactor the artifact combiner a bit by using [...] adds 80ce0ad5123 [InstSimplify] add tests for select+fcmp; NFC adds e357c8b8798 [InstSimplify] fold select (fcmp X, Y), X, Y adds 94a5ca407cf [X86] Don't turn any_extend from a mask register into a sig [...] adds 351cca42bd1 Revert "[GlobalISel] Refactor the artifact combiner a bit b [...] adds 7829a6dfd5f AMDGPU: Add sram-ecc feature adds 40f2fec2547 [TargetLowering] Change TargetLoweringBase::getPreferredVec [...] adds 1d019aeea89 [DWARF] Support types CU list in .gdb_index dumping adds 51c2c7a40e3 MachineModuleInfo: Store more specific reference to LLVMTar [...] adds dad0df638d3 MachineFunction: Store more specific reference to LLVMTarge [...] adds 5617e05f341 TargetMachine: Move lib/CodeGen specific callbacks to LLVMT [...] adds 4579aeefa62 Specify REQUIRES: default_triple in two debuginfo tests adds fd192da8689 Revert "[WebAssembly] Fixup `main` signature by default" adds a8f890f4777 [X86] Autogenerate complete checks. NFC adds 4fefaaea5a0 [LLVM-C] Improve Intrinsics Bindings adds 46a96495e52 [LLVM-C] Fix Windows Build of Core adds a61bdda5577 Revert "[IndVars] Smart hard uses detection" adds 7c8bf013119 [NFC] Add motivating test case for revert in rL346198 adds 5927508e1da [LICM] Use ICFLoopSafetyInfo in LICM adds eb4aa4bedfa It's a test commit, which is my first commit and also add m [...] adds 326c2463813 AArch64: Cleanup CCMP code; NFC adds bd5ea2b6c23 [LICM] Remove too conservative IsMustExecute variable adds b92b0b860c7 [XRay] Update XRayRecord to support Custom/Typed Events adds d16e7d93840 [NFC] Turn collectTransitivePredecessors into a static function adds 5bc1446f3be [Support] Fix `warning: unknown pragma ignored` for mingw target adds 241a3bcfa82 [InstCombine] Ensure nested shifts are in range (OSS-Fuzz #9880) adds bfcda1dbe3a [X86][NFC] Fix comment. adds 302c74f88b0 [llvm-exegesis] Ignore X86 pseudo instructions. adds b9e341e90c1 [mips] Support sigrie instruction adds 07c5c7fbf9f [InstCombine] add tests for FMF propagation failure; NFC adds bd1a44f2b85 [InstCombine] propagate fast-math-flags when folding fcmp+fneg adds c52594aa970 [InstCombine] reduce code; NFC adds 9063923ffc9 [InstCombine] adjust tests to show dropping FMF; NFC adds 458830edd57 [benchmark] Disable exceptions in Microsoft STL adds d174746db8e [InstCombine] propagate fast-math-flags when folding fcmp+f [...] adds be4139f9342 [InstCombine] adjust tests to show dropping FMF; NFC adds 6052aa37059 [InstCombine] propagate fast-math-flags when folding fcmp+fpext adds ac037d267ff [InstCombine] rearrange code for fcmp+fpext; NFCI adds 031587fccfe [InstCombine] propagate fast-math-flags when folding fcmp+f [...] adds f49d01a74b4 [InstCombine] add vector test for fcmp+fpext; NFC adds 09d77c0de9e [InstCombine] allow vector types for fcmp+fpext fold adds 992cf17563f [WebAssembly] Add shared memory support to limits field adds d9f217dc397 Disable calls to *_finite and other glibc-only functions on Musl. adds 0706b913a32 Reland r346166: [GlobalISel] Refactor the artifact combiner [...] adds 7bad2acd44e [utils] Update SmallVector lldb formatter for r337514 adds 68241312ac2 [AArch64][GlobalISel] Simplify and autogenerate the legaliz [...] adds 27ad7c20cc1 LivePhysRegs/IfConversion: Change some types from unsigned [...] adds b109c4206af [CodeExtractor] Erase use-without-def debug intrinsics in p [...] adds 2b755762149 [CodeExtractor] Do not extract calls to eh_typeid_for (PR39545) adds d1583a44982 [X86] Add custom promotion of v2i8/v2i16 fp_to_sint to avoi [...] adds 645cd31982f [ThinLTO] Split NotEligibleToImport into legality and inlin [...] adds ffb90c46415 AMDGPU/Docs: Fix the processor table adds 01ba68f9b54 AMDGPU: Add an option -disable-promote-alloca-to-lds adds 0bbaef20df4 Silence deprecation warning for GetVersionEx with clang-cl adds 3d04968f309 [MachineOutliner][NFC] Add findRepeatedSubstrings to Suffix [...] adds e8618741099 [FileCheck] Parse command-line options from FILECHECK_OPTS adds 86faa6e488c [PATCH] [AArch64] Refactor helper functions (NFC) adds d2bfbec96c7 [MachineOutliner][NFC] Remove IsInTree from SuffixTreeNode adds 4e5e34ac8f6 [MachineOutliner][NFC] Remove OccurrenceCount from SuffixTreeNode adds 6b969961cbe [FileCheck] Try to fix windows bots broken by r346272 adds db36e6f4215 [Windows] Simplify WindowsSupport.h adds be9ce13f15d [IR] add optional parameter for copying IR flags to compare [...] adds 0f48414c8c3 [WebAssembly] Update test cases after FixFunctionBitcasts adds f41ebcbed2d RegAllocFast: Rename statistic from NumCopies to NumCoalesced adds a007c003b5a RegAllocFast: Cleanups; NFC adds a2606fd7a76 RegAllocFast: Factor spill/reload creation into their own f [...] adds a1b1c95f700 [cmake] Fix typo. NFC adds 7fe05795840 [WebAssembly] Update more test cases after FixFunctionBitcasts adds 63cd3e5cd36 [llvm-strip] Check "strip" with StringRef::contains instead [...] adds 8fa10fd67fb [XRay] Use TSC delta encoding for custom/typed events adds 2e8ff631d69 [NFC] Add missing test case, some test renaming adds 2c10712291f RegAllocFast: Refactor PhysRegState usage; NFC adds b8a4e3806cc RegAllocFast: Further cleanups; NFC adds b7a96d6f835 RegAllocFast: Leave unassigned virtreg entries in map adds 1f633af49eb Introduce bug life cycle documentation. adds 20a6832a83a [XRay] Use explicit string conversion adds d22ff256908 [MIPS GlobalISel] Set operand order for G_MERGE and G_UNMERGE adds b44657a6b76 [XRay] Clean up more std::copy(...)'s adds fff37cd57e7 [X86][FixupLEA] Avoid checking target features for every si [...] adds bb746321447 [GCOV] Flush counters before to avoid counting the executio [...] adds 238b8867a8e [InstCombine] do not shrink switch conditions to illegal ty [...] adds e9e41a07020 fix typos aggressively; NFC adds a9c6bcdb537 [InstCombine] add FMF to fcmp to show failure to propagate; NFC adds 5cd01d9130d Fix unit tests after patch https://reviews.llvm.org/rL346313 adds 0d2cd950387 [InstCombine] add test for fcmp+fabs; NFC adds b9f324c2611 [InstCombine] add fold for fabs(X) u< 0.0 adds 3125e351406 Add support for llvm.is.constant intrinsic (PR4898) adds 8c397800298 [InstCombine] add tests for more fcmp+fabs preds; NFC adds b3939a8dff7 [InstCombine] add folds for fcmp Pred fabs(X), 0.0 adds 772306b17d2 [InstCombine] add tests for isnan(fabs(X)); NFC adds 3bfaa4d7be4 [InstCombine] peek through fabs() when checking isnan() adds caeba011f77 [llvm-exegesis] Increasing wrapping limit. adds 523f4005eb0 [llvm-exegesis] Correclty handle all X86 memory encoding formats. adds 7a2b35fa201 [InstCombine] propagate FMF for fcmp+fabs folds adds 7c7c0a2cd98 Fix ignorded type qualifier warning [NFC] adds 7fe3470de00 [llvm-exegesis] Remove superfluous move. adds bf862d65439 Workaround PPC backend bug in test for r346322. adds bdee2b6fc17 [NewGVN] Make sure we do not add a user to itself. adds f43a1f459d5 [X86] improve split-stack machine BB placement adds 06a55fc2f45 [LoopSink] Do not sink instructions into non-cold blocks adds fc6b6a704ee [MachineOutliner] Don't store outlined function numberings [...] adds 0bb3a2c11fb [llvm-mt] Accept and ignore notify_update flag adds 1969d2694f7 [llvm-mca] Move the AssembleInput logic into its own class. adds e8113b8c303 [MachineOutliner][NFC] Traverse suffix tree using a Repeate [...] adds 8d33018536a [Support] Fix line width to 80 adds 24b118cefd3 [MachineOutliner][NFC] Remove Parent field from SuffixTreeNode adds 3a7cf3b32fb [SimpleLoopUnswitch] partial unswitch needs to be careful w [...] adds 0cb12ca8f66 Allow subclassing ExternalAA adds ba9a1e1d784 AMDGPU/Docs: Add product names for Vega20 adds 7c67a1fab15 [ARM] Fix CPSR liveness in tMOVCCr_pseudo lowering. adds 75bd5e318c3 AMDGPU/NFC: Split MUBUF_Pseudo_Atomics into RTN/NO_RTN mult [...] adds ed3959a1786 [AArch64] [Windows] Trap after noreturn calls. adds 1b8bc9b6d8d Fix spelling error adds 0bb019fff93 [DWARFv5] Read and dump multiple .debug_info sections. Type [...] adds 0e1b12743fb AMDGPU/NFC: Split FLAT_Global_Atomic_Pseudo into RTN/NO_RTN [...] adds 6747ae50adc AMDGPU/InsertWaitcnts: Remove kill-related logic adds d3698200d1f AMDGPU/InsertWaitcnts: Cleanup some old cruft (NFCI) adds 69f971eb181 Revert "AMDGPU: Divergence-driven selection of scalar buffe [...] adds 9a031b8a93a Add parentheses to silence warning. adds 6b181a92166 [AArch64] [Windows] Address post-commit review comment on r346358. adds ba1ac60e228 Reorder FindPythonInterp so that config-ix can use PYTHON_E [...] adds bcb50253e91 Add 'REQUIRES: default_triple' to test/CodeGen/MIR/X86/zero [...] adds d079edbd8df [PGO] Exit early if all count values are zero adds 8e906179e35 [llvm-readobj] Implement LLVM style printer for --notes adds 33443e8e947 Extend virtual file system with `isLocal` method adds de78771378d [MachineOutliner][NFC] Don't map MBBs that don't contain le [...] adds 5fedd08c092 [MSP430] Add MC layer adds 0db0961141d [AMDGPU] Extend promote alloca vectorization adds fb2083df4e3 [cmake] Set CMP0075 to NEW adds 0157cb57214 [MachineOutliner][NFC] Only map blocks which have adjacent [...] adds ab9a477d3fe NFC: DebugInfo: Track the origin CU rather than just the ba [...] adds 654fe49fb85 [sancov] Put .SCOV* sections into the right comdat groups on COFF adds c1873bf60aa Revert "Reorder FindPythonInterp so that config-ix can use [...] adds 8319d448af6 [WebAssembly] Add V128 to WebAssemblyInstrInfo::copyPhysReg adds 17045f04187 [MergeFuncs] Call removeUsers() prior to unnamed_addr RAUW adds 19a9621221e [MergeFuncs] Improve ordering of equal functions adds 9ac4c44c949 [OCaml] Fix incorrect use of CAMLlocal in nested blocks adds 2c000da033c [bindings/go] Add Go bindings to LLVMGetIndices adds b4ace5f3454 [SCEV][NFC] Verify IR in isLoop[Entry,Backedge]GuardedByCond adds 36fe44dfccc [LSR] Combine unfolded offset into invariant register adds 5f0b3c07f19 [MSP430] Fix encodeInstruction() for big endian hosts adds d5324f4da3e [llvm-exegesis] Add a snippet generator to generate snippet [...] adds b6454d3ba48 Adding Yvan as release test backup for Diana adds 36c468a39f9 Return "[IndVars] Smart hard uses detection" adds c3e506bd699 Revert "[llvm-exegesis] Add a snippet generator to generate [...] adds 88a516ae348 [X86][AVX] Tidyup prefixes and regenerate interleaved tests adds 16cd808d487 [llvm-exegesis][NFC] Add missing header guard + cosmetics. adds 10c750cc3f4 [ARM] Enable spilling of the hGPR register class in Thumb2 adds 1f494dbf92f [X86][SSE] Add PR39387 shuffle test case adds 65448894be1 [LLD] Fix Microsoft precompiled headers cross-compile on Linux adds 00ded67a125 [NFC][BdVer2] Tests for load and store throughput (PR39465) adds af1ff1aef51 [docs] Clarify expectations for stack map sections and AOT [...] adds 6355fcebb37 [SystemZ] Bugfix in shouldCoalesce() adds d1851a2b7af Revert "[MSP430] Add MC layer" adds 0398c778a4a [PowerPC][llvm-exegesis] Add a PowerPC target adds a3a30c008db [dsymutil] Copy the LC_BUILD_VERSION load command into the [...] adds 0cdc04df2e1 [docs] Clarify ELF section naming for StackMaps and fix a typo adds c6216b01cd2 [llvm-mca] Remove unneeded namespace qualifier. NFC. adds b665487bbc7 [llvm-mca] PR39261: Rename FetchStage to EntryStage. adds da31f7b6701 [CodeExtractor] Mark functions noreturn when applicable adds 188cca3dd57 InstCombine: Avoid introducing poison values when lowering [...] adds c335b4be870 Add test case for the regression caused by r344696 adds 09aba6bcf00 [llvm-mca] Partially revert r346417. adds 2b6079de734 [NFC][BdVer2] Load and store throughput tests: also check s [...] adds 9d83280b4a2 [x86] add RUNs for AVX1; NFC adds 93c86849bde [NativePDB] Higher fidelity reconstruction of AST from Debug Info. adds e2baccfd07f [DAGCombine] Improve alias analysis for chain of independen [...] adds 7b9cddc7bc4 [x86] use shuffles for scalar insertion into high elements [...] adds 495ee792d0c [X86] Regenerate loaduse test adds 32530669f1b [LTO] Drop non-prevailing definitions only if linkage is no [...] adds 46ec29de7d1 [SelectionDAG] Assert on the width of DemandedElts argument [...] adds 2cfa2297dbf [LoopInterchange] Support reductions across inner and outer loop. adds a9be23987d1 [ARM64] [Windows] Improve error reporting for unsupported S [...] adds 50157fcabb8 [WebAssembly] Fix LowerEmscriptenEHSjLj when there's only longjmp adds e4820603106 [docs] Add some subsections to make it possible to find por [...] adds bdb320aee74 [docs][statepoints] add a section spelling out simplificati [...] adds 0429e0bda4e [docs][statepoint] Document explicitly provided stack slots adds 8c1c568cf5f [llvm-rc] Support absolute filenames in manifests adds 053ebae379c [VFS] Add "expand tilde" argument to getRealPath. adds 409a3504e11 [not] Improve error reporting consistency. adds b1c6e08d954 [WebAssembly] Lower select for vectors adds 13799520884 [WebAssembly] Renumber and LEB128-encode SIMD opcodes adds c5627147d1a [WebAssembly][NFC] Reorder SIMD section adds 1a899420ae4 [WebAssembly] Read prefixed opcodes as ULEB128s adds c36c93b184d [COFF, ARM64] Add support for MSVC buffer security check adds b9dd8a3b404 [llvm-rc] Support joined or separate spelling for /fo flag adds 244a2cf3abf [NFC] Add utility function for SafetyInfo updates for moveBefore adds 5de005fa933 [XRay] Improve FDR trace handling and error messaging adds 0a1353a3c8c [ARM] Small reorganisation in ARMParallelDSP adds 8e070ff5958 [ARM] Enable mixed types in ARM CGP adds 8381d3e3032 [DebugInfo][Dexter] Unreachable line stepped onto after Sim [...] adds e6d7df955dd [X86] Fix VZEROUPPER scheduling info on SNB,HSW,BDW,SXL,SKX. adds 04e9fcb5125 [CallSiteSplitting] Only record conditions up to the IDom(c [...] adds 5e1b99cf3b5 [SelectionDAG] swap select_cc operands to enable folding adds 33b71d22574 [IPSCCP,PM] Preserve DT in the new pass manager. adds 25761c3f2ce [llvm-mca] Use a small vector for instructions in the EntryStage. adds b4abfc2b263 [llvm-exegesis][NFC] Add a way to declare the default count [...] adds ab7a1752bd2 [X86] Add Subtarget to more lowerVectorShuffle functions. NFCI. adds d81571aae0e Revert r346483: [CallSiteSplitting] Only record conditions [...] adds 68b4c69fd4a [llvm-exegesis] Fix unit tests on PowerPC/AArch64. adds 3927975de97 [Hexagon] Handle Hexagon's SHF_HEX_GPREL section flag adds eff069b6c81 [MIPS GlobalISel] narrowScalar G_CONSTANT adds f9eeeb27cc2 [RISCV] Update test/CodeGen/RISCV/calling-conv.ll after rL346432 adds a0f2a5f4a58 [RISCV] Avoid unnecessary XOR for seteq/setne 0 adds 7dd8750708e [x86] try to form broadcast before widening shuffle elements adds 72e06ac443f [ARM] Don't promote i1 types in ARM CGP adds 1949578de3a Revert "[VFS] Add "expand tilde" argument to getRealPath." adds d3f62312022 AMDGPU: Add testcase to demonstrate a condition with pre-ex [...] adds 66e6766eea4 [SystemZ] Avoid inserting same value after replication adds fcdc267f220 [llvm-cov] Add lcov tracefile export format. adds fd0b2c484ae Revert "[DEBUGINFO, NVPTX]DO not emit ',debug' option if no [...] adds 9887d2b015d [docs][statepoint] tweak a title adds 3ccdf221e97 [CostModel] Add SK_ExtractSubvector handling to getInstruct [...] adds 7bade9c965f [Power9] Allow gpr callee saved spills in prologue to vecto [...] adds 55d210a76b0 [docs][statepoint] Expand a bit on problems with mixing ref [...] adds 8af59ae9700 [llvm-cov] Remove "default:" label in the switch covering a [...] adds b9e113385ee Fix -Wsign-compare warning adds d32f7814bc9 [docs][statepoints] Reformulate open issues list adds bbe5fdb08d2 Type safe version of MachinePassRegistry adds dab756ad3ec [Hexagon] Place globals with explicit .sdata section in small data adds 8153acf695e [AMDGPU] Always pass TRI into findRegister[Use/Def]OperandIdx adds 10702260719 [llvm-strings] Fix whitespaces to match strings output. adds 6b4d662418d [DAGCombiner][X86][Mips] Enable combineShuffleOfScalars to [...] adds 6517c35cb71 Add total function byte size and inline function byte size [...] adds c5c6cf3239d [Hexagon] Implement noreturn optimization adds 8d5b2ca4775 [AMDGPU] Cleanup optimize-if-exec-masking.mir test. NFC. adds ec09d9119e4 [TTI] Flip vector types in getShuffleCost SK_ExtractSubvector call adds 33e86fa85e5 [WebAssembly] Hotfix of WebAssemblyInstructionTableSize aft [...] adds f8c45edd42d [Hexagon] Fix unused variable warning in release builds adds 5d3d354eee7 [CostModel][X86] SK_ExtractSubvector is free if the subvect [...] adds 9ce4cce9319 [X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bi [...] adds 80691e1b437 [DWARFv5] Emit normal type units in .debug_info comdats. adds 4d8909c55dd [SystemZ] Add a couple of missing tests adds 5ac7dfd5c96 [Hexagon] Fix some -Wunused-function with LLVM_DUMP_METHOD [...] adds 86c04a03323 [MS demangler] Use a slightly shorter unmangling for mangle [...] adds d09d3d9eec1 [llvm-mca] Account for buffered resources when analyzing "S [...] adds 0ea548887e9 [AArch64] Support HiSilicon's TSV110 processor adds 3593f97ffbb Branch/tag all projects with a single commit in release-tag [...] adds 52d7ce62d6f [X86] Move the promotion of v16i16->v16i8 for avx512f but n [...] adds e0105bee1ff [WebAssembly] Disable custom NaN payload tests adds 08852025202 Revert "Exclude wasm target from Windows packaging due to PR39448" adds bd0f067b123 [JumpThreading] Fix exponential time algorithm computing kn [...] adds 35ef1bd84b8 [ARM] Add MemOperand to LDRcp to enable DCE. adds a64afff8f49 [SelectionDAG] Fix a -Wparentheses warning from gcc in an a [...] adds 9d4ebca2829 [AVR] Reorder the CHECK lines in directmem.ll to match curr [...] adds 25938772e8c [ARM64] [Windows] Handle funclets adds b92d1fef8df [GC] Simplify linking of GC builtin GC strategies adds e0f010c2e24 [WebAssembly] Update bleeding-edge cpu features adds bc177f5fc7d [X86] In LowerHorizontalByteSum, emit vector_shuffle nodes [...] adds 02fce9c9ac2 test/CodeGen/X86: Relax test case adds 3816d009719 RegAllocFast: Further cleanups; NFC adds 8614602e2f1 Fix DragonFlyBSD build adds 6c3e6aa5423 [X86] Add a test case to show scalarized vector srem to dem [...] adds 01568d51f08 [X86] Use a MOVSX instruction instead of a MOVZX instructio [...] adds 10c84a8f35c [ThinLTO] Internalize readonly globals adds 6557f4a16fa [NFC][MCA][BdVer2] Add bdver2 runline into register-file-st [...] adds 94d44f11615 [X86][BdVer2] Fix loads/stores throughput for Piledriver (PR39465) adds 2f9bd23c20e [GC] Rename a header for consistency adds acd225a6557 [CostModel][X86] SK_ExtractSubvector costs must only be tes [...] adds 4ad252ba0c1 [X86] Remove apparently unneeded code from combineVSZext. adds 6f0ce7928ec [X86] Remove unused variable adds 7ef18df3098 Fix DragonFlyBSD linkage issue. adds 5db501a9db8 [InstCombine] auto-generate full checks; NFC adds f7b5c13b036 [x86] allow vector load narrowing with multi-use values adds 7c38906deac [InstCombine] simplify code for merging stores; NFCI adds d30e1011b80 [DAGCombiner] Make tryToFoldExtendOfConstant return an SDVa [...] adds bb2ce32a5bd [llvm-cxxdump] Use error reporting helpers from support adds 3283290275d [X86] Replace calls to getOnesVector/getZeroVector with get [...] adds 686dfe3676e [Support] Make error banner optional in logAllUnhandledErrors adds abb65ffd379 [X86] Use DAG.getConstant instead of getZeroVector. adds ac4b70f7461 Make initializeOutputStream() return false on error and tru [...] adds 89fcd8b8789 [x86] auto-generate complete checks; NFC adds 11c0888e5db [llvm-objdump] Add symbol 'O' for object data adds 1854e96396e [llvm][test] Update tests using objdump adds b87342a8243 [DWARF] Change pubnames to use DWARFSection instead of StringRef adds 1cfec9f5d34 [MC] Fix 3 objdump tests after rL346610 adds d3caae0ce26 [IPSCCP,PM] Preserve PDT in the new pass manager. adds 7ae3f03e925 [IPSCCP,PM] Add missing #include in rL346618 adds e6258d74c4c [IPSCCP] Use forward declaration. adds 4708fedcc26 [GCRoot] Remove some unneccessary complexity adds d96e13f9ef7 [llvm-undname] Use WithColor for error reporting adds 8e8485eda37 [llvm-objdump] Use WithColor for error reporting adds 21b58634f06 [llvm-nm] Use WithColor for error reporting adds a04e7e369dc [IPSCCP] Delete two forward declarations adds 78a558a8b02 [GC] Minor style modernization adds 0165418d9a8 [GC] Remove unused configuration variable adds 00ddaab58d1 [llvm-objdump] add more constraints for tests adds 79d60f6e81e [SystemZ] Replicate the load with most uses in buildVector() adds b7ec431cedb [GCOV] Add options to filter files which must be instrumented. adds 8e59cd19150 [LICM] Hoist guards from non-header blocks adds 0c20a4d744a Add an OptimizerLast EP adds d3733c222cb [newpm] Fix r346645: Missing consume of the Error return by [...] adds 736b8af9cf2 [llvm-mca] Correctly update the resource strategy for proce [...] adds c5dba22c1db [DAGCombiner] Fix load-store forwarding of indexed loads. adds c90bfa87155 [RISCV] Support .option relax and .option norelax adds 789879d5be5 [CostModel] Add more realistic SK_ExtractSubvector generic costs. adds bc960f6c3e8 Fix unused variable warning. NFCI. adds af76058428e [LoopVectorize] add tests for funnel shifts; NFC adds 7b8a79a2888 [VectorUtils] reorder list of vectorizable intrinsics; NFC adds aeeabb506ae [VectorUtils] add funnel-shifts to the list of vectorizable [...] adds bb61c724052 [CostModel] Add more realistic SK_InsertSubvector generic costs. adds e988bd61e82 [SystemZ::TTI] Improve accuracy of costs for vector fp <-> [...] adds e06d0750e88 [CostModel][X86] SK_ExtractSubvector is cheap if the (legal [...] adds 91a58f1c87a [CostModel][X86] Add some initial cost tests for funnel shifts adds 9dffc887f10 [DWARFv5] Emit split type units in .debug_info.dwo. adds d2e49438080 [MachineOutliner][NFC] Put suffix tree in buildCandidateList adds 412b368b3b1 [MachineOutliner][NFC] Early exit pruning when candidates d [...] adds cd74b071753 [CostModel][X86] Add SHLD/SHRD scalar funnel shift costs adds 6856bcc93ce [llvm-readelf] Make llvm-readelf more compatible with GNU readelf. adds 1c82b7de9d2 Fix MachineInstr::findRegisterUseOperandIdx subreg checks adds 1e9956297d6 [CostModel][X86] Add funnel shift rotation special case costs adds 7ffaeb40300 [InstCombine] regenerate checks; NFC adds 129e4968915 [AMDGPU] Optimize S_CBRANCH_VCC[N]Z -> S_CBRANCH_EXEC[N]Z adds 15dabb4fb1d NFC: DebugInfo: Reduce scope of DebugOffset to simplify code adds 32b991b89c0 [X86] In LowerMULH, use generic truncate and vector shuffle [...] adds f57ca0bbd52 [GC][InstCombine] Fix a potential iteration issue adds c9db589887b [WebAssembly] Added WasmAsmParser. adds b884de47c53 [GC] Remove so called PreCall safepoints adds cede8129405 [GC docs] Update the gcroot documentation to reflect recent [...] adds 3787b838e1a [InstCombine] add more tests for rotate narrowing; NFC adds ac159b573df AMDGPU: Adding more median3 patterns adds 225b2c8a329 [X86][SSE] Add lowerVectorShuffleAsByteRotateAndPermute (PR39387) adds 40bb371aafa Use a data structure better suited for large sets in Simpli [...] adds a192b9de2bc [InstCombine] refactor code for matching shift amount of a [...] adds 46063055654 [GC][NFC] Simplify code now that we only have one safepoint kind adds 772bdfc7825 [InstCombine] narrow width of rotate patterns, part 2 (PR39624) adds 56217334622 [DWARF] Do not use PRIx32 for printing uint64_t values adds 2b46d375af6 [InstCombine] narrow width of rotate patterns, part 3 adds 3201558074a [llvm-objcopy] Don't copy Config when processing --keep adds 2cfb7f331dd [MachineOutliner][NFC] Change getMachineOutlinerMBBFlags to [...] adds 613246a2a35 [InstCombine] add rotate variants that include select; NFC adds 4ab75faa097 Introduce DebugCounter into ConstProp pass adds 9fa421d99e9 [MachineOutliner][NFC] Simplify isMBBSafeToOutlineFrom chec [...] adds 162ad1bb2ac [FileCheck] introduce CHECK-COUNT-<num> repetition directive adds 7b60928bd7d [FileCheck] fixing typo in assert adds 84d18ae14ed [libObject] Fix getDesc for Elf_Note_Impl adds 7230fe433c3 [FileCheck] fixing small formatting error in docs adds 94419b4f027 [BuildingAJIT] Update chapter 2 to use the ORCv2 APIs. adds 30b44ffb4c1 [BuildingAJIT] Clang-format chapters 1 and 2. adds d75b9818ec0 [DAGCombiner] Enable tryToFoldExtendOfConstant to run after [...] adds f2fbd3c0ba4 [commit test] Add blank line to test/tools/llvm-objdump/ful [...] adds f2e7b94e103 [BuildingAJIT] Fixing the build by inserting a forgotten paren. adds 9bfa082a976 [FileCheck] fixing docs buildbot - use proper code-block type adds 01a109e15c6 [X86] Add more tests for -x86-experimental-vector-widening- [...] adds 4cc00e863e2 [SystemZ] Increase the number of VLREPs adds 71ee93d743c Fix modules build of AVRAsmParser.cpp adds c55ae3f8a64 Fix .cfi_restore with register numbers > 64 adds 1ee147eb6cf Add bracket that was lost in rL346727 and has been causing [...] adds 25a367f49cf Fix comment for XOP rotates. NFCI. adds 9483553e734 [CostModel][X86] Add more cost tests for funnel shifts adds 20a1e3c6aca [TTI] Make TargetTransformInfo::getOperandInfo static. NFCI. adds 8f37d00cdf8 [VPlan] VPlan version of InterleavedAccessInfo. adds 9693395787b [VectorUtils] Use namespace for InterleaveGroup template sp [...] adds d2cb662b760 [CostModel][X86] Fix constant vector XOP rights shifts adds b81719bd8a6 Fix uninitialized variable. adds ebca36b2d05 [InstCombine] add tests for funnel shift demanded bits; NFC adds e0fbc0969cf Revert "[ThinLTO] Internalize readonly globals" adds f3b83e41957 [CSP, Cloning] Update DuplicateInstructionsInSplitBetween t [...] adds 3eec80d6b73 [WebAssembly] Mark immediates.ll as XFAILed on MIPS hosts adds ca8cb6852b5 [IR] Add a dedicated FNeg IR Instruction adds 9d764382760 [FileSystem] Add expand_tilde function adds 7d412f9e754 [WebAssembly] Fix broken assumption that all bitcasts are t [...] adds 65bac069a6a [llvm-objcopy] Rename --keep to --keep-section. adds bb33ccfdef8 [SelectionDAG][X86] Relax restriction on the width of an in [...] adds 7ff33d4e626 Add fneg instruction to syntax highlighting lists adds 3546f90aac2 [NativePDB] Improved support for nested type reconstruction. adds ecc582a8ce4 DebugInfo: Add a CU metadata attribute for use of DWARF ran [...] adds 57f3c629372 [AsmPrinter] Rename a comment of .debug_gnu_pubnames entry adds 65bbccae60d [MS Demangler] Print public:, protected:, private: if set i [...] adds c0ca57801c5 Fixed DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT i1 handling adds f0c80e84155 [AsmPrinter] Fix DebugInfo/X86/gnu-public-names.ll after rL346790 adds 39400df2071 [MemorySSA] Create query after checking if instruction is a fence. adds e9eedd7fa6f [AMDGPU] combine extractelement into several selects adds 14f489a3e77 [MachineOutliner][NFC] Exit getOutliningType if there are < [...] adds 3334995891e [InstCombine] canonicalize rotate patterns with cmp/select adds cdd4dd393b7 [MachineOutliner][NFC] Use MBB flags to avoid call checks i [...] adds 23caf62a8d5 Preserve loop metadata when splitting exit blocks adds 108bc88c84d Make the ExpandTilde unit test expect "" (not "/") on Win32 adds 48b20392ac8 [InstCombine] fold funnel shift amount based on demanded bits adds 0ee0dff7891 Make dsymutil more robust when parsing load commands. adds 352d784f610 [MachineOutliner][NFC] Use flags set in all candidates to c [...] adds 7a45551030c [CodeGen] Fix forward scan in MachineBasicBlock::computeReg [...] adds 7215ab82d4c Revert r346810 "Preserve loop metadata when splitting exit blocks" adds 382877c17c0 [PowerPC] Enhance the selection(ISD::VSELECT) of vector type adds 8bcdd04bcef [WebAssembly] Add support for the event section adds c10e56bd968 Correctly instantiate `iterator_adaptor_base` when defining [...] adds 59f062a29e2 [X86] Add -x86-experimental-vector-widening command lines t [...] adds 9e02b19aa8b [WebAssembly] Temporarily disable event-section.ll adds e002ed060f1 Recommit r346483: [CallSiteSplitting] Only record condition [...] adds 71e195852de Print newline after banner for ModulePass adds 33a637762fd [WebAssembly] Make sure event-section XFAILs for build options adds a1b68b3e9ff [X86][AVX512] Remove constant pool shuffle decoding from Se [...] adds 6a5c77e70a3 [llvm-objdump] Improve ELF file type checking statements (D54509) adds 1959ce6f3e0 [CostModel] Add generic expansion funnel shift cost support adds 5d6a2d85c2c [VPlan, SLP] Add simple SLP analysis on top of VPlan. adds 6fd1a5c8b13 [VPlan] Update ifdef. adds 79786cba74d [TTI] Pull out repeated 'ConcreteTTI' static_casts. NFCI. adds 7758b14091a [VPlan] Remove LLVM_DEBUG from VPlanSlp::dumpBundle. adds d2261415d68 Document how to comment an actual parameter. adds 48de5cc3734 [TTI] getOperandInfo - a broadcast shuffle means the result [...] adds c4b9d6f3ef6 [SimplifyCFG] Regenerate preserve-branchweights.ll test. NFC adds 49f1bbd75c3 [VPlan, SLP] Use SmallPtrSet for Candidates. adds 5e3c9a56cb0 [InstCombine] fix formatting for matchBSwap(); NFC adds c435d5f2634 [InstCombine] Remove a couple of asserts based on incorrect [...] adds 0bca5fd90ee [X86] Allow pmulh to be formed from narrow vXi16 vectors un [...] adds 45c215a28e7 [WebAssembly] Add support for dylink section in object format adds c79bd8af979 [InstSimplify] add tests for funnel shift with select; NFC adds ada45e1a6f3 [ThinLTO] Update handling of vararg functions to match inliner adds b78df5ef8e9 [Support] Teach YAMLIO about polymorphic types adds 3d60ff7fa8c Mark @llvm.trap cold adds 517246b2b5e AMDGPU: Additional pattern for i16 median3 matching adds 455149b89ff [X86] Update masked load/store test names adds 6ae32658d33 [X86] Split masked load/store test files adds 876e741220c [ThinLTO] Fix a crash in lazy loading of Metadata adds c8c80b0f2f4 Bias physical register immediate assignments adds bd33f31445e [X86][SSE] Add SSE2/SSE42 masked load/store tests adds b2ec19cf819 Remove unused getMDNodeFwdRefOrNull interfaces (NFC) adds 522fd7bbaaf [MachineOutliner][NFC] Don't compute liveness if X16/X17/NZ [...] adds 530c44f27c2 [InstSimplify] add more tests for funnel shift with select; NFC adds 7c06350842d [X86] Update masked expandload/compressstore test names adds 336a872ea74 [X86] Support v2i32/v4i16/v8i8 load/store using f64 on 32-b [...] adds 66a6a4f7f98 [X86] Remove unused variable adds 307485263c5 [MachineOutliner][NFC] Check if CandidatesForRepeatedSeq < 2 adds aa87382d917 [X86] Don't mark SEXTLOADS with narrow types as Custom with [...] adds d0eb792425a AMDGPU: Enable code object v3 for AMDHSA only adds 312347e8a05 [commit-test] Add blank line for test/tools/llvm-objdump/sy [...] adds bcd08d02d12 AMDGPU: Fix check lines in fdot2 test: adds 12648b2a06e [WebAssembly] Renumber SIMD bitwise instructions adds 301a636e639 [X86] Add -x86-experimental-vector-widening-legalization ve [...] adds 02d063949d2 [X86] Add some custom type legalization rules for truncate [...] adds 19fcc06d24e [RISCV] Introduce the RISCVMatInt::generateInstSeq helper adds 84a656e8137 [llvm-objdump] Use `auto` declaration in typecasting adds 695940b0f10 [MSP430] Add MC layer adds 5ba6366a246 Add missed files from prev. commit adds d566da724ad [RISCV] Mark FREM as Expand adds 643206597fa [RISCV] Mark C.EBREAK instruction as having side effects adds fc0780a8a94 [InstSimplify] delete shift-of-zero guard ops around funnel shifts adds a1316f9816a [X86] Fix MCNullStreamer support for modules with a CodeView flag adds cad3b0c3e88 [SLPVectorizer][X86] Regenerate reduction tests and add PR3 [...] adds 81aa3c01a52 [SLPVectorizer][X86] Regenerate reduction minmax tests and [...] adds a773fb82fa1 [InstCombine] add rotate narrowing tests with odd types; NFC adds 25da5df08cf [InstCombine] fix rotate narrowing bug for non-pow-2 types adds 49953bea652 [TTI] Reduction costs only need to include a single extract [...] adds eb1caa79c6e [LTO] Load sample profile in LTO link step. adds 0e881a8760d [X86] Guess that a CPU is Icelake it if reports support for [...] adds 2806865ca5b [InstCombine] add tests for funnel shift (rotate) canonical [...] adds 706911adb88 [BinaryFormat] Add MsgPackTypes adds 93df51df318 [WebAssembly] Fix return type of nextByte adds 62e86867708 [X86] Add -x86-experimental-vector-widening support to redu [...] adds 6a9a4b4e8f8 [InstCombine] adjust rotate direction in tests; NFC adds 7735d5aef04 [X86] Minor cleanup to getExtendInVec. NFCI adds 50606d73059 [ADT] Drop llvm::Optional clang-specific optmization for tr [...] adds 8d8d1a54872 Revert "[ADT] Drop llvm::Optional clang-specific optmizatio [...] adds dff71eafb8b [AMDGPU] Update code object metadata format documentation adds 5e55bb95bb8 [X86] Remove ANY_EXTEND special case from canReduceVMulWidth adds 92d120add28 AMDHSA: More code object v3 fixes: adds a34df4d832f [AMDGPU] NFC Test commit adds 204bd90e5d3 [WebAssembly] Split BBs after throw instructions adds 83343ed6a1b Re-apply r346985: [ADT] Drop llvm::Optional clang-specific [...] adds 6eae3d18ede [CUDA] updated CompileCudaWithLLVM.rst adds 322a8075ef7 [AMDGPU] Add FixupVectorISel pass, currently Supports SREGs [...] adds f8ecfaae822 [VFS] Implement `RedirectingFileSystem::getRealPath`. adds 9193df0c9dc [X86] Update a couple comments to remove a mention of a sig [...] adds 46c010779c2 [X86] Use ANY_EXTEND instead of SIGN_EXTEND in the AVX2 and [...] adds eb5dfd04cd0 Added missing whitespace in the link. adds 78791b78c8d [X86] Add some test cases for vector multiplies on vectors [...] adds c5045baa1d6 Revert r347014 "[X86] Add some test cases for vector multip [...] adds 1f89469f300 [VFS] Update unittest to fix Windows buildbot. adds cf658d54472 [NativePDB] Rewrite the PdbSymUid to use our own custom nam [...] adds 012d9c2feb7 [CMake] Support cross-compiling with multi-stage builds adds a7df14b63e3 AMDGPU: Fix analyzeBranch failing with pseudoterminators adds e4f36d3061f [X86] Add some test cases for vector multiplies on vectors [...] adds 1f5686ff1b1 [X86] Add custom type legalization for v2i8/v4i8/v8i8 mul u [...] adds a3f1de91210 [ThinLTO] Internalize readonly globals adds 0b1bffae5c3 [LegalizeVectorTypes] Teach WidenVecRes_Convert to turn ANY [...] adds 5f524f5f651 [DAGCombine] Fix non-deterministic debug output adds eaa37fad996 [MSP430] Add more tests for ABI and calling convention adds c39dead0bd3 [MSP430] Add support for .refsym directive adds 6239437d9c8 [RISCV] Constant materialisation for RV64I adds 5195dde128c [RISCV][NFC] Define and use the new CA instruction format adds 0478924a372 [TargetLowering] Cleanup more of the EXTEND demanded bits c [...] adds 6bb11c1cb56 [X86] X86DAGToDAGISel::matchBitExtract(): extract 'lshr' from `X` adds 71cb7616e93 [DWARF] Use PRIx64 instead of 'x' to format 64-bit values adds afce11451e6 [IRVerifier] Allow StructRet in statepoint adds eb8b0e69251 [x86] regenerate complete checks for test; NFC adds bb8ce140dfe [X86][SSE] Move number of input limit out of resolveTargetS [...] adds 9d51722c9d1 [InstSimplify] add test to demonstrate undef matching diffe [...] adds 7c5ab080648 [InstSimplify] add tests for saturating add/sub; NFC adds 44e4b2cd983 [CodeGen] Expose some data types and accessors from StackMaps adds 306853057b4 GlobalDCE: Teach isEmptyFunction() to ignore debug intrinsics. adds 44ca8d2a27d [X86] Add codegen tests for scalar funnel shifts adds 104c57bab84 [SelectionDAG] Move (repeated) SDTIntShiftDOp double shift [...] adds 8865b2626a2 [CMake] Accept ENTITLEMENTS in add_llvm_executable and llvm [...] adds ec01f47d197 [PowerPC] Make no-PIC default to match GCC - LLVM adds f8ab7b5bec2 [codeview] Expose -gcodeview-ghash for global type hashing adds 64ce4853163 [WebAssembly] Default to static reloc model adds e526795ca95 [MSP430] Use R_MSP430_16_BYTE type for FK_Data_2 fixup adds d4792cb0499 Revert "[PowerPC] Make no-PIC default to match GCC - LLVM" adds 4ae1f96647f [X86] Disable Condbr_merge pass adds 93e2a63489f [MSP430] Add RTLIB::[SRL/SRA/SHL]_I32 lowering to EABI lib calls adds f265ec50fb1 [FNeg] Add FNeg Instruction to LangRef document adds 87b8537d3eb AArch64: Emit a call frame instruction for the shadow call [...] adds 23d2738abf1 [PowerPC][NFC] Add tests for vector fp <-> int conversions adds ba09a5c6c18 Preprocessing support in tablegen. adds ea655f4c15d [X86] In LowerLoad, fix assert messages and rename a variab [...] adds ba09a3b544a [LegalizeVectorOps] After custom legalizing an extending lo [...] adds 2a119cc3939 [X86] Remove a branch on SSE4.1 from LowerLoad adds 2e1b1fa490d [SimpleLoopUnswitch] adding cost multiplier to cap exponent [...] adds 96b11ea451e [WebAssembly] Cleanup unused declares in test code. NFC. adds dcb8d9c0ac1 [X86] Qualify part of the masked gather handling in Replace [...] adds 54652757e6a Speed up git-llvm script by only svn up'ing affected directories. adds a410ae40da4 [X86] Add custom promotion of narrow fp_to_uint/fp_to_sint [...] adds fbe3eeb333e DAG combiner: fold (select, C, X, undef) -> X adds def9e27527d Fixed test after r347110 adds 83bf61b57a8 Make git-llvm python3 compatible again. Hopefully. :) adds 1bfe6192d37 Moved dag-combine-select-undef.ll into amdgpu. NFC. adds d2f818dc6a5 [llvm-objcopy] Use llvm::all_of and rename the variables "S [...] adds 53a62241d30 Use llvm::copy. NFC adds a975da2543e [X86] Use getUnpackl/getUnpackh instead of hardcoding a shu [...] adds bbceba67213 Add initial scaffolding for the GN build. adds cec2d66af87 Reverted r347092 due to the following build fails: http://l [...] adds 6c97961ecaf [X86] Add test cases to show incorrect use of a 512 bit vec [...] adds b8eb94bb7b8 [X86] Don't extend v32i8 multiplies to v32i16 with avx512bw [...] adds 3a054fa1b7b llvm-symbolizer: Avoid calling getFromOffset when the index [...] adds 4376a2764b7 [llvm-objdump] Print a blank row at the end of sections adds 67c1891b1ef [X86][SSE] Add shuffle demanded elts test case for PR39549 adds 52809cd32cb Move BuryPointer from Clang to LLVM for use in other LLVM tools adds 6b84517d31e [X86] Add test case to show missed opportunity to use PACKU [...] adds 1f41a166b73 [X86] Add support for matching PACKUSWB from a v64i8 shuffle. adds f5dffd96859 [ThinLTO] Add some stats for read only variable internalization adds 1d1424ad36b Fix bot failure from r347145 adds b9e2253935f [CorrelatedValuePropagation] Preserve debug locations (PR38178) adds 7175874d889 tighten up a couple of assertions. hitting the BitPosition [...] adds d142eabae91 [X86] Don't use a pmaddwd for vXi32 multiply if the inputs [...] adds f83899ab5d7 [X86] Rename WidenMaskArithmetic->PromoteMaskArithmetic sin [...] adds 59913e3c649 [X86] Add -x86-experimental-vector-widening-legalization ch [...] adds b10cbf0e7d8 [WebAssembly] Add equality comparison operators for WasmEventType adds 6c7679509f7 [WebAssembly] Add null streamer support adds 8f782492197 Swap order of discovering of -ltinfo and -lterminfo adds 36cdca7eefc [X86][SSE] Use raw shuffle mask decode in SimplifyDemandedV [...] adds ad3e7b994af [X86][SSE] Add some generic masked gather codegen tests adds 3bc0631b625 [SelectionDAG] simplify code; NFC adds acf9a911078 [x86] make tests immune to improvements in undef handling adds 01f732bf651 [X86][SSE] Relax IsSplatValue - remove the 'variable shift' [...] adds cebaa361370 [ARM] make test immune to improvements in undef simplification adds 4509b33db3d [Hexagon] make tests immune to improvements in undef simpli [...] adds 8f61bb69410 [SystemZ] make test immune to improvements in undef simplification adds 8f826ea0054 [x86] regenerate full checks; NFC adds efba0c1a4fe [X86][SSE] Split IsSplatValue into GetSplatValue and IsSplatVector adds fc1a748d9ae Remove unused variable. NFCI. adds 428d0fbb171 [DAG] add undef simplifications for select nodes adds 112d1942e0a [X86] Lower v16i16->v8i16 truncate using an 'and' with 255, [...] adds 349adaa64ac [X86] Disable combineToExtendVectorInReg under -x86-experim [...] adds b67d2d3f47f [X86][SSE] Add SimplifyDemandedVectorElts support for SSE s [...] adds ae46d9c965a [X86] Add a 32-bit command line with only sse2 to vector-se [...] adds 70a77194a6a [X86] Add custom type legalization for extending v4i8/v4i16 [...] adds e7cd57cafc4 [X86][SSE] Add SimplifyDemandedVectorElts support for SSE p [...] adds ba83e3ae007 [X86] Remove most of the SEXTLOAD Custom setOperationAction [...] adds 7eb79182a99 [X86] Use compare with 0 to fill an element with sign bits [...] adds 85aede46d55 [ProfileSummary] Standardize methods and fix comment adds 508052c1d6b [LoopSimplifyCFG] Teach LoopSimplifyCFG to constant-fold br [...] adds 58d7c1614b7 [LoopSimplifyCFG] Add requires: asserts after rL347183 adds e13fe9d3708 [X86] Use a pcmpgt with 0 instead of psrad 31, to fill elem [...] adds 65df4cd3bda Fix disturbing warning - NFCI adds ceb39000f30 [MSP430] Optimize srl/sra in case of A >> (8 + N) adds ae7ddf0c359 [LICM] Make LICM able to hoist phis adds 14127217330 [ARM] Remove trunc sinks in ARM CGP adds 06e2a9cc775 AMDGPU/InsertWaitcnts: Some more const-correctness adds bb9522438da Test commit - delete a trailing space. adds 4f0f4ba8d3a [X86] Add codegen tests for slow-shld scalar funnel shifts adds fc290a51f4d [llvm-exegesis] InstructionBenchmarkClustering::dbScan(): u [...] adds e43de0ffbec [llvm-exegesis] Analysis::writeSnippet(): be smarter about [...] adds cd8cc0c7434 [llvm-exegesis] Analysis: writeMeasurementValue(): don't al [...] adds 09997123d8d [llvm-exegesis] InstructionBenchmarkClustering::rangeQuery( [...] adds 672361eebcf [llvm-exegesis] InstructionBenchmarkClustering::dbScan(): r [...] adds f1a49f47c3e [llvm-exegesis] InstructionBenchmarkClustering::rangeQuery( [...] adds 92b218a7866 [llvm-exegesis] Move InstructionBenchmarkClustering::isNeig [...] adds c21e1cb2265 [llvm-exegesis] (+final perf overview) InstructionBenchmark [...] adds 40cd741960e [SelectionDAG] fix formatting; NFC adds e6d82b3e055 [ThinLTO] Fix comment. NFC adds 5e067bb37cc Subject: [PATCH] [CodeGen] Add pass to combine interleaved loads. adds e98aa2ca912 [llvm-exegesis][NFC] More tests for ExegesisTarget::fillMem [...] adds 810477cac97 [SelectionDAG] add simplifySelect() to reduce code duplicat [...] adds 8e84d17ce56 [x86] add test for select FP with undef condition; NFC adds 23ff23942df [SelectionDAG] simplify select FP with undef condition adds b7c75ac0aa1 [LoopPass] fixing 'Modification' messages in -debug-pass=Ex [...] adds 824fe505a46 Fix some issues with LLDB's lit configuration files. adds 1757ba9db93 [x86] add/make tests immune to improvements in undef simpli [...] adds 06873b7540a [Hexagon] make test immune to improvements in undef simplification adds 0048f91a871 [LV] Avoid vectorizing unsafe dependencies in uniform address adds e168f55bd10 [AMDGPU] Derive GCNSubtarget from MF to get overridden targ [...] adds e0270602c3d Revert "[LICM] Make LICM able to hoist phis" adds a0ef91d751b [InterleavedLoadCombine] Remove unused include. NFC. adds 5ba155acf6b [SelectionDAG] simplify vector select with undef operand(s) adds 934cbe28f31 [WebAssembly] replaced .param/.result by .functype adds 3d5599fc659 [InterleavedLoadCombine] Fix warning unused variable adds 3a00f497ebe [llvm-nm] Fix use-after-free for MachOUniversalBinaries adds 4402e81711b [AMDGPU] Convert insert_vector_elt into set of selects adds 89a80b67915 [AMDGPU] Fix -Wunused-variable adds 7ca11331eb8 [ARM] Attempt to fix arm selfhost bots after rL347191 adds eaa73537bb4 [DebugInfo] DISubprogram flags get their own flags word. NF [...] adds d11406b457b [X86] Attempt to improve v32i8/v64i8 multiply lowering by a [...] adds 418c4bb2960 [InterleavedLoadCombine] Fix warnings adds 38dbdfcd7ee [X86][SSE] Remove unnecessary bit-and in pshufb vector ctlz [...] adds 0bb18d46a28 Fix Wdocumentation warning. NFCI. adds 44410edda12 Fix build break from r347239 adds 8d50a770be2 Add missing closing bracket. adds a6a645f5e20 [X86][CostModel] Don't lookup intrinsic cost tables if the [...] adds 7e9b96e2e8d Add missing stream operator for Polynomial class to fix deb [...] adds e15ee73c107 [IR] DISubprogram::toSPFlags(): fix "enumeral and non-enume [...] adds ab88d0c40f1 [TargetLowering] expandFP_TO_UINT - improve fp16 support adds 8604a7645f4 Fix unused function warning. adds 1fd9d3a69d2 Fix Wdocumentation warning. NFCI. adds a4eddf6b391 Fix clang test suite on Windows by reverting part of r347216 adds ebb98fbc7db [DAGCombine] SimplifyNodeWithTwoResults - ensure same legal [...] adds 94a229e81ea [IR] Add hasNPredecessors, hasNPredecessorsOrMore to BasicBlock adds 8646eeda889 [InstCombine] Set debug loc on `mergeStoreIntoSuccessor` phi adds 0f9f2455c52 [AMDGPU] Restored selection of scalar_to_vector (v2x16) adds c77c7e9e510 Revert "[LoopSimplifyCFG] Teach LoopSimplifyCFG to constant [...] adds e2d6ca7986e AMDGPU: Fix V_FMA_F16 selection on GFX9 adds d163ebbe995 [X86] Add test case to show missed opportunity to use a sin [...] adds 8ae3810d9a8 [X86] Rename combineVSZext->combineExtendVectorInreg. NFC adds 9d20fc66004 [Transforms] Prefer static and avoid namespaces, NFC adds c0afd083369 It's its adds 30d4f344567 Implement computeKnownBits for scalar_to_vector adds 941c5c48110 [CodeView] Don't print PointerAttributes when dumping. adds 5f5b1ef2cc6 [WebAssembly] Remove unused function return types (NFC) adds f06128002a8 [DAGCombiner] reduce code duplication in visitXOR; NFC adds c947a215ea2 [ExecutionEngine][Interpreter] Fix out-of-bounds array access. adds 5018f6ea8fc [SelectionDAG] Compute known bits and num sign bits for liv [...] adds 86787453a38 [PowerPC] Don't combine to bswap store on 1-byte truncating store adds 7640c67cbf3 Recommit "[LoopSimplifyCFG] Teach LoopSimplifyCFG to consta [...] adds dfb4f108876 [X86] Replace more calls to getZeroVector with regular getC [...] adds 7ac6c37d6f6 [X86] Add custom type legalization for v8i8->v8i32 sign ext [...] adds 9ad322c7dfd [X86] Preserve undef information when creating a punpckl/hb [...] adds e33c66618be [X86][SSE] Add SimplifyDemandedVectorElts support for PACKS [...] adds 253f4c70b23 [X86][SSE] Lower immediately to PACKUS instead of VECTOR_SHUFFLE. adds 8f862e5873f [TargetLowering] Improve SimplifyDemandedVectorElts/Simplif [...] adds 840ef4fbe4d [X86][SSE] XFormVExtractWithShuffleIntoLoad - getVectorShuf [...] adds 9c81790ca9f [X86][SSE] Add computeKnownBits/ComputeNumSignBits support [...] adds d8ad355cbce Fix MSVC 'truncation of constant value' warning. NFCI. adds 7f7d70d2485 [llvm-exegesis][NFC] Some code style cleanup adds 161bc40eb07 [PowerPC][NFC]Add testcase for STWU scheduling check adds fd21bbe16d1 [PowerPC] Add Itineraries for STWU/STWUX etc adds f1f291e60c2 [DAGCombine] Add calls to SimplifyDemandedVectorElts from v [...] adds 2ec586e1fe1 [AArch64, x86] add tests for shift-not (PR39657); NFC adds 40bfd6fe1ec [PatternMatch] Handle undef vectors consistently adds 4974f8f5951 [APInt] Add methods for saturated add and sub adds 2739f4e8fdd [LoopSink] Add preheader to alias set adds c6ecc6fd0ae [AMDGPU] Regenerate weird stores tests. adds 4f676c68646 [ConstantFolding] Add support for saturating add/sub adds ad4da63ac23 [InstructionSimplify] Add support for saturating add/sub adds acc323be206 [InstSimplify] add tests for funnel shift with undef operands; NFC adds eaf81518af9 [InstSimplify] fold funnel shifts with undef operands adds cb68dc6ec4d [InstCombine] add tests for funnel shifts; NFC adds 28b443d2a3c [Docs] Documentation for the saturation addition and subtra [...] adds 7891606b91f [X86] Remove -verify-machineinstrs=0 now that PR38391 is fixed. adds 49ad95c63a6 [unittest] Skip W+X MappedMemoryTests when MPROTECT is enabled adds 556840f1781 [WebAssembly] WebAssemblyLowerEmscriptenEHSjLj: use getter/ [...] adds 6159adfadcd [x86] add tests for 8-bit multiply with constant; NFC adds 2bb2152d87d Silence C4709 in MSVC because it is buggy. adds 85706895fbe [unittests] Fix ExpandTilde test to match handling home dir [...] adds 3946ac6232a [X86] Emit a single shuffle for the v16i8->v4i32 step of a [...] adds cad90f129bf [CodeView] RelocPtr points to little endian data. adds da30f515344 [CodeView] Mark this pointers as const. adds 9213bb9bc8e [CodeView] Add support for ref-qualified member functions. adds bd109e244ad [DAGCombiner] look through bitcasts when trying to narrow v [...] adds 2615b64898d Fix pointer options mask. It was off by 1 bit. adds 4d285edf392 [X86] Emit a PACKUS instead of a VECTOR_SHUFFLE from LowerT [...] adds ba7a71dcab5 [docs] Add C++ Performance Benchmark to test-suite proposals. adds c9cf55d012f [X86] Add a copy of avx512-trunc.ll with -x86-experimental- [...] adds c4acb066247 [X86] Correct 256 vpmovzx/vpmovsx isel patterns to check Ha [...] adds ecd20daf2c5 [PowerPC] Do not use vectors to codegen bswap with Altivec [...] adds 21e89f9cece [LVI] run transfer function for binary operator even when t [...] adds 79932fdd15d [X86] In getScalarMaskingNode, replace scalar_to_vector wit [...] adds dceb6f4be4c [NFC] Add some sophisticated tests on LoopSimplifyCFG adds 498b7f9b571 [NFC] More complex tests for LoopSimplifyCFG adds 3912ef61b84 Test commit: Delete trailing space in comment adds 50a4cceb8ec [X86][AVX] Remove BROADCAST if we only need the 0'th element adds 82ed2321836 [nios2] Add missing Nios2CodeGen -> Nios2AsmPrinter linkage adds cdf701a661f [PM] Port Scalarizer to the new pass manager. adds d0658beb2f3 [TargetLowering] SimplifyDemandedBits - only reduce known b [...] adds 08e90851c47 [x86] add checks for asm to test; NFC adds a7270f970cd [MC] Support labels as offsets in .reloc directive adds 21ee033d67c [mips][mc] Add basic support for R_MIPS_JALR/R_MICROMIPS_JALR adds 966966c9798 [x86] add test for FP select with constant; NFC adds 7effc71abb1 [x86] fix predicate for avoiding vblendv adds 940eac61cae [x86] add tests for select-of-FP-constants; NFC adds 16ca3e10176 [MergeFuncs] Generate alias instead of thunk if possible adds 36e75104e14 [DAGCombiner] reduce code duplication; NFC adds 1b3ba79d39f [InstCombine] Add tests for funnel shift with zero operand; NFC adds d715843a755 [LLVM] Allow modulemap installation adds 7b24d432d5b [PowerPC][NFC] Minor Code Cleaup for PPCMCCodeEmitter. adds 39abb33b7da [DAGCombiner] refactor select-of-FP-constants transform adds ade4219714a [PowerPC][NFC] Split PPCMCCodeEmitter into header and cpp file. adds a71fc88a921 [mingw] Use unmangled name after the $ in the section name adds 552c552f35f [PM] correcting return value for new-pass-manager version o [...] adds dbe1f0008bf Removing test/MC/Mips/reloc-directive-label-offset.s temporarily adds 477a08d298b [llvm-mca] Add test case (NFC) adds 7f472663e7c Add a ubsan blacklist entry for libstdc++ 8.0.1. adds 4b31b2ea220 [llvm-mca] Add test case (NFC) adds 78838bfd21f [x86] use FileCheck to verify output; NFC adds 4a9292f31ca [llvm-mca] Add test case (NFC) adds b14daba5858 [llvm-size] Use empty() and range-based for loop. NFC adds 9289f742c65 [SystemZTTIImpl] Give correct cost values for vector bswap [...] adds f6259516dbc [ARM GlobalISel] Add test for BFC. NFCI adds a307da2c567 Revert r343473 "Move llvm util dependencies from clang-tool [...] adds 9fa222df45b [TI removal] Leverage the fact that TerminatorInst is gone [...] adds 67af3175a8e [NFC] Simplify code by using standard exit blocks collection adds a0574af7fb4 [AArch64] Fix SelectionDAG infinite loop for v1i64 SCALAR_T [...] adds ee189cb45b9 [NFC] Ensure deterministic order of dead exit blocks adds b479b735253 [NFC] Assert that all blocks staying in loop are live adds ab518ce813d [llvm-mca] Fix an invalid memory read introduced by r346487. adds fb147dee9d5 [llvm-mca] Use a SmallVector instead of std::vector to trac [...] adds 5c31015532b [llvm-mca] LSUnit: use a SmallSet to model load/store queues. NFCI adds 21587cd1a1c Reland test/MC/Mips/reloc-directive-label-offset.s adds c93c84c7621 [DAGCombiner] form 'not' ops ahead of shifts (PR39657) adds 091e955d200 [LegalizeVectorTypes] Have SplitVecOp_TruncateHelper fall b [...] adds 4f5ef130c8a [Object] Also treat STB_GNU_UNIQUE symbols as exported to o [...] adds 5a2d06490cf [LegalizeVectorTypes] Don't use SplitVecOp_TruncateHelper i [...] adds a796d62f22f [NFC] Add verification flags to tests adds f2ac09bb548 [LoopSimplifyCFG] Don't delete LCSSA Phis adds f56b13f3e49 Disable LoopSimplifyCFG terminator folding by default adds 5fc62830a6c [ARM][NFC] codegen tests cleanup: remove dangling check prefixes adds d275ca34bae [NFC] Add test that demonstrates buggy behavior on term fol [...] adds ae9f773cf50 [ThinLTO] Assembly representation of ReadOnly attribute adds 7ef46a70af7 Revert r343341 adds 5ae36ee5a2b Attempt to fix buildbot after r347489 adds 848dcbd04a7 [llvm-mca][View] Improved Retire Control Unit Statistics. adds a21de3bd5b6 [ARM][AsmParser] Improve debug printing of parsed asm operands adds c8ecb420412 Revert r347490 as it breaks address sanitizer builds adds ba53249901f [x86] make test immune to oversized shift simplification adds 703a4c27a12 [DAG] consolidate shift simplifications adds 464205dfc93 [llvm-mca] Refactor some of the logic in InstrBuilder, and [...] adds 7280a87f55f [TableGen] Emit more variant transitions adds 3c0addf152d [InstCombine] Simplify funnel shift with zero/undef operand [...] adds e4c7f02ce6f [ARM] Add dependency from ARMAsmParser to ARMAsmPrinter aft [...] adds 8ae57197959 [AArch64] Enable libm vectorized functions via SLEEF adds 9951b079077 Revert unapproved commit adds 71e4421394e [llvm-mca] InstrBuilder: warnings for call/ret instructions [...] adds 64638808e5f [InstCombine] Determine demanded and known bits for funnel shifts adds 05c492a9a67 [X86] Synchronize a macro in getAvailableFeatures in Host.c [...] adds 53a580e5e43 add Kang Zhang(shkzhang@cn.ibm.com) to the CREDITS.TXT adds 8b53eb174bd [llvm-mca] Add support for instructions with a variadic num [...] adds 3ca25530426 [SelectionDAG] move constant or splat functions to common location adds a00149b863b [IPSCCP] Use input operand instead of OriginalOp for ssa_copy. adds ea0279549d5 [x86] add tests for select-of-fp-constants; NFC adds d604b8cf93a [x86] limit transform for select-of-fp-constants adds 8080935f3b7 [MetadataTest] Fix off-by-one strncpy warning reported by g [...] adds 802db564f99 [Support/FileSystem] Add sub-second precision for atime/mti [...] adds a638433e6d5 [PowerPC] Fix inconsistent ImmMustBeMultipleOf for same ins [...] adds 33a04216548 [X86] Add test cases to show bad type legalization of fptos [...] adds 2fd827f4704 Revert "[PowerPC] Fix inconsistent ImmMustBeMultipleOf for [...] adds b7a5c20fc68 Revert "[TTI] Reduction costs only need to include a single [...] adds c9c05bde237 [ARM] Prevent parallel macs for unsigned values adds 845ecdf06a7 Fix typo in comment. NFC adds 2de9fad1ee1 [ARM GlobalISel] Support G_CTLZ and G_CTLZ_ZERO_UNDEF adds 12ece5753e0 [x86] promote all multiply i8 by constant to i32 adds 753cb246ac3 [DemandedBits] Add support for funnel shifts adds 6de08e45573 Remove an unnecessary file; NFC. adds b4a52bd5142 [CodeGen] Take SPAdj into account for STATEPOINT liveness args adds b0463ea5371 AMDGPU: Only add implicit super-reg def for first subreg adds 44412401b30 AMDGPU: Don't optimize exec masks at -O0 adds ad7ad9d3185 AMDGPU: Cleanup / relax tests for future changes adds c088edcccfe Delete dead code introduced in r347354. adds 4b607e9bf69 [CodeGen] Support custom format of stack maps adds 2d8056c196d [clang][slh] add attribute for speculative load hardening adds f81a97a881b Revert "[clang][slh] add attribute for speculative load hardening" adds 57aee1be6f0 [X86] Add test case for D54818 adds 406f960c8c4 [SelectionDAG] Teach BaseIndexOffset::match to unwrap the b [...] adds e7e4f1f171d [ThinLTO] Consolidate cache key computation between new/old [...] adds 689482be856 [LegalizeVectorTypes][X86][ARM][AArch64][PowerPC] Don't use [...] adds 9926acb6bf4 AMDGPU: Record SGPR spills when restoring too adds 241ac1bd314 Support for inserting profile-directed cache prefetches adds 5f6c1fdc7eb [AArch64] Refactor the scheduling predicates (1/3) (NFC) adds e62b9ce6c8b [AArch64] Refactor the scheduling predicates (2/3) (NFC) adds 7784961a632 [AArch64] Refactor the scheduling predicates (3/3) (NFC) adds 17f866f3a5f [cfi] Make sanstats print address of the check adds a7aff258ef2 [cfi] Help sanstats to find binary if they are not at the o [...] adds c29e36f3eef [stack-safety] Empty local passes for Stack Safety Local Analysis adds 9d4b9a36a02 [stack-safety] Local analysis implementation adds c3924f6ab23 [InstCombine] add helper function to reduce code duplication; NFC adds 4ac1416b1f4 [ICP] Remove incompatible attributes at indirect-call promo [...] adds 1d132e3bc9a [X86] Add dependency from X86 to ProfileData after rL347596 adds 6f171fb565a Add new passes to X86 pipeline tests adds 953932eca66 AArch64ISelLowering: Remove a return-of-assignment to allow NRVO adds 54b4ae7d7ba [stack-safety] Empty local passes for Stack Safety Global Analysis adds d5aa33e7dbb [stack-safety] Inter-Procedural Analysis implementation adds d305cea67d3 [stack-safety] Analysis documentation adds 5b5d8e4aa1f Remove trailing empty line adds 421d590d181 Notify the linker when a TU compiled with split-stack has a [...] adds 3f6a8f98bbb Fix debug build break adds 504db0626d3 [clang][slh] add attribute for speculative load hardening adds 725ed2f80e8 [InstCombine] add tests for rotate/bswap equality; NFC adds 61eaf0116a2 [stack-safety] Fix build on gcc 5.4 adds fd4afd6605e [stack-safety] Fix and uncomment assert adds 2aeaa6efdf5 [stack-safety] Update comment adds 6b7c84eeaaa Revert "[clang][slh] add attribute for speculative load hardening" adds 4eb1db5ecc5 [X86] Add a bunch of test cases for storing a scalar bitcas [...] adds fd2bfc78428 [X86] Prevent DAG combine from folding a bitcast from vXi1 [...] adds cefe270ac58 [gn build] Create abi-breaking.h, config.h, llvm-config.h, [...] adds 8448be09219 Move a file I forgot to move in r347636. adds cd010d2b26d [gn build] Merge r347530 to gn. adds e53078a5a4b [LoopSimplifyCFG] Fix corner case with duplicating successors adds 052164630ac [LoopSimplifyCFG] Turn on term folding after underlying bug fixed adds 32a3b311068 [X86] Use getUnpackl/getUnpackh instead of directly creatin [...] adds 6235bbfc9f4 [X86] Add test cases for vector shifts of v2i32/v2i16/v4i16 [...] adds 1ed9b3371e4 Add missing REQUIRES: asserts adds 65cb6340fc5 InstCombine: add comment explaining malloc deletion. NFC. adds c8872d113ad [AMDGPU] Disable DAG combine at -O0 adds 13e71ac98c4 [x86] regenerate checks; NFC adds 6da4a0e40ec [llvm-mca] pass -dispatch-stats flag to a couple of tests. NFC adds 07b822e4d48 [Demangle] remove itaniumFindTypesInMangledName adds 57a7a8a3258 Documentation: add \file markup as needed. adds 53c6e8ed565 [X86] Add cascade lake arch in X86 target. adds e0a85dd216a [PartialInliner] Make PHIs free in cost computation. adds 9a24b2fbeae [X86] Replace an APInt that is guaranteed to be 8-bits with [...] adds 6c99d2be100 [TableGen] Preprocessing support adds 36cff6306ac [PDB] Add symbol records in bulk adds 1b8b2696df5 Add missing error checking code intended for r347687 adds 5b841f76e46 [lit] Pass more environment variables through to child processes. adds 5707b0f8d69 [X86] Add cost model tests for shifts with -x86-experimenta [...] adds 6868d1a3e60 [X86] Add cost model tests for fp_to_int/int_to_fp with -x8 [...] adds 84288abd6ac [X86] Add cost model test for masked load an store with -x8 [...] adds e4c346daccc [X86] Add cost model tests for experimental.vector.reduce.* [...] adds 1a5348017b2 [InstCombine] Add tests for saturating add/sub; NFC adds 1d994c233b5 [clang][slh] add attribute for speculative load hardening adds ad388eede06 [gn build] Add enough build files to be able to build llvm-tblgen. adds 4616e2f29a6 [yaml2obj] Treat COFF/ARM64 as a 64 bit architecture adds 1171c763dc4 [TableGen] Refactor macro names (NFC) adds e41f778c5c5 [TableGen] Improve readability of generated code (NFC) adds b72b8f22f00 [X86] Add exhaustive cost model testing for sext/zext for a [...] adds a4ab066df85 [X86] Add test cases to show that we don't properly take -m [...] adds 0833f2640ef Do not insert prefetches with unsupported memory operands. adds 3eeed747eec [llvm-objcopy] Hook up the -V alias to --version, output "G [...] adds 37e265983b8 [SystemZ::TTI] Return zero cost for scalar load/store conn [...] adds 024fc6cdfea [SystemZ::TTI] Improved cost values for comparison against memory. adds 21e857c82f4 [SystemZ::TTI] Improve costs for i16 add, sub and mul agai [...] adds 3d8563b0d65 [SystemZ::TTI] Improve cost for compare of i64 with extend [...] adds 1fff1694a65 [ARM, AArch64] Move ARM/AArch64 target parsers into separat [...] adds 4b88badbb0c [TableGen] Better error checking for TIED_TO constraints. adds 0884e6d64ed [DebugInfo] Rename EmitDebugThreadLocal back to EmitDebugVa [...] adds 83895b33cb2 [CodeGen][NFC] Make `TII::getMemOpBaseImmOfs` return a base [...] adds 9ba9c03b671 [MachineScheduler] Add support for clustering mem ops with [...] adds 43c0a6482a4 Fix build of r347741 by adding missing vector include to AR [...] adds 9d5ac66dc1f Fix -Winfinite-recursion compile error. adds eb20676bc67 [SLP]Fix PR39774: Set ReductionRoot if the original instruc [...] adds f5338fd082e Fix build error due to missing cctype include in ARMTargetP [...] adds 20632e333e6 [ThinLTO] Correct linkonce_any function import linkage. NFC. adds 95f8d2a9fb1 Fix DynamicLibraryTests build on Windows when LLVM_EXPORT_S [...] adds dad8def3c2b llvm-git: More tweaks. adds 9fb5115feda [llvm-mca] Return the total number of cycles from method Pi [...] adds 03c198b24f6 [Hexagon] Add missing flags to ELF YAMLIO adds 246a4c60c28 [InstCombine] Canonicalize const arg for saturating adds adds 06022d84cee [InstCombine] Use known overflow information for saturating [...] adds 72d3673993c [ValueTracking] Determine always-overflow condition for uns [...] adds 79fc38d0bd5 [InstCombine] Canonicalize ssub.sat to sadd.sat adds e666b9ba92e [InstCombine] Combine saturating add/sub with constant operands adds d8886103190 [RISCV] Support .option push and .option pop adds 5f68f0ae94a Revert [llvm-mca] Return the total number of cycles from me [...] adds 3f74a7bddb3 [LICM] Reapply r347190 "Make LICM able to hoist phis" with fix adds 3ed031b2c77 [LICM] Enable control flow hoisting by default adds f03ba1ec749 [DebugInfo] Give inlinable calls DILocs (PR39807) adds f41ae122a11 [X86] Add a combine for back to back VSRAI instructions adds 9e865e720de [X86] Add some cost model entries for sext/zext for avx512bw adds d5ee5db9d4a [X86] Make X86TTIImpl::getCastInstrCost properly handle the [...] adds 3d1a12c18cb Reapply "[llvm-mca] Return the total number of cycles from [...] adds ccefd880658 [DebugInfo] IR/Bitcode changes for DISubprogram flags. adds 1d248831181 [TextAPI] TBD Reader/Writer adds 54b34d20c2a Revert "[TextAPI] TBD Reader/Writer" adds c85f3082e00 [x86] try select simplification for target-specific nodes adds 5fe2f7f3d38 [TextAPI] TBD Reader/Writer adds e3fbeeb6a59 [TextAPI] TBD Reader/Writer (bot fixes) adds f40035d5ebf NFC. Use unsigned type for uses counter in CaptureTracking adds 6f247b9c72a [TextAPI] TBD Reader/Writer (bot fixes: take 2) adds be5fdae14b5 [PowerPC] [NFC] Add test cases to the ISD::BR_CC node in th [...] adds 91a115149cd [PowerPC] Fix a conversion is not considered when the ISD:: [...] adds 45ce0233516 Add Hurd target to LLVMSupport (1/2) adds 6ef7e18806b [X86] Correct comment. NFC adds 8d8a63ebb5c [TextAPI] Switch back to a custom Platform enum. adds c279e891e90 [TextAPI] Fix a memory leak in the TBD reader. adds 567107e1f03 Revert "[TextAPI] Fix a memory leak in the TBD reader." adds 1e1f81208a9 [CGP] Improve compile time for complex addressing mode adds 5c4417bb46d [Inliner] Add test for merging of min-legal-vector-width fu [...] adds 75aaec51455 [Inliner] Modify the merging of min-legal-vector-width attr [...] adds b2a42b2112a [LoopStrengthReduce] ComplexityLimit as an option adds 912d9b829e8 Disable TermFolding in LoopSimplifyCFG until PR39783 is fixed adds d2e5bcf9072 [NFC] Add two XFAIL tests from PR39783 adds bf9aa8b6bf3 [CODE_OWNERS] Add myself as code owner for MinGW adds f2ec2633c5f AMDGPU/InsertWaitcnts: Untangle some semi-global state adds cd71b9eae53 AMDGPU/InsertWaitcnts: Use foreach loops for inst and wait [...] adds 219b87abb4d AMDGPU/InsertWaitcnts: Simplify pending events tracking adds 608f48308a3 AMDGPU/InsertWaitcnt: Remove unused WaitAtBeginning adds 9da2d56db9a AMDGPU/InsertWaitcnt: Consistently use uint32_t for scores [...] adds 41f457ff4f2 AMDGPU/InsertWaitcnts: Remove the dependence on MachineLoopInfo adds 51af6fdf8a3 [llvm-mca][MC] Add the ability to declare which processor r [...] adds cec32edcb5a [llvm-rc] Support EXSTYLE statement. adds 3834f852008 [GlobalISel] Make EnableGlobalISel always set when GISel is [...] adds 659d8117b2c [GlobalISel] Fix insertion of stack-protector epilogue adds d8517b96dfb Revert r347596 "Support for inserting profile-directed cach [...] adds f22e7eafc99 [CVP] auto-generate complete test checks; NFC adds b8e45d47275 Revert "[LICM] Enable control flow hoisting by default" and [...] adds 682163bb18d [CVP] tidy processCmp(); NFC adds 7fd87699a5a Add support for TFE/LWE in image intrinsics adds dd1b6604dba [CallSiteSplitting] Report edge deletion to DomTreeUpdater adds b075bab277f Revert r347823 "[TextAPI] Switch back to a custom Platform enum." adds e88aff0286d Fix: Add support for TFE/LWE in image intrinsic adds 19d2eebe6c2 [AMDGPU] Add and update scalar instructions adds 53e0bb825ba [InstCombine] auto-generate complete checks; NFC adds 95d853d6f33 [SimplifyCFG] auto-generate complete checks; NFC adds 97ddb1aa3fa git-llvm: Fix incremental population of svn tree. adds 9a1f991fa8b [ThinLTO] Import local variables from the same module as caller adds 3f6c63c992e [LICM] Reapply r347776 "Make LICM able to hoist phis" with fix adds cb28830d842 Avoid redundant reference to isPodLike in SmallVect/Optiona [...] adds fc5de306107 [llvm-objcopy] Delete redundant !Config.xx.empty() when fol [...] adds 1efb7b466e6 [GlobalISel] LegalizationArtifactCombiner: Combine aext([as [...] adds 52c21589999 [TableGen] Examine entire subreg compositions to detect ambiguity adds 3c0efb7a96d [InstSimplify] fold select with implied condition adds dee2f99323a [X86] Add a DAG combine pre type legalization to widen divi [...] adds 74e6178bb1d [SelectionDAG][AArch64][X86] Move legalization of vector MU [...] adds 50c71c5f061 [MachineScheduler] Order FI-based memops based on stack direction adds 1912c7578e1 Introduce MaxUsesToExplore argument to capture tracking adds cb049f818d9 Revert r347871 "Fix: Add support for TFE/LWE in image intrinsic" adds 23b5f9cec08 [X86] Change the pre-type legalization DAG combine added in [...] adds fa6f90e0d3a Adding .vscode to svn:ignore adds 6edc257cf45 [RISCV] Implement codegen for cmpxchg on RV32IA adds 8dae0dbde48 [obj2yaml] [COFF] Write RVA instead of VA for sections, fix [...] adds 426ddc1933c [DAGCombiner] narrow truncated binops adds 74929cbb66f Comment tweak requested in code review. NFC adds eb5a3aeacc4 Produce an error on non-encodable offsets for darwin ARM sc [...] adds f0802882791 [WebAssembly] Expand unavailable integer operations for vectors adds 218bd440251 [gn build] Add a script checking if sources in BUILD.gn and [...] adds 9f3ca4490c4 [gn build] Add template for running llvm-tblgen and use it [...] adds e0e4c6ec7d6 [gn build] Set +x bit on .py files in llvm/utils/gn/build. adds dcd85560e11 [gn build] merge r346978 and r347741. adds 28ade4e6f89 [SCEV] Guard movement of insertion point for loop-invariants adds c574e6780f7 [CMake] build correctly if build path contains whitespace adds 76eded2a273 Revert "Revert r347596 "Support for inserting profile-direc [...] adds 301a1895b4a Fix build warnings introduced in rL347938 adds 9f3f290561f [llvm-objcopy] Move elf-specific tests into subfolder adds 7d9ba495dd9 [X86] Fix a couple types in SimplifyDemandedVectorEltsForTa [...] adds 31393f1f983 [SystemZ::TTI] i8/i16 operands extension costs revisited adds 5f388804f3f [NFC] Refine doxygen format. adds 3c67822cb8c [CodeGen] Fix bugs in BranchFolderPass when debug labels ar [...] adds b6be32f152c [ARM] Don't expand sdiv when optimising for minsize adds 93416f4b6e0 [X86] Change the pre-sse4.1 code in the v16i8 MULHU lowerin [...] adds d41fb27ca27 [X86] Emit PACKUS directly from the v16i8 LowerMULH code in [...] adds 762ae1ee91d [docs][AtomicExpandPass] Document the alternate lowering st [...] adds 2d62ddc13c3 [RISCV] Introduce codegen patterns for instructions introdu [...] adds 7d91084cf75 [NFC] Simplify and reduce tests for PR39783 adds 392b2c89432 [TargetLowering][RISCV] Introduce isSExtCheaperThanZExt hoo [...] adds 810e8672a48 [SelectionDAG] Support promotion of FRAMEADDR/RETURNADDR operands adds 24b8fd959ee [LoopSimplifyCFG] Update MemorySSA in terminator folding. PR39783 adds cdc31182973 [SelectionDAG] Support promotion of PREFETCH operands adds 87b02fc78d4 [llvm-mca] Simplify code in class Scheduler. NFCI adds 365d19d9574 [SelectionDAG] Support result type promotion for FLT_ROUNDS_ adds 983661ef622 [RISCV] Add UNIMP instruction (32- and 16-bit forms) adds 4e25c191659 Add a new reduction pattern match adds 5b0ffb89bd6 Fix parenthesis warning in IVDescriptors adds 993bc9badc3 [RISCV] Add additional CSR instruction aliases (imm. operands) adds 98272e49b80 TableGen/ISel: Allow PatFrag predicate code to access captu [...] adds d339265d524 [AMDGPU] Combine DPP mov with use instructions (VOP1/2/3) adds cd5185d6732 [gn build] Add build files for llvm/lib/Bitcode/Reader and [...] adds 6f763e66dd3 [SLP]PR39774: Update references of the replaced external in [...] adds 40a88673484 [CodeGen] Prefer static frame index for STATEPOINT liveness args adds 9c6b970db8b [BTF] Add BTF DebugInfo adds f019d91c8e8 [x86] add tests for fake vector FP ops; NFC adds f170fd931e3 Revert "[BTF] Add BTF DebugInfo" adds 3a446a39770 [llvm-mca] Speedup the default resource selection strategy. adds 9fd9db97367 [AMDGPU] Disable SReg Global LD/ST, perf regression adds 8e27bd1b3b4 [SelectionDAG] fold FP binops with 2 undef operands to undef adds cc1eb134513 [X86] Prefer lowerVectorShuffleAsBitMask over using a avx51 [...] adds 1d5f3f532c6 [X86] Change vXi8 MULHU lowering to unpack high and low hal [...] adds c7a92ba36ce [dsymutil] Gather global and local symbol addresses in the [...] adds 59a4a837616 [DWARFv5] Verify all-or-nothing constraint on DIFile source adds c446570fee9 [Mem2Reg] Fix nondeterministic corner case adds 5f1a7664a40 [TableGen] Fix negation of simple predicates adds e9322d80d19 AArch64: Don't emit CFI for SCS register in nounwind functions. adds 7534620e0f3 [MachineOutliner] Outline both register save calls + no LR [...] adds 39cd6300aab Support: use std::is_trivially_copyable on MSVC adds c16c6e66658 [ValueTracking] Make unit tests easier to write; NFC adds 83bcdb16b44 [InstSimplify] add tests for undef + partial undef constant [...] adds 3ccf8b50bf5 [X86] Split skylake-avx512 run lines in SLP vectorizer test [...] adds b8f365e6e8b [x86] add tests for undef + partial undef constant folding; NFC adds 39a2bbdea0f [DA] GPUDivergenceAnalysis for unstructured GPU kernels adds 37b386de213 AMDGPU: Fix various issues around the VirtReg2Value mapping adds e3924b1c156 AMDGPU: Divergence-driven selection of scalar buffer load i [...] adds cd3135eab69 LegacyDivergenceAnalysis: fix uninitialized value adds 941d3811050 [codeview] Remove dead macros for codeview record serializa [...] adds 916666c38a9 [gn build] Add action to generate VCSRevision.h and use it [...] adds 2439d1bffcb [X86] Replace '-mcpu=skx' with -mattr=avx512f or -mattr=avx [...] adds c689f67424d [NVPTX] Add lowering of i128 numbers as struct fields adds c3ceb237299 [lit] Add a generic build script with a lit substitution. adds bd238eb6685 Use RequireNullTerminator=false in identify_magic. adds 26f6d0a9018 [X86][LoopVectorize] Replace -mcpu=skylake-avx512 with -mat [...] adds c004d540e94 [projects] Use add_llvm_external_project for implicit projects adds de97988fad9 [RISCV] Remove RV64I SLLW/SRLW/SRAW patterns and add new te [...] adds a12accc8eef [ThinLTO] Allow importing of functions with var args adds ff433298cd8 [X86] Remove stale FIXME from test case. NFC adds 9ecb90821ef [InstCombine] Support ssub.sat canonicalization for non-splats adds b0510431f20 [SelectionDAG] Improve SimplifyDemandedBits to SimplifyDema [...] adds 0228fd4d1d8 [llvm-readobj] Improve dynamic section iteration NFC. adds 84cbc95b543 [AMDGPU] Split 64-Bit XNOR to 64-Bit NOT/XOR adds 2d4f754c337 [TTI] Reduction costs only need to include a single extract [...] adds d1c472605b0 [X86] Don't use zero_extend_vector_inreg for mulhu lowering [...] adds d11871c7dea Replace w16/w17 in machine-outliner.mir with w11/w12 adds b0e8f6d5f68 [MachineOutliner][AArch64] Improve checks for stack instructions adds 6912ec0ac7d [X86] Add vXi8 division/remainder by non-splat constant tes [...] adds 90ee83f2266 [X86] Custom type legalize v2i32/v4i16/v8i8->i64 bitcasts i [...] adds 8590612b6ae [X86] Add custom type legalization for v2i32/v4i16/v8i8->mm [...] adds 81f79dd81ad [X86] Simplify LowerBITCAST code for v2i32/v4i16/v8i8/i64-> [...] adds 7e0e2c04a7d [ValueTracking] add helper function for testing implied con [...] adds 9b0a5d54698 [DAGCombiner] guard against an oversized shift crash adds 597d03ba905 [SelectionDAG] fold constant with undef vector per element adds 905483244fb [ValueTracking] Support funnel shifts in computeKnownBits() adds cfeb08f2e5b [test] Fix BugPoint/compile-custom.ll to use detected python exec adds 6008df21adb [test] Fix ScalarEvolution test to allow __func__ with prototype adds 69204ee0d7b [test] Fix use of 'sort -b' in SimpleLoopUnswitch on NetBSD adds cc78f0c4ddf [X86] Fix bad comment. NFC adds 9465badfab0 [X86] Add a DAG combine to turn stores of vXi1 on pre-avx51 [...] adds e00f5a4b2f1 [gn build] Add build files for llvm/lib/Analysis and llvm/l [...] adds a9300806e2c [gn build] Slightly simplify write_cmake_config. adds fe47f263abd [gn build] Fix cosmetic bug in write_cmake_config.py adds e28eceb434c [NFC] [PowerPC] add an routine in PPCTargetLowering to dete [...] adds 49114e7d6e3 [PowerPC] Fix inconsistent ImmMustBeMultipleOf for same ins [...] adds dbd65c8e9d2 [ARM] FP16: support vld1.16 for vector loads with post-increment adds 57d0351289b [GlobalISel] Fix test irtranslator-stackprotect-check.ll adds ec9e4f6ed64 [KMSAN] Enable -msan-handle-asm-conservative by default adds 9b84009665e [ARM][Asm] Debug trace for the processInstruction loop adds 9639b465201 [ARM][MC] Move information about variadic register defs int [...] adds 2a12d85a04d [llvm-dwarfdump] - Stop printing the bogus empty section na [...] adds 60496740870 [RISCV] Fix test/MC/Disassembler/RISCV/invalid-instruction. [...] adds 674e50443ad [CMake] Add LLVM_EXTERNALIZE_DEBUGINFO_OUTPUT_DIR for custo [...] adds e29b1ab0c06 [NFC][AArch64] Split out backend features adds 0487bd8f42c ARM: use target-specific SUBS node when combining cmp with cmov. adds 086b7dc10df [AMDGPU] Add sdwa support for ADD|SUB U64 decomposed Pseudos adds 0952fda535c [AArch64] Add command-line option for SSBS adds 7e303e822d3 [SystemZ::TTI] Return zero cost for ICmp that becomes Load [...] adds 90f49126b3a Fixing -print-module-scope for legacy SCC passes adds 71aa202dd06 Fix line endings. NFCI. adds 79a6444f88a [CmpInstAnalysis] fix formatting; NFC adds 750d1ed62d7 [SimplifyCFG] add tests for cross block compare folding; NFC adds 5678548cc96 Update Diagnostic handling for changes in CFE. adds edc98edb72c Fix non-modular build. adds a7139785377 [X86] Add DAG combine to combine a v8i32->v8i16 truncate wi [...] adds 7d7bbfa893a [X86] Teach LowerMUL/LowerMULH for vXi8 to unpack constant RHS. adds 53e1857e0ad Don't build the Tpi Hash map by default. adds 579dd821306 [Hexagon] Some formatting changes, NFC adds 5656053d240 [Hexagon] Remove unused operand definitions, NFC adds 72f170d4e59 [X86] Fix bad formatting. NFC adds 3d5bca28c5f Fix issue with Tpi Stream hash map. adds 2c3aa39881b [Hexagon] Add HasV5 predicate for compatibility with auto-g [...] adds 4a9bb285e14 [MachineOutliner] Drop candidates that require fixups if it [...] adds bab257c102e [llvm-tapi] initial commit, supports ELF text stubs adds dda0ca0e1ac [Hexagon] Change instruction type field in TSFlags to 7 bits adds 915fd73c02d [InstCombine] add tests for shuffle+binop fold; NFC adds 14107a3c418 [llvm-objcopy] Add --build-id-link-dir flag adds 40c46461742 [InstCombine] rearrange shuffle+binop fold; NFC adds 53ce77a0332 [COFF] Don't mark mingw .eh_frame sections writable adds 7a8d5537d38 [COFF] Remove an outdated/incorrect comment. NFC. adds f3a84c19931 [TextAPI] Remove a superfluous semicolon, fixing GCC warnin [...] adds 7fa8f244104 [cmake] Clean up add_llvm_subdirectory adds d7774dcabf9 [InstCombine] foldICmpWithLowBitMaskedVal(): disable 2 faul [...] adds fbdc008393b [Hexagon] Update timing classes adds d1325655d52 [WebAssembly] Enforce assembler emits to streamer in order. adds 7589f848e5e [gn build] Use print_function in write_cmake_config.py adds 4ffef2b33ce [InstCombine] fix undef propagation bug with shuffle+binop adds 8207557fa45 [Hexagon] Remove unused encodings, NFC adds 68298d44279 [mips] Fix TestDWARF32Version5Addr8AllForms test failure on [...] adds a6c2a7e2be8 [DAGCombiner] narrow truncated vector binops when legal adds 9887fee818c [Hexagon] Extract operand decoders into a separate file, NFC adds dd37dd65215 BumpPtrAllocator: Add a couple of convenient wrappers aroun [...] adds ba966673f59 Adapt gcov to changes in CFE. adds f00f55a81f3 [CodeExtractor] Split PHI nodes with incoming values from o [...] adds 5e43cc22a9f [Hexagon] Switch to auto-generated intrinsic definitions an [...] adds f4979f32c50 [IR] Don't assume all functions are 4 byte aligned adds 3982fbc2ec4 [ThinLTO] Look through aliases when computing hash keys adds 81680aec534 [projects] Use directory name for add_llvm_external_projects adds fb6c2245f1c [MachineOutliner][AArch64][NFC] Add early exit to candidate [...] adds c448b1493f2 [MachineOutliner] Move stack instr check logic to getOutlin [...] adds 426a6a886fd [asan] Reduce binary size by using unnamed private aliases adds 8e969e27e71 [ARM64][Windows] Fix local stack size for funclets adds 0ad7fb416ad [ExecutionEngine] Change NotifyObjectEmitted/NotifyObjectFr [...] adds df8eba611aa [TableGen] Fix typo in emitted comment (NFC) adds 3144389507f [TableGen] Improve the formatting of the emitted predicates (NFC) adds 2f8f8288f30 Reverting r348215 adds 25a13e39879 [X86] Remove custom DAG combine for SIGN_EXTEND_VECTOR_INRE [...] adds 49a2ac0de48 [llvm-dwarfdump] - Dump the older versions of .eh_frame/.de [...] adds 35e86cfb137 [llvm-mc] - Do not crash when referencing undefined debug s [...] adds 8254306a0e6 [TargetLowering] Add SimplifyDemandedVectorElts support to [...] adds dd1e7c94ef5 Revert r348243 "[llvm-mc] - Do not crash when referencing u [...] adds 69cbcac22d4 Revert rL348121 from llvm/trunk: [NFC][AArch64] Split out b [...] adds 2f5801a565e [TargetLowering] expandFP_TO_UINT - avoid FPE due to out of [...] adds 53dbb5a0e25 [X86] Remove unnecessary peekThroughEXTRACT_SUBVECTORs call. adds 4d22820956e Fix -Wparentheses warning. NFCI. adds dd5d6cf4597 Fix MSVC "unknown pragma" warning. NFCI. adds c99e0db5869 [X86][NFC] Add more constant-size memcmp tests. adds e00b976dee1 [GN][NFC] Update readme example to functional command adds 9a60319064d Update MemorySSA in SimpleLoopUnswitch. adds 53a9c2e39bd [yaml2obj] Move redundant statements into a separate static [...] adds 6c49527a196 Add common check prefix. NFCI. adds 3a2fb208b3c [SimpleLoopUnswitch] Remove debug dump. adds 3372b1ab74f [Hexagon] Remove unused checker functions from asm parser adds bb4b51a5861 [InstCombine] auto-generate full checks for icmp dominator [...] adds 09dac2e9e3a [InstCombine] add helper for icmp with dominator; NFC adds 4f5b6cddccb [InstCombine] auto-generate full checks for icmp overflow t [...] adds 5224ff0a346 [X86][SSE] Add MOVMSK demandedbits/elts tests adds 5dbce2e720f Revert "Adapt gcov to changes in CFE." adds 4bd85618e73 [X86][SSE] Add SimplifyDemandedBitsForTargetNode handling f [...] adds aefeecffdd7 [dsymutil] Ensure we're comparing time stamps with the same [...] adds 3d1c516e81d [InstCombine] rearrange foldICmpWithDominatingICmp; NFC adds 4c2adea438f MIR: Add method to stop after specific runs of passes adds f9a92140249 AMDGPU: Add f32 vectors to SGPR register classes adds 02f12eea5ea [SelectionDAG] Redefine isGAPlusOffset in terms of unwrapAd [...] adds edbf2ec8fde Move llc-start-stop-instance to x86 adds 04cb4ca3235 [CmpInstAnalysis] fix function signature for ICmp code to p [...] adds e7c735a8fc7 [PowerPC] Make no-PIC default to match GCC - LLVM adds a348028e7c2 [ADT] Add zip_longest iterators adds dcd2fa5f1e8 Revert "[ADT] Add zip_longest iterators" adds edb094151e9 [AVR] Silence fallthrough warning. NFC. adds 429f642b80b [PDB] Emit S_UDT records in LLD. adds b5c2dcfa2d5 [llvm-pdbutil] Remove the analyze subcommand. adds 72482ac5514 AArch64: clean up some whitespace in Windows CC (NFC) adds 97e21dd344c [InstCombine] add tests for implied simplifications; NFC adds 584d7ccb4ee [asan] Split -asan-use-private-alias to -asan-use-odr-indicator adds 51be74a9b09 Remove the hash code from CVRecord. adds 9459f97ba90 [AArch64][GlobalISel] Re-enable selection of volatile loads. adds 2e4508a5ad3 LTO: Don't internalize available_externally globals. adds 790a5cd848a [ADT] Add zip_longest iterators. adds cdd2e8326ef [SelectionDAG] Split very large token factors for loads int [...] adds 0f562feb0b1 [TableGen] Preserve order of output operands in DAGISelMatcherGen adds 0b64fe391f2 [asan] Add clang flag -fsanitize-address-use-odr-indicator adds 23084bdf814 [MachineLICM][X86][AMDGPU] Fix subtle bug in the updating o [...] adds 547017d9296 [NFC] Verify memoryssa in test for PR39783 adds f7528fdfca0 [X86] Add narrow vector test cases to vector-reduce* tests. [...] adds 9c4010cd4b5 AArch64: support funclets in fastcall and swift_call adds f0da85315a5 [X86] Add more cost model tests for vector reductions with [...] adds bd3579dbdc2 [X86] Remove -costmodel-reduxcost=true from the experimenta [...] adds cafffd22b14 HowToBuildWithPGO.rst: Fix a few details in the manual steps adds a26d00a67cd [LICM] *Actually* disable ControlFlowHoisting. adds 1dd5a04a660 [ARM GlobalISel] Implement call lowering for Thumb2 adds cf6cfbd9bb1 [TargetLowering] SimplifyDemandedVectorElts - don't alter D [...] adds d437f3c078b Recommit r348243 - "[llvm-mc] - Do not crash when referenci [...] adds c683b7170f5 Remove superfluous comments. NFCI. adds b3f633f7681 [MC] - Fix build bot. adds 67f4757dcef [SelectionDAG] Initial support for FSHL/FSHR funnel shift o [...] adds 8dc1a1ab0b7 [test] Split strip-preserve-time.test, and skip atime test [...] adds 52f31f630a5 [test] Skip ThinLTO cache tests requiring atime setting on NetBSD adds cf7a3f62516 [DAG] Add fshl/fshr tblgen opcodes adds b2a7ed6a261 [TargetLowering] Remove ISD::ANY_EXTEND/ANY_EXTEND_VECTOR_I [...] adds e96cf5f80be [llvm-rc] Support not expressions. adds efa843724b1 [X86][SSE] Begun adding modulo rotate support to LowerRotate adds d222be1e7a3 [InstCombine] simplify icmps with same operands based on do [...] adds 62a4268c771 [AMDGPU]: Turn on the DPP combiner by default adds 3ab2632b204 [IR] Add NODISCARD to attribute functions adds 2f95ca4fa05 [SLH] Regenerate tests with --no_x86_scrub_rip to restore t [...] adds d6d25e5df3b [SLH] Fix a nasty bug in SLH. adds 5e78401391c Revert "[IR] Add NODISCARD to attribute functions" adds a26e8808825 [X86] Add test case to show missed opportunity to combine a [...] adds 007924cf774 Allow norecurse attribute on functions that have debug infos. adds c642a82384c [DAGCombiner] don't try to extract a fraction of a vector b [...] adds 818b1d77704 AMDGPU: Fix using old address spaces in some tests adds 0fca1c8158c [gold-plugin] allow function/data sections to be toggleable adds f18b476bf72 [MachineOutliner][NFC] Don't create outlined sequence from [...] adds b70f93c28c1 [MachineOutliner][NFC] Make getters in MachineOutliner.h const adds 96d084fd304 [MachineOutliner][NFC] Use getOccurrenceCount() in getNotOu [...] adds 7f1c3d3b2bf [llvm-mca] Sort test run lines (NFC) adds 98151718d04 [llvm-mca] Simplify test (NFC) adds 6da5474632c [AArch64] Reword description of feature (NFC) adds c8e84f96772 [X86][SSE] Fix a copy+paste typo that was folding the sext/ [...] adds e1363b44fe3 [CodeExtractor] Do not marked outlined calls which may resu [...] adds a47a91a7f34 [GISel]: Provide standard interface to observe changes in G [...] adds 2ea1ed5fdbc [Hexagon] Foundation of support for Hexagon V66 adds 017a6411af8 [Hexagon] Add instruction definitions for Hexagon V66 adds 83757df6ccc [Hexagon] Add intrinsics for Hexagon V66 adds a5d8d4c7c94 [MachineOutliner] Outline functions by order of benefit adds 08bc3d840a5 ThinLTO: Do not import debug info for imported global constants adds 5aafb60b3da [InstCombine] add/move tests for extractelement; NFC adds 810c63b2be2 [InstCombine] reduce duplication in visitExtractElementInst; NFC adds d5178b04bca [MachineOutliner][NFC] Simplify and unify pruning/outlining logic adds 510a34508ac Fix buildbot capture warning adds 096ae714d50 [MachineOutliner][NFC] Remove CandidateList, since it's now [...] adds 7c4834215a9 [InstCombine] remove dead code from visitExtractElement adds c264b4770f6 [WebAssembly] Change event section code to 13 adds ad6bed67ac6 Revert r347934 "[SCEV] Guard movement of insertion point fo [...] adds 8bd5d3d025d [MachineOutliner][NFC] Candidates don't need to be shared_p [...] adds 3b07352f4c8 [MachineOutliner][NFC] Remove buildCandidateList and replac [...] adds 922f82fa410 [GlobalISel] Introduce G_BUILD_VECTOR, G_BUILD_VECTOR_TRUNC [...] adds 3c93875a30d [MachineOutliner][NFC] Remove IntegerInstructionMap from In [...] adds 17892fe3f36 [MachineOutliner][NFC] Move std::vector out of loop adds 7331098de45 [MachineOutliner][NFC] Move yet another std::vector out of a loop adds 184985589ef Add objc.* ARC intrinsics and codegen them to their runtime [...] adds 2941d4770db AArch64: Fix invalid CCMP emission adds beec7d4978f [llvm-objcopy] Change --only-keep to --only-section adds 053b8656deb InstCombine: Add some missing tests for scalarization adds feb7e4fb0ae [LoopSimplifyCFG] Delete dead in-loop blocks adds 21526df0a7c [X86] Remove some leftover code for handling an i1 setcc type. NFC adds 689b72162c3 [NFC][InstCombine] Add more miscompile tests for foldICmpWi [...] adds 261e9119888 [InstCombine] foldICmpWithLowBitMaskedVal(): don't miscompi [...] adds 61f571aa189 [llvm-dwarfdump] - Simplify the test case. adds 2a3b6f93b16 [X86][NFC] Add more tests for memset. adds b228e2cece9 [ARM GlobalISel] Nothing is legal for Thumb adds 4b5bc471a60 [X86][NFC] Convert memcpy/memset tests to update_llc_test_checks. adds 2036102c287 [ARM][NFC] Added extra arm-cgp test adds bb3c65904eb Test commit: Removed trailing space in .txt file. adds d42bdb79a1c Revert "[LoopSimplifyCFG] Delete dead in-loop blocks" adds 7852f77d6c7 Fix -Wcovered-switch-default warning. NFCI. adds 92a20faea1b [AMDGPU] Partial revert of rL348371: Turn on the DPP combin [...] adds fd7ff8f4930 AMDGPU: Generate VALU ThreeOp Integer instructions adds 8c303c35b78 [ARM][NFC] Adding another test for armcgp adds a2cb36c541f [NFC][AArch64] Split out backend features adds 42f44e61827 DAGCombiner::visitINSERT_VECTOR_ELT - pull out repeated VT. [...] adds 12ed311277d [DEBUGINFO, NVPTX]Emit last debugging directives. adds a9702ef6e8b [GVN] Don't perform scalar PRE on GEPs adds f37825c4aa0 [DEBUGINFO, NVPTX] Disable emission of ',debug' option if o [...] adds f8d18b88954 [X86] Refactored IsSplatVector to use switch. NFCI. adds 32cfa0e63be Support skewed stream arrays. adds 19016dafe68 [DAGCombiner] refactor function that hoists bitwise logic; NFCI adds dfe9c7d3687 [gn build] Process .def.in files in llvm/Config and add lib [...] adds a6cf7e36647 [PDB] Move some code around. NFC. adds ec41162fa75 [x86] add test for hoistLogicOpWithSameOpcodeHands with ext [...] adds 17c6c154879 [DAGCombiner] don't hoist logic op if operands have other uses adds cacd57275d0 [AArch64] Fix Exynos predicate adds 0888d7b98ea Reapply "Adapt gcov to changes in CFE." adds e1657fa8dd5 [PowerPC] add tests for hoisting bitwise logic; NFC adds fbbe7bd67f8 Fix Wdocumentation warning. NFCI. adds 32ffba19853 [DAGCombiner] don't hoist logic op if operands have other u [...] adds 5e3f62b203e [DagCombiner][X86] Simplify a ConcatVectors of a scalar_to_ [...] adds b00f43f53eb [DAGCombiner] reduce indent; NFC adds f108b6c2dc5 [x86] add test for vector bitwise-logic-of-bswaps; NFC adds 6ef3ba7f921 [DAGCombiner] don't group bswap with casts in logic hoisting fold adds 391f8bd484b [X86] Directly create ADC/SBB nodes instead of using ADD/SU [...] adds 5d33d9ddffb [gn build] merge r348505. adds 5023b8235ee Run `git ls-files '*.gn' '*.gni' | xargs -n 1 gn format`. adds d43800db05b [DAGCombiner] more clean up in hoistLogicOpWithSameOpcodeHa [...] adds 8b59b288436 [BDCE] Add tests for BDCE applied to vector instructions; NFC adds 6e9e89f4829 [DemandedBits][BDCE] Support vectors of integers adds 43d69f96f17 [DAGCombiner] don't bother saving a SDLoc for a node that's [...] adds 1a3341c24e1 [llvm-tapi] Don't override SequenceTraits for std::string adds 79ed2ef380b [DAGCombiner] use root SDLoc for all nodes created by logic fold adds 0ac91b66616 Revert "[DemandedBits][BDCE] Support vectors of integers" adds 2b0c69e15d7 Revert "[llvm-tapi] Don't override SequenceTraits for std::string" adds 35741b0bf7c [CodeExtractor] Store outputs at the first valid insertion point adds 68aa2e1cde8 [llvm-mca] Improve test (NFC) adds 5e86e5f9d2d [llvm-mca] Improve test (NFC) adds 5f2a36709f3 [PowerPC] Fix assert from machine verify pass that missing [...] adds df9c0d05bda [LoopSimplifyCFG] Do not deal with loops with irreducible C [...] adds b2bc0c56925 [PM] Port LoadStoreVectorizer to the new pass manager. adds 871f34985b0 [IR] Don't assume all functions are 4 byte aligned adds 11350ce5c4e [CMake] Add support for NO_INSTALL_RPATH argument in llvm_a [...] adds 4b99cf2bea9 [SelectionDAG] Don't pass on DemandedElts when handling SCA [...] adds 5d37d15da6b [X86] Add ivybridge to llvm-exegesis PFM counter mappings adds 9fb7c2f2ec6 [utils] Use operator "in" instead of bound function "has_key" adds b2857879040 Fix test/tools/llvm-mca/AArch64/Exynos/direct-branch.s on Mac adds 075618b0bdf [yaml2obj] format some codes NFC. adds f81732f9703 [yaml2obj] revert bad change adds a4079af794a [yaml2obj] format some codes NFC. adds ddbf742258f Fix gcc7.3 -Wparentheses warning. NFCI. adds 7135d8b482d [Targets] Add errors for tiny and kernel codemodel on targe [...] adds 2ae30c46b80 ARM: use correct offset from base pointer (r6) in call fram [...] adds c05ba548637 Introduce llvm.experimental.widenable_condition intrinsic adds e3677c90c66 [DAGCombiner] remove explicit calls to AddToWorkList; NFCI adds 7e8f37b605d [AMDGPU] Shrink scalar AND, OR, XOR instructions adds 38880e6df94 Reapply "[DemandedBits][BDCE] Support vectors of integers" adds fe665405b7a [DAGCombiner] disable truncation of binops by default adds d687922c19d AMDGPU: Remove llvm.AMDGPU.kill adds 8edf4fa92d7 AMDGPU: Remove llvm.SI.buffer.load.dword adds 6436c9dd32f [X86] Improve pfm counter coverage for llvm-exegesis adds 6ee22ea7818 AMDGPU: Remove llvm.SI.tbuffer.store adds a8fc6663457 [X86] Initialize and Register X86CondBrFoldingPass adds 1253bae2f05 [CostModel][X86] Fix overcounting arithmetic cost in illega [...] adds 54a06884084 [llvm-mca][x86] Add RDRAND/RDSEED instruction resource tests adds 876bf154c0c [llvm-mca][x86] Add missing AES instruction resource tests adds f66adf4be1e [llvm-mca][x86] Add RDSEED instruction resource tests for GLM adds eced3599bce AMDGPU: Allow f32 types for llvm.amdgcn.s.buffer.load adds af1b4636df7 [X86] Replace instregex with instrs list. NFCI. adds d19f12b58f1 [DAGCombiner] split trunc from extend in hoistLogicOpWithSa [...] adds a97d9f8bb5b [llvm-tapi] Don't try to override SequenceTraits for std::string adds 11255059aee [NativePDB] Reconstruct function declarations from debug info. adds f66defb43a0 Update the Swift version numbers reported by objdump adds b7c4b42cc3b [HotColdSplitting] Outline more than once per function adds d0e8089e646 [HotColdSplitting] Refine definition of unlikelyExecuted adds 9ee6b26355a AMDGPU: Use gfx9 instead of gfx8 in a test adds f6f2b8d5fd9 [MemCpyOpt] Add tests for memset->memcpy forwaring with und [...] adds e9812ab4276 [MemCpyOpt] memset->memcpy forwarding with undef tail adds a81ba68b921 Follow-up from r348441 to add the rest of the objc ARC intrinsics. adds e2e62154889 Delete registerScope function adds 73e1ce1e3ff [WebAssembly] clang-format/clang-tidy AsmParser (NFC) adds 141d07dd416 Fix unused variable warning. NFCI. adds 29d82fd995f [ModuleSummary] use StringRefs to avoid a redundant copy; NFC adds afa1a8e4efe [Hexagon] Fix post-ra expansion of PS_wselect adds 6c801086a38 [GlobalISel] Add IR translation support for the @llvm.log10 [...] adds 00ba96cad4b AMDGPU: Fix offsets for < 4-byte aggregate kernel arguments adds d5c6353bb6e [X86] Remove the XFAILed test added in r348620 adds 488e2ad9f42 [gn build] Add build files for lib/CodeGen, lib/Transforms/ [...] adds 0163b6cbcd6 [SelectionDAG] Remove ISD::ADDC/ADDE from some undef handli [...] adds 4222a6da380 [gn build] Merge r348593 adds 77bca327334 [llvm-readobj] Little clean up inside `parseDynamicTable` adds 0123db86e47 [WebAssembly] Make WasmSymbol's signature usable for events (NFC) adds 273c96845b5 [gn build] Add build files for CodeGen subfolders AsmPrinte [...] adds 7a711d40a87 [x86] add 32-bit RUN for tests and test with opaque constants; NFC adds 5d35502198f [DAGCombiner] re-enable truncation of binops adds 0f6ce82bae2 [COFF] Map truncated .eh_frame section name adds bdbf3db28d9 [X86] Add test for PR39926; NFC adds 4241727b057 [X86] Extend pfm counter coverage for llvm-exegesis adds 92938b14d1a [x86] don't try to convert add with undef operands to LEA adds 5a74b3f0955 [x86] regenerate test checks; NFC adds a34f510e3f6 Remove unneeded dependency from lib/Target/X86/Utils/ to li [...] adds b1f260ed6a6 [X86] If the carry input to an addcarry/subborrow intrinsic [...] adds 2806405bbbb [X86] Add some comments about when some X86 intrinsic autou [...] adds a44c6efbc06 Adding an STL-like type trait that is duplicated in multipl [...] adds 76db70958e4 Speculatively fixing the build; it seems add_pointer_t and [...] adds 10abda9baa7 [AMDGPU] Fix discarded result of addAttribute adds ff312308555 Re-commit "[IR] Add NODISCARD to attribute functions" adds dcf592e012f [bugpoint] Find 'opt', etc., in bugpoint directory adds 01342484a4c [TextAPI][elfabi] Make TBE handlers functions that return Errors adds 5b453c95cda [TextAPI][elfabi] Fix build by adding std::move() to r348735 adds 8778ec7d1ac [X86] Merge addcarryx/addcarry intrinsic into a single addc [...] adds 24a384d4a6c [CostModel][X86][AArch64] Adjust cost of the scalarization [...] adds 6fb7d81b31f [llvm-exegesis] Also check latency mode in local lit. adds 7d9496dddc0 [X86] Fix AvoidStoreForwardingBlocks pass for negative disp [...] adds 27f17bfee31 [DebugInfo] Emit undef DBG_VALUEs when SDNodes are optimised out adds 9a74554dbde [DebugInfo] Don't drop dbg.value's of nullptr adds c9d081f818f [AMDGPU] Add new Mode Register pass adds ebc58adabad [NFC][AArch64] Remove duplicate Arch list in target parser tests adds 981341ad1ab [DAGCombiner] Use the result value type in visitCONCAT_VECTORS adds caeeba232d7 [mips][mc] Emit R_{MICRO}MIPS_JALR when expanding jal to jalr adds 8a323ddcdbf [GlobalISel] Set stack protector index when translating Int [...] adds 6dbef07123c [AVX512] Update typo in comment adds 282d793c8d7 [DAGCombiner] Simplify test case from r348759 adds b167de5e721 [llvm-mca] Add new tests for Exynos (NFC) adds 67ce34f4c82 [AMDGPU] Add new Mode Register pass - minor fix adds e9458697d15 [AArch64] Refactor the scheduling predicates adds 2cce0fbee18 [x86] add tests for LowerVSETCC with min/max; NFC adds 760a278a3f5 [AMDGPU] Change the l1 flush instruction for AMDPAL/MESA3D. adds a138ea5c865 [AArch64] Refactor the Exynos scheduling predicates adds 2c91ebe7ab6 [x86] fix formatting; NFC adds 30304feabaa [DAGCombiner] Remove unnecessary recursive DAGCombiner::vis [...] adds 25b1ceb9a9b [docs] Add the new Objective-C ARC intrinsics to the LangRef. adds db716b5543c [TargetLowering] Add UNDEF folding to SimplifyDemandedVectorElts adds ee326d639ba [Hexagon] Add patterns for any_extend from i1 and short vec [...] adds e6fa3d9af74 [Hexagon] Check if operand is an immediate before getImm adds e7dca1ec056 [GlobalISel] Restrict G_MERGE_VALUES capability and replace [...] adds e3796d3637b APFloat: allow 64-bit of payload adds c50a94e6058 Revert "[Hexagon] Check if operand is an immediate before getImm" adds e744b686ed7 [Targets] Fixup incorrect targets in codemodel tests adds 34d87e26746 [InstCombine] add tests for movmsk (PR39927) NFC adds a71d0d5fdc6 InstCombine: Scalarize single use icmp/fcmp adds dec8ce2db26 [Hexagon] Couple of fixes in optimize addressing mode adds 9bd74f1b746 Fix LLVM_LINK_LLVM_DYLIB build of TapiTests adds f4e1f61f718 [Local] Promote an utility that could be used elsewhere. NFCI. adds e16f6c63725 debuginfo: Use symbol difference for CU length to simplify [...] adds 4dd6cea9c9d llvm-objcopy: Improve/simplify llvm::Error handling during [...] adds 2cc0a7da876 Follow-up fix to r348811 for null Errors (which is the case [...] adds 287d498bc54 [GISel]: Refactor MachineIRBuilder to allow passing additio [...] adds 2d92e554330 [WebAssembly] TargetStreamer cleanup (NFC) adds 06657362923 [TextAPI][elfabi] Make SoName optional adds a0ed8208bb3 [WebAssembly] Add '.eventtype' directive support adds 6f83e5dc25b [gn build] Add build files for AsmParser, MIRParser, IRRead [...] adds 0bedb1e0db7 [PPC][NFC] store operands are dst not src adds 905af46acf1 [X86] Switch the 64-bit mulx schedule test to use inline assembly. adds 48d92865105 Cleanup test case by removing unused attribute dso_local adds 04a8b2fd66b [DeadArgElim] Fixes for dbg.values using dead arg/return values adds a5966080ee2 Fix "not all control paths return a value" MSVC warnings. NFCI. adds 4653c9ad511 [TargetLowering] Add ISD::EXTRACT_VECTOR_ELT support to Sim [...] adds 98bfe1713fe [CodeGen] Allow mempcy/memset to generate small overlapping [...] adds 62c2d1d41ca Revert r348843 "[CodeGen] Allow mempcy/memset to generate s [...] adds f17041fa5fe [x86] remove dead code for 16-bit LEA formation; NFC adds 035816bdc54 [x86] clean up code for converting 16-bit ops to LEA; NFC adds dc4f26f687d Fix not correct imm operand assertion for SUB32ri in X86Con [...] adds cd44df213f5 [llvm-readelf] Add -e/--headers support to readobj/elf adds bcc30af6a16 [BDCE] Add tests for PR39771; NFC adds e1acf346170 [InstCombine] try to convert x86 movmsk intrinsic to generi [...] adds e7704dc3581 [XRay] Add a helper function sortByKey to simplify code adds e7e7fb51c9f [HotColdSplitting] Disable outlining landingpad instruction [...] adds 5ee81a74ae7 [COFF, ARM64] Emit COFF function header adds 601226c3cb9 [NewPM] fixing asserts on deleted loop in -print-after-all adds 640728dd1f4 [GISel]: Add MachineIRBuilder support for passing in Flags [...] adds 2070fbd1f36 [ConstantFolding] Handle leading zero-size elements in load [...] adds f4e6a8672c6 [Debuginfo] Prevent CodeGenPrepare from dropping debuginfo [...] adds 00e5580a4f1 [coroutines] Improve suspend point simplification adds 0a217d981bd Revert "debuginfo: Use symbol difference for CU length to [...] adds d3b7f7ddb3d [GISel] Add parentheses to an assert because gcc is mean. adds 76d28256919 [codeview] Look through typedefs in getCompleteTypeIndex adds d97e1b4060b [gn build] Add build files for Target/X86/... and for tools/llc adds 37778b4e9a1 Implement IMAGE_REL_AMD64_SECREL for RuntimeDyldCOFFX86_64 adds 2a3f739bfcc [gn build] Add build files for lib/LTO, lib/Linker, lib/Pas [...] adds 41d83afa975 [ConstantInt] Check active bits before calling getZExtValue. adds 49de0ec2379 [gn build] Add build files for DebugInfo/{DWARF,PDB}, Optio [...] adds 2ea818eba78 [X86] Add a few more fptosi test cases to demonstrate -x86- [...] adds db361aa2240 [X86] Combine vpmovdw+vpacksswb into vpmovdb. adds 8e3fdeb3b88 [Intrinsic] Signed Fixed Point Multiplication Intrinsic adds 14d714ee082 Fix compiler warning about unused variable [NFC] adds 8d6fd1c59f9 [mips] Use llvm-mc -triple option instead of combination of [...] adds 6a79f59563a [SystemZ] Minor cleanup of SchedModels adds 041c1c53bbe [ARM GlobalISel] Select load/store for Thumb2 adds a4a9a18651e [lit]Add llvm-readelf to tool substitutions adds a7da881aa56 [AMDGPU] Set metadata access for explicit section adds cc069de6144 Regenerate knownbits test. NFCI. adds 22530599026 [TargetLowering] Add ISD::AND handling to SimplifyDemandedV [...] adds 51d159e18a5 [AggressiveInstCombine] add tests for rotates with branch; NFC adds 2ba3294845d [mips] Enable using of integrated assembler in all cases. adds 4778d2ba930 [AMDGPU] Extend the SI Load/Store optimizer to combine more [...] adds e004ab80e86 [SampleFDO] Extend profile-sample-accurate option to cover [...] adds 9a395de086a [Unroll/UnrollAndJam/Vectorizer/Distribute] Add followup lo [...] adds e693cff4692 [gn build] Add all non-test build files for lld adds 2df5b9eb434 [x86] allow 8-bit adds to be promoted by convertToThreeAddr [...] adds 5c9590548d0 [docs] Use correct ending quotes. adds 0e2f8a90d54 [gn build] Merge r348944 adds 9959647664b [LV] Fix signed/unsigned comparison warning. adds 300b82ba47d [NVPTX] do not rely on cached subtarget info. If a module h [...] adds fc1180e8e32 [SelectionDAG] Add a generic isSplatValue function adds 3c673c91f27 llvm-dwarfdump: Dump array dimensions in stringified type names adds 7df42a61d3b [X86] Added missing constant pool checks. NFCI. adds b437e627517 [ConstantFold] Use getMinSignedBits for APInt in isIndexInR [...] adds e71d0e9b336 Fix Wdocumentation warning. NFCI. adds fb57712e281 [X86] Emit SBB instead of SETCC_CARRY from LowerSELECT. Bre [...] adds a3b074c09a5 DebugInfo/DWARF: Refactor getAttributeValueAsReferencedDie [...] adds 2448ff0ff15 DebugInfo/DWARF: Refactor type dumping to dump types, rathe [...] adds 68a1c8a3248 DebugInfo/DWARF: Improve dumping of pointers to members ('i [...] adds 8ae3c1c06af [AMDGPU] Emit MessagePack HSA Metadata for v3 code object adds ea364f34df0 DebugInfo/DWARF: Pretty print subroutine types adds 62feeed8d73 [X86] Added missing constant pool checks. NFCI. adds 304fa37d231 Support: use internal `call_once` on PPC64le adds b20ee3547fe [AMDGPU] Support for "uniform-work-group-size" attribute adds c1616bfa7d9 [X86] Move stack folding test for MULX to a MIR test. Add a [...] adds a6fbe3daaa9 Fix for llvm-dwarfdump changes for subroutine types adds 359ff84264b [X86] Don't emit MULX by default with BMI2 adds abbac34b178 [globalisel] Rename GISelChangeObserver's erasedInstr() to [...] adds d4415e86a15 [PhaseOrdering] add test for funnel shift (rotate); NFC adds f63bc5bda44 [hwasan] Android: Switch from TLS_SLOT_TSAN(8) to TLS_SLOT_ [...] adds 41e5cfd89ac [llvm-objcopy] Change Segment::Type from uint64_t to uint32_t adds 387b5efaea4 [InstCombine] Fix negative GEP offset evaluation for 32-bit [...] adds 2a694ffcc55 [LoopDeletion] Update debug values after loop deletion. adds 559201d0d7f [WebAssembly] Update dylink section parsing adds 9bd221575fd [globalisel] Add GISelChangeObserver::changingInstr() adds 082172353a9 [gn build] Fix defines define on Windows adds c94004ffdb1 [Support] Fix FileNameLength passed to SetFileInformationByHandle adds 874f1fc7510 [test] Add a set of test for constant folding deopt operand [...] adds 2ca3d46c8a2 [LoopUtils] Prefer a set over a map. NFCI. adds 064efeaec1f Revert r348645 - "[MemCpyOpt] memset->memcpy forwarding wit [...] adds bf39a84926c [AMDGPU] Simplify negated condition adds dc5e7871cf5 [AMDGPU] Fix build failure adds 532f7cc15ca [AMDGPU] Fix build failure, second attempt adds 221a20ff60a [X86] Remove assert leftover from when i1 was a legal type. [...] adds e735adba9b2 AMDGPU/GlobalISel: Test cleanups adds f2ca2facab5 AMDGPU/GlobalISel: RegBankSelect some simple operations adds 745a18ce26d Fix missing C++ mode comment in header adds e50f44d0a3f AMDGPU/GlobalISel: Legalize f64 fadd/fmul adds edeba790d74 [asan] Don't check ODR violations for particular types of globals adds cd253afe6f1 [CodeGen] Allow mempcy/memset to generate small overlapping [...] adds 5613e96f5a2 [AArch64] Catch some more CMN opportunities. adds 0f7dd077ce4 [RISCV] Add support for the various RISC-V FMA instruction [...] adds 8ab90583eeb [TargetLowering] Add ISD::ROTL/ROTR vector expansion adds 69dfdcbfa70 [ARM GlobalISel] Support exts and truncs for Thumb2 adds d1643f97ea2 [DAGCombine] Moved X86 rotate_amount % bitwidth == 0 early [...] adds cae6eb17b2e [PowerPC] intrinsic llvm.eh.sjlj.setjmp should not have fla [...] adds 514d2ac6ee6 [NFC][PowerPC] add verify-machineinstrs check adds 9027b88b63d [X86][BWI] Don't custom lower vXi8 rotations. adds a3836a558f3 [mir] Serialize DILocation inline when not possible to use [...] adds d7736b84c47 [SystemZ] Pass copy-hinted regs first from getRegAllocatio [...] adds 4a6ddb98afb [X86][SSE] Merge the vXi16/vXi32 vector rotation expansion [...] adds c8712c4ca0a [tblgen][disasm] Separate encodings from instructions adds a20dcc7643d [mir] Fix uninitialized variable in r349035 noticed by clan [...] adds 6250c9b5098 [PowerPC][NFC] Sorting out Pseudo related classes to avoid [...] adds cf52156a7d9 [Sparc] Use float register for integer constrained with "f" [...] adds 9dc429df9c4 Revert r349041: [tblgen][disasm] Separate encodings from in [...] adds 02083ba06c6 [X86][SSE] Fix modulo rotation amounts for v8i16/v16i16/v4i [...] adds 6c26f62b8b0 [Sparc] Add membar assembler tags adds aab76e7c51f [DAGCombiner] after simplifying demanded elements of vector [...] adds d2cb9435c71 [X86][SSE] Fix all remaining modulo vector rotation amounts [...] adds 0de7068d4e7 Recommit r349041: [tblgen][disasm] Separate encodings from [...] adds 82ad560a7e4 revert rL349051: [DAGCombiner] after simplifying demanded e [...] adds 77a2bc81a9b [X86][SSE] Add SSE vector imm/var shift support to Simplify [...] adds ad397e7b26b [DAGCombiner] after simplifying demanded elements of vector [...] adds 4e2709968cd [MachO][TLOF] Add support for local symbols in the indirect [...] adds 547b2b793df Correctly handle skewed streams in drop_front() method. adds befe7b1ade0 Don't add unnecessary compiler flags to llvm-config output adds 85d2ac25292 [LoopUtils] Use i32 instead of `void`. adds 1215e65a789 [CMake] llvm_codesign workaround for Xcode double-signing errors adds 4d8d496e939 [CostModel][X86] Don't count 2 shuffles on the last level o [...] adds 91c68851b70 [llvm-size][libobject] Add explicit "inTextSegment" methods [...] adds e08b71132a1 [llvm] Address base discriminator overflow in X86Discrimina [...] adds f1f1adc004a [ThinLTO] Compute synthetic function entry count adds 45be87d306a Reapply "[MemCpyOpt] memset->memcpy forwarding with undef tail" adds dfc96459648 AMDGPU/GlobalISel: Legalize/regbankselect block_addr adds cc31a27f1ef Revert r348971: [AMDGPU] Support for "uniform-work-group-si [...] adds acfb046e52c [SampleFDO] handle ProfileSampleAccurate when initializing [...] adds 55eb8feef89 [AArch64] Fix Exynos predicates (NFC) adds 9c11e2a771d Revert "[hwasan] Android: Switch from TLS_SLOT_TSAN(8) to T [...] adds 56a07a98f89 [X86] Demote EmitTest to a helper function of EmitCmp. Rout [...] adds 1b4867a8d93 [DAGCombiner] clean up visitEXTRACT_VECTOR_ELT adds 4a6dc2dde35 [gn build] Add infrastructure to create symlinks and use it [...] adds ee2b0072830 Silence CMP0048 warning in the benchmark utility library adds 6592c09789e [macho] save the SDK version stored in module metadata into [...] adds 0f4c901bc99 [llvm-xray] Support for PIE adds f4a9ec323e3 [gn build] Merge r348963 and r349076 adds 43a722e52d4 [llvm-xray] Store offset pointers in temporaries adds c8c5302c5bc [llvm-xray] Use correct variable name adds 4daae1f32d6 [Object] Rename getRelrRelocationType to getRelativeRelocationType adds 6ff010a6c21 [ThinLTO] Fix test added in rL349076 adds 97c14736286 [llvm-exegesis] Optimize ToProcess in dbScan adds 6d356c8850c [DAGCombiner][X86] Prevent visitSIGN_EXTEND from returning [...] adds a32130ae388 Revert rL349136: [llvm-exegesis] Optimize ToProcess in dbScan adds c25292edd5c [TableGen:AsmWriter] Cope with consecutive tied operands. adds f4f855ccc75 [ARM GlobalISel] Allow simple binary ops in Thumb2 adds 53a285d891c [ARM GlobalISel] Minor refactoring. NFCI adds bbcda06d822 [ARM GlobalISel] Remove duplicate test. NFCI adds 5e8ab563691 [ARM GlobalISel] Thumb2: casts between int and ptr adds 98689c01bbf [RegAllocGreedy] IMPLICIT_DEF values shouldn't prefer registers adds b9a4d1d36a5 Implement -frecord-command-line (-frecord-gcc-switches) adds 6fcb14e9a46 NFC. Adding an empty line to test the updated commit credentials. adds e5cda03ac45 [x86] make tests immune to scalarization improvements; NFC adds 29d34db322c [x86] regenerate test checks; NFC adds 0c4a33bebe9 [x86] auto-generate complete checks; NFC adds 3fcf2a43426 [Hexagon] make test immune to scalarization improvements; NFC adds 74af87e5079 [SystemZ] make test immune to scalarization improvements; NFC adds 2b3b9e148b4 Fix a crash in llvm-undname with invalid types. adds c0cd92909ef [AArch64] make test immune to scalarization improvements; NFC adds a9359267b4b [globalisel][combiner] Make the CombinerChangeObserver a Ma [...] adds dc7d02c770d [MS Demangler] Add a regression test for an invalid mangled name. adds d7f1cd2c3fe [MS Demangler] Fail gracefully on invalid pointer types. adds c681401eacc [Transforms] Preserve metadata when converting invoke to call. adds 00d521d2a05 Fix Visual Studio PointerIntPair visualizer adds 3a50d5b9126 [ADT] Fix bugs in SmallBitVector. adds 15e2a129d81 [globalisel][combiner] Fix r349167 for release mode bots adds dac6042d844 [x86] make tests immune to scalarization improvements; NFC adds b8a683696fe [ARM] make test immune to scalarization improvements; NFC adds 955eced56a3 [x86] add tests for extractelement of FP binops; NFC adds a5a1ebaef15 [TransformWarning] Do not warn missed transformations in op [...] adds f2511abd84e [AArch64] Simplify the scheduling predicates (NFC) adds cdc0cba7f3f [SDAG] Ignore chain operand in REG_SEQUENCE when emitting i [...] adds 56ea4893da5 Add missing includes and forward decls to unbreak build adds 0bbe50f2fb4 [AMDGPU] Promote constant offset to the immediate by findin [...] adds cba44d9b382 [Hexagon] Use IMPLICIT_DEF to any-extend 32-bit values to 64 bits adds 878b42a93b0 [GlobalISel] LegalizerHelper: Implement fewerElementsVector [...] new 36b8e0d064a Creating branches/google/stable and tags/google/stable/2018 [...]

The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: .gitignore | 2 + CMakeLists.txt | 38 +- CODE_OWNERS.TXT | 4 + CREDITS.TXT | 16 +- RELEASE_TESTERS.TXT | 4 +- bindings/go/llvm/ir.go | 14 +- bindings/ocaml/llvm/llvm.mli | 6 +- bindings/ocaml/llvm/llvm_ocaml.c | 7 +- cmake/config-ix.cmake | 8 +- cmake/modules/AddLLVM.cmake | 97 +- cmake/modules/CMakeLists.txt | 2 +- cmake/modules/HandleLLVMOptions.cmake | 29 +- cmake/modules/LLVMExternalProjectUtils.cmake | 29 +- cmake/modules/LLVMProcessSources.cmake | 17 +- cmake/platforms/WinMsvc.cmake | 24 +- docs/AMDGPUUsage.rst | 803 +- docs/AdvancedBuilds.rst | 10 + docs/Atomics.rst | 20 +- docs/BranchWeightMetadata.rst | 8 +- docs/BugLifeCycle.rst | 140 + docs/CodingStandards.rst | 15 + docs/CommandGuide/FileCheck.rst | 30 + docs/CommandGuide/llvm-cov.rst | 22 +- docs/CommandGuide/llvm-exegesis.rst | 9 +- docs/CommandGuide/llvm-mca.rst | 4 + docs/CommandGuide/tblgen.rst | 4 + docs/CompileCudaWithLLVM.rst | 41 +- docs/DeveloperPolicy.rst | 4 - docs/GarbageCollection.rst | 110 +- docs/HowToBuildWithPGO.rst | 163 + docs/LangRef.rst | 1537 +- docs/MIRLangRef.rst | 5 + docs/Passes.rst | 14 + docs/Phabricator.rst | 6 + docs/ProgrammersManual.rst | 25 +- docs/Proposals/TestSuite.rst | 321 + docs/ReleaseNotes.rst | 3 +- docs/SourceLevelDebugging.rst | 2 +- docs/StackMaps.rst | 7 +- docs/StackSafetyAnalysis.rst | 56 + docs/Statepoints.rst | 191 +- docs/TableGen/LangRef.rst | 49 +- docs/TransformMetadata.rst | 441 + docs/index.rst | 18 + docs/tutorial/BuildingAJIT1.rst | 396 +- docs/tutorial/BuildingAJIT2.rst | 347 +- .../BuildingAJIT/Chapter1/KaleidoscopeJIT.h | 91 +- .../Kaleidoscope/BuildingAJIT/Chapter1/toy.cpp | 149 +- .../BuildingAJIT/Chapter2/KaleidoscopeJIT.h | 104 +- .../Kaleidoscope/BuildingAJIT/Chapter2/toy.cpp | 151 +- .../BuildingAJIT/Chapter3/KaleidoscopeJIT.h | 10 +- .../BuildingAJIT/Chapter4/KaleidoscopeJIT.h | 8 +- .../BuildingAJIT/Chapter5/KaleidoscopeJIT.h | 8 +- examples/Kaleidoscope/Chapter9/toy.cpp | 5 +- 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| 43 +- lib/MC/MCParser/AsmParser.cpp | 37 +- lib/MC/MCParser/CMakeLists.txt | 1 + lib/MC/MCParser/DarwinAsmParser.cpp | 107 +- lib/MC/MCParser/ELFAsmParser.cpp | 3 + lib/MC/MCParser/MCAsmLexer.cpp | 1 + lib/MC/MCParser/MCAsmParser.cpp | 2 +- lib/MC/MCParser/WasmAsmParser.cpp | 145 + lib/MC/MCSectionELF.cpp | 3 + lib/MC/MCStreamer.cpp | 34 +- lib/MC/MCWasmStreamer.cpp | 2 +- lib/MC/MCWin64EH.cpp | 352 + lib/MC/MachObjectWriter.cpp | 23 +- lib/MC/WasmObjectWriter.cpp | 204 +- lib/Object/ArchiveWriter.cpp | 132 +- lib/Object/COFFObjectFile.cpp | 6 + lib/Object/ELF.cpp | 11 +- lib/Object/ModuleSymbolTable.cpp | 1 + lib/Object/Object.cpp | 8 +- lib/Object/ObjectFile.cpp | 8 + lib/Object/WasmObjectFile.cpp | 139 +- lib/Object/WindowsResource.cpp | 7 +- lib/ObjectYAML/CodeViewYAMLSymbols.cpp | 2 +- lib/ObjectYAML/ELFYAML.cpp | 10 + lib/ObjectYAML/WasmYAML.cpp | 41 +- lib/OptRemarks/CMakeLists.txt | 3 + lib/OptRemarks/LLVMBuild.txt | 22 + lib/OptRemarks/OptRemarksParser.cpp | 368 + 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| 14 + lib/Target/PowerPC/PPCInstrFormats.td | 21 +- lib/Target/PowerPC/PPCInstrHTM.td | 4 +- lib/Target/PowerPC/PPCInstrInfo.cpp | 110 +- lib/Target/PowerPC/PPCInstrInfo.h | 13 +- lib/Target/PowerPC/PPCInstrInfo.td | 374 +- lib/Target/PowerPC/PPCInstrQPX.td | 50 +- lib/Target/PowerPC/PPCInstrSPE.td | 10 +- lib/Target/PowerPC/PPCInstrVSX.td | 207 +- lib/Target/PowerPC/PPCPfmCounters.td | 19 + lib/Target/PowerPC/PPCPreEmitPeephole.cpp | 24 + lib/Target/PowerPC/PPCRegisterInfo.h | 2 - lib/Target/PowerPC/PPCSchedule.td | 5 +- lib/Target/PowerPC/PPCSchedule440.td | 11 +- lib/Target/PowerPC/PPCScheduleA2.td | 6 +- lib/Target/PowerPC/PPCScheduleE500.td | 8 +- lib/Target/PowerPC/PPCScheduleE500mc.td | 8 +- lib/Target/PowerPC/PPCScheduleE5500.td | 10 +- lib/Target/PowerPC/PPCScheduleG3.td | 3 +- lib/Target/PowerPC/PPCScheduleG4.td | 3 +- lib/Target/PowerPC/PPCScheduleG4Plus.td | 5 +- lib/Target/PowerPC/PPCScheduleG5.td | 5 +- lib/Target/PowerPC/PPCScheduleP7.td | 4 +- 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