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from b1aec70893f Fix non-determinism in Reassociate caused by address coincidences new 962427e90b0 [X86] Use movq for i64 atomic load on 32-bit targets when s [...] new 93b589a73da [X86] Use xmm registers to implement 64-bit popcnt on 32-bi [...] new 925f59138d8 [ARM] Don't form "ands" when it isn't scheduled correctly.
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Summary of changes: lib/Target/ARM/ARMBaseInstrInfo.cpp | 10 ++- lib/Target/X86/X86ISelLowering.cpp | 71 ++++++++++++++-- test/CodeGen/ARM/tst-peephole.mir | 54 ++++++++++++ test/CodeGen/X86/atomic-load-store-wide.ll | 38 ++++++++- test/CodeGen/X86/atomic-non-integer.ll | 50 ++--------- test/CodeGen/X86/popcnt.ll | 132 +++++++++++++++++++++++++++-- 6 files changed, 300 insertions(+), 55 deletions(-) create mode 100644 test/CodeGen/ARM/tst-peephole.mir