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from d64e8e12247 Fortran/OpenMP: Add parsing support for allocators/allocate [...] new 25907509787 RISC-V: Add autovec sign/zero extension and truncation. new a1b23dcf233 RISC-V: Implement autovec abs, vneg, vnot.
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Summary of changes: gcc/config/riscv/autovec.md | 145 +++++++++++++++++++++ gcc/config/riscv/riscv-protos.h | 6 + gcc/config/riscv/riscv-v.cc | 98 ++++++++++++++ gcc/config/riscv/riscv.cc | 29 +++++ gcc/config/riscv/vector-iterators.md | 33 ++++- .../riscv/rvv/autovec/binop/shift-rv32gcv.c | 1 - .../riscv/rvv/autovec/binop/shift-rv64gcv.c | 5 +- .../gcc.target/riscv/rvv/autovec/binop/vdiv-run.c | 4 +- .../riscv/rvv/autovec/binop/vdiv-rv32gcv.c | 7 +- .../riscv/rvv/autovec/binop/vdiv-rv64gcv.c | 7 +- .../riscv/rvv/autovec/binop/vdiv-template.h | 5 +- .../riscv/rvv/autovec/binop/vrem-rv32gcv.c | 7 +- .../riscv/rvv/autovec/binop/vrem-rv64gcv.c | 7 +- .../riscv/rvv/autovec/conversions/vncvt-run.c | 35 +++++ .../vmul-rv32gcv.c => conversions/vncvt-rv32gcv.c} | 4 +- .../vmul-rv64gcv.c => conversions/vncvt-rv64gcv.c} | 4 +- .../riscv/rvv/autovec/conversions/vncvt-template.h | 19 +++ .../riscv/rvv/autovec/conversions/vsext-run.c | 35 +++++ .../riscv/rvv/autovec/conversions/vsext-rv32gcv.c | 8 ++ .../riscv/rvv/autovec/conversions/vsext-rv64gcv.c | 8 ++ .../riscv/rvv/autovec/conversions/vsext-template.h | 19 +++ .../riscv/rvv/autovec/conversions/vzext-run.c | 35 +++++ .../riscv/rvv/autovec/conversions/vzext-rv32gcv.c | 8 ++ .../riscv/rvv/autovec/conversions/vzext-rv64gcv.c | 8 ++ .../riscv/rvv/autovec/conversions/vzext-template.h | 19 +++ .../gcc.target/riscv/rvv/autovec/unop/abs-run.c | 39 ++++++ .../riscv/rvv/autovec/unop/abs-rv32gcv.c | 8 ++ .../riscv/rvv/autovec/unop/abs-rv64gcv.c | 8 ++ .../riscv/rvv/autovec/unop/abs-template.h | 26 ++++ .../gcc.target/riscv/rvv/autovec/unop/vneg-run.c | 29 +++++ .../{binop/vmul-rv32gcv.c => unop/vneg-rv32gcv.c} | 4 +- .../{binop/vmul-rv64gcv.c => unop/vneg-rv64gcv.c} | 4 +- .../riscv/rvv/autovec/unop/vneg-template.h | 18 +++ .../gcc.target/riscv/rvv/autovec/unop/vnot-run.c | 43 ++++++ .../{binop/vmul-rv32gcv.c => unop/vnot-rv32gcv.c} | 4 +- .../{binop/vmul-rv64gcv.c => unop/vnot-rv64gcv.c} | 4 +- .../riscv/rvv/autovec/unop/vnot-template.h | 22 ++++ .../riscv/rvv/autovec/zve32f_zvl128b-2.c | 2 +- .../riscv/rvv/autovec/zve32x_zvl128b-2.c | 2 +- .../gcc.target/riscv/rvv/autovec/zve64d-2.c | 2 +- .../gcc.target/riscv/rvv/autovec/zve64f-2.c | 2 +- .../gcc.target/riscv/rvv/autovec/zve64x-2.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 4 + .../gcc.target/riscv/rvv/vsetvl/avl_single-38.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/avl_single-47.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/avl_single-48.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/avl_single-49.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_switch-8.c | 2 +- 48 files changed, 742 insertions(+), 47 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vncvt-run.c copy gcc/testsuite/gcc.target/riscv/rvv/autovec/{binop/vmul-rv32gcv.c => conversio [...] copy gcc/testsuite/gcc.target/riscv/rvv/autovec/{binop/vmul-rv64gcv.c => conversio [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vncvt-te [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vsext-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vsext-rv32gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vsext-rv64gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vsext-te [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vzext-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vzext-rv32gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vzext-rv64gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vzext-te [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/abs-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/abs-rv32gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/abs-rv64gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/abs-template.h create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vneg-run.c copy gcc/testsuite/gcc.target/riscv/rvv/autovec/{binop/vmul-rv32gcv.c => unop/vneg [...] copy gcc/testsuite/gcc.target/riscv/rvv/autovec/{binop/vmul-rv64gcv.c => unop/vneg [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vneg-template.h create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vnot-run.c copy gcc/testsuite/gcc.target/riscv/rvv/autovec/{binop/vmul-rv32gcv.c => unop/vnot [...] copy gcc/testsuite/gcc.target/riscv/rvv/autovec/{binop/vmul-rv64gcv.c => unop/vnot [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vnot-template.h