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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-arm-bootstrap_O3 in repository toolchain/ci/gcc.
from 1eccf995561 i386: Require OPTION_MASK_ISA_SSE2 for __builtin_ia32_movq1 [...] adds 20c6c0c8b18 xtensa: backport fix for PR target/91880 adds 79b59676531 xtensa: backport fix for PR target/94584 adds d998a89f9c5 Daily bump. adds 0f1cf13ecee middle-end/94479 - fix gimplification of address adds baf3a5a9424 Fix target/94557 PowerPC regression on GCC 9 (variable vec_ [...] adds 3c5d3cc15a5 Daily bump. adds a809efd70d1 Fix PR94043 by making vect_live_op generate lc-phi adds 7bce1c72444 Fix PR94443 with gsi_insert_seq_before [PR94443]
No new revisions were added by this update.
Summary of changes: gcc/ChangeLog | 53 ++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/rs6000/rs6000.c | 13 ++++-- gcc/config/xtensa/xtensa.c | 5 +- gcc/config/xtensa/xtensa.md | 6 +-- gcc/gimplify.c | 4 +- gcc/testsuite/ChangeLog | 40 ++++++++++++++++ gcc/testsuite/gcc.dg/torture/pr94479.c | 12 +++++ gcc/testsuite/gcc.dg/vect/pr94443.c | 13 ++++++ gcc/testsuite/gcc.target/xtensa/pr91880.c | 10 ++++ gcc/testsuite/gcc.target/xtensa/pr94584.c | 24 ++++++++++ gcc/testsuite/gcc.target/xtensa/xtensa.exp | 41 +++++++++++++++++ .../gfortran.dg/graphite/vect-pr94043.f90 | 18 ++++++++ gcc/tree-vect-loop.c | 50 +++++++++++++++++--- 14 files changed, 275 insertions(+), 16 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/torture/pr94479.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr94443.c create mode 100644 gcc/testsuite/gcc.target/xtensa/pr91880.c create mode 100644 gcc/testsuite/gcc.target/xtensa/pr94584.c create mode 100644 gcc/testsuite/gcc.target/xtensa/xtensa.exp create mode 100644 gcc/testsuite/gfortran.dg/graphite/vect-pr94043.f90