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from a93d7f2 * doc/invoke.texi (Language Independent Options): Rename nod [...] new 0146686 gcc/ChangeLog:
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Summary of changes: gcc/ChangeLog | 43 ++++ gcc/config/aarch64/aarch64-builtins.c | 30 ++- gcc/config/aarch64/aarch64-simd-builtins.def | 12 +- gcc/config/aarch64/aarch64-simd.md | 72 +++--- gcc/config/aarch64/arm_neon.h | 276 +++++++++++---------- gcc/testsuite/ChangeLog | 267 ++++++++++++++++++++ .../advsimd-intrinsics/vld2_lane_f32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld2_lane_f64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld2_lane_p8_indices_1.c | 16 ++ .../advsimd-intrinsics/vld2_lane_s16_indices_1.c | 16 ++ .../advsimd-intrinsics/vld2_lane_s32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld2_lane_s64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld2_lane_s8_indices_1.c | 16 ++ .../advsimd-intrinsics/vld2_lane_u16_indices_1.c | 16 ++ .../advsimd-intrinsics/vld2_lane_u32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld2_lane_u64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld2_lane_u8_indices_1.c | 16 ++ .../advsimd-intrinsics/vld2q_lane_f32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld2q_lane_f64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld2q_lane_p8_indices_1.c | 17 ++ .../advsimd-intrinsics/vld2q_lane_s16_indices_1.c | 16 ++ .../advsimd-intrinsics/vld2q_lane_s32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld2q_lane_s64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld2q_lane_s8_indices_1.c | 17 ++ .../advsimd-intrinsics/vld2q_lane_u16_indices_1.c | 16 ++ .../advsimd-intrinsics/vld2q_lane_u32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld2q_lane_u64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld2q_lane_u8_indices_1.c | 17 ++ .../advsimd-intrinsics/vld3_lane_f32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld3_lane_f64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld3_lane_p8_indices_1.c | 16 ++ .../advsimd-intrinsics/vld3_lane_s16_indices_1.c | 16 ++ .../advsimd-intrinsics/vld3_lane_s32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld3_lane_s64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld3_lane_s8_indices_1.c | 16 ++ .../advsimd-intrinsics/vld3_lane_u16_indices_1.c | 16 ++ .../advsimd-intrinsics/vld3_lane_u32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld3_lane_u64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld3_lane_u8_indices_1.c | 16 ++ .../advsimd-intrinsics/vld3q_lane_f32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld3q_lane_f64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld3q_lane_p8_indices_1.c | 17 ++ .../advsimd-intrinsics/vld3q_lane_s16_indices_1.c | 16 ++ .../advsimd-intrinsics/vld3q_lane_s32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld3q_lane_s64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld3q_lane_s8_indices_1.c | 17 ++ .../advsimd-intrinsics/vld3q_lane_u16_indices_1.c | 16 ++ .../advsimd-intrinsics/vld3q_lane_u32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld3q_lane_u64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld3q_lane_u8_indices_1.c | 17 ++ .../advsimd-intrinsics/vld4_lane_f32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld4_lane_f64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld4_lane_p8_indices_1.c | 16 ++ .../advsimd-intrinsics/vld4_lane_s16_indices_1.c | 16 ++ .../advsimd-intrinsics/vld4_lane_s32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld4_lane_s64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld4_lane_s8_indices_1.c | 16 ++ .../advsimd-intrinsics/vld4_lane_u16_indices_1.c | 16 ++ .../advsimd-intrinsics/vld4_lane_u32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld4_lane_u64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld4_lane_u8_indices_1.c | 16 ++ .../advsimd-intrinsics/vld4q_lane_f32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld4q_lane_f64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld4q_lane_p8_indices_1.c | 17 ++ .../advsimd-intrinsics/vld4q_lane_s16_indices_1.c | 16 ++ .../advsimd-intrinsics/vld4q_lane_s32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld4q_lane_s64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld4q_lane_s8_indices_1.c | 17 ++ .../advsimd-intrinsics/vld4q_lane_u16_indices_1.c | 16 ++ .../advsimd-intrinsics/vld4q_lane_u32_indices_1.c | 16 ++ .../advsimd-intrinsics/vld4q_lane_u64_indices_1.c | 17 ++ .../advsimd-intrinsics/vld4q_lane_u8_indices_1.c | 17 ++ .../advsimd-intrinsics/vst2_lane_f32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst2_lane_f64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst2_lane_p8_indices_1.c | 15 ++ .../advsimd-intrinsics/vst2_lane_s16_indices_1.c | 15 ++ .../advsimd-intrinsics/vst2_lane_s32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst2_lane_s64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst2_lane_s8_indices_1.c | 15 ++ .../advsimd-intrinsics/vst2_lane_u16_indices_1.c | 15 ++ .../advsimd-intrinsics/vst2_lane_u32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst2_lane_u64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst2_lane_u8_indices_1.c | 15 ++ .../advsimd-intrinsics/vst2q_lane_f32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst2q_lane_f64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst2q_lane_p8_indices_1.c | 16 ++ .../advsimd-intrinsics/vst2q_lane_s16_indices_1.c | 15 ++ .../advsimd-intrinsics/vst2q_lane_s32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst2q_lane_s64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst2q_lane_s8_indices_1.c | 16 ++ .../advsimd-intrinsics/vst2q_lane_u16_indices_1.c | 15 ++ .../advsimd-intrinsics/vst2q_lane_u32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst2q_lane_u64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst2q_lane_u8_indices_1.c | 16 ++ .../advsimd-intrinsics/vst3_lane_f32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst3_lane_f64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst3_lane_p8_indices_1.c | 15 ++ .../advsimd-intrinsics/vst3_lane_s16_indices_1.c | 15 ++ .../advsimd-intrinsics/vst3_lane_s32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst3_lane_s64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst3_lane_s8_indices_1.c | 15 ++ .../advsimd-intrinsics/vst3_lane_u16_indices_1.c | 15 ++ .../advsimd-intrinsics/vst3_lane_u32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst3_lane_u64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst3_lane_u8_indices_1.c | 15 ++ .../advsimd-intrinsics/vst3q_lane_f32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst3q_lane_f64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst3q_lane_p8_indices_1.c | 16 ++ .../advsimd-intrinsics/vst3q_lane_s16_indices_1.c | 15 ++ .../advsimd-intrinsics/vst3q_lane_s32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst3q_lane_s64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst3q_lane_s8_indices_1.c | 16 ++ .../advsimd-intrinsics/vst3q_lane_u16_indices_1.c | 15 ++ .../advsimd-intrinsics/vst3q_lane_u32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst3q_lane_u64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst3q_lane_u8_indices_1.c | 16 ++ .../advsimd-intrinsics/vst4_lane_f32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst4_lane_f64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst4_lane_p8_indices_1.c | 15 ++ .../advsimd-intrinsics/vst4_lane_s16_indices_1.c | 15 ++ .../advsimd-intrinsics/vst4_lane_s32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst4_lane_s64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst4_lane_s8_indices_1.c | 15 ++ .../advsimd-intrinsics/vst4_lane_u16_indices_1.c | 15 ++ .../advsimd-intrinsics/vst4_lane_u32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst4_lane_u64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst4_lane_u8_indices_1.c | 15 ++ .../advsimd-intrinsics/vst4q_lane_f32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst4q_lane_f64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst4q_lane_p8_indices_1.c | 16 ++ .../advsimd-intrinsics/vst4q_lane_s16_indices_1.c | 15 ++ .../advsimd-intrinsics/vst4q_lane_s32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst4q_lane_s64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst4q_lane_s8_indices_1.c | 16 ++ .../advsimd-intrinsics/vst4q_lane_u16_indices_1.c | 15 ++ .../advsimd-intrinsics/vst4q_lane_u32_indices_1.c | 15 ++ .../advsimd-intrinsics/vst4q_lane_u64_indices_1.c | 16 ++ .../advsimd-intrinsics/vst4q_lane_u8_indices_1.c | 16 ++ 138 files changed, 2621 insertions(+), 179 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_p [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_p [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_p [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_p [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_ [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_p [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u [...] create mode 100644 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