[Tcwg-commits] [llvm] branch master updated (415c6676800 -> 0f194333896)

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from 415c6676800 [DAGCombiner] Add another combine from build vector to shuffle new 0f194333896 [AArch64] Preserve register flags when promoting a load fro [...]

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Summary of changes: lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp | 7 ++++--- test/CodeGen/AArch64/ldst-opt.mir | 20 +++++++++++++++++++- 2 files changed, 23 insertions(+), 4 deletions(-)