This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_build/master-arm in repository toolchain/ci/glibc.
from dc30acf20b debug: make __read_chk a cancellation point (bug 29274) adds dd06af4f81 stdlib: Remove trailing whitespace from Makefile adds 464d189b96 stdlib: Remove attr_write from mbstows if dst is NULL [BZ: 29265] adds 703f434108 x86: Add defines / utilities for making ISA specific x86 builds adds 3edda6a0f0 x86: Add support for compiling {raw|w}memchr with high ISA level adds 3079f652d7 x86: Replace all sse instructions with vex equivilent in avx+ files new 220b83d83d stdlib: Fixup mbstowcs NULL __dst handling. [BZ #29279]
The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: stdlib/Makefile | 5 +- stdlib/bits/stdlib.h | 14 +- stdlib/testmb.c | 7 + sysdeps/x86/init-arch.h | 4 +- sysdeps/x86/isa-ifunc-macros.h | 70 ++++ sysdeps/x86/isa-level.c | 17 +- sysdeps/x86/isa-level.h | 102 ++++++ .../x86_64/fpu/multiarch/svml_d_acos4_core_avx2.S | 4 +- .../fpu/multiarch/svml_d_acos8_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_d_acosh4_core_avx2.S | 4 +- .../fpu/multiarch/svml_d_acosh8_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_d_asin4_core_avx2.S | 4 +- .../fpu/multiarch/svml_d_asin8_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_d_asinh4_core_avx2.S | 4 +- .../fpu/multiarch/svml_d_asinh8_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_d_atan24_core_avx2.S | 6 +- .../fpu/multiarch/svml_d_atan28_core_avx512.S | 6 +- .../x86_64/fpu/multiarch/svml_d_atanh4_core_avx2.S | 4 +- .../fpu/multiarch/svml_d_atanh8_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_d_cbrt4_core_avx2.S | 4 +- .../x86_64/fpu/multiarch/svml_d_cosh4_core_avx2.S | 4 +- .../fpu/multiarch/svml_d_cosh8_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_d_erfc4_core_avx2.S | 4 +- .../fpu/multiarch/svml_d_erfc8_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_d_exp104_core_avx2.S | 4 +- .../fpu/multiarch/svml_d_exp108_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_d_exp24_core_avx2.S | 4 +- .../fpu/multiarch/svml_d_exp28_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_d_expm14_core_avx2.S | 4 +- .../fpu/multiarch/svml_d_expm18_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_d_hypot4_core_avx2.S | 6 +- .../fpu/multiarch/svml_d_hypot8_core_avx512.S | 6 +- .../x86_64/fpu/multiarch/svml_d_log104_core_avx2.S | 4 +- .../fpu/multiarch/svml_d_log108_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_d_log1p4_core_avx2.S | 4 +- .../fpu/multiarch/svml_d_log1p8_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_d_log24_core_avx2.S | 4 +- .../fpu/multiarch/svml_d_log28_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_d_sinh4_core_avx2.S | 4 +- .../fpu/multiarch/svml_d_sinh8_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_d_tan4_core_avx2.S | 4 +- .../x86_64/fpu/multiarch/svml_d_tan8_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_d_tanh4_core_avx2.S | 6 +- .../fpu/multiarch/svml_d_tanh8_core_avx512.S | 4 +- .../fpu/multiarch/svml_s_acosf16_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_s_acosf8_core_avx2.S | 4 +- .../fpu/multiarch/svml_s_acoshf16_core_avx512.S | 4 +- .../fpu/multiarch/svml_s_acoshf8_core_avx2.S | 4 +- .../fpu/multiarch/svml_s_asinf16_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_s_asinf8_core_avx2.S | 4 +- .../fpu/multiarch/svml_s_asinhf16_core_avx512.S | 4 +- .../fpu/multiarch/svml_s_asinhf8_core_avx2.S | 4 +- .../fpu/multiarch/svml_s_atan2f16_core_avx512.S | 6 +- .../fpu/multiarch/svml_s_atan2f8_core_avx2.S | 6 +- .../fpu/multiarch/svml_s_atanhf16_core_avx512.S | 4 +- .../fpu/multiarch/svml_s_atanhf8_core_avx2.S | 4 +- .../x86_64/fpu/multiarch/svml_s_cbrtf8_core_avx2.S | 4 +- .../fpu/multiarch/svml_s_coshf16_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_s_coshf8_core_avx2.S | 4 +- .../fpu/multiarch/svml_s_erfcf16_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_s_erfcf8_core_avx2.S | 4 +- .../fpu/multiarch/svml_s_exp10f16_core_avx512.S | 4 +- .../fpu/multiarch/svml_s_exp10f8_core_avx2.S | 4 +- .../fpu/multiarch/svml_s_exp2f16_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_s_exp2f8_core_avx2.S | 4 +- .../fpu/multiarch/svml_s_expm1f16_core_avx512.S | 4 +- .../fpu/multiarch/svml_s_expm1f8_core_avx2.S | 4 +- .../fpu/multiarch/svml_s_hypotf16_core_avx512.S | 6 +- .../fpu/multiarch/svml_s_hypotf8_core_avx2.S | 6 +- .../fpu/multiarch/svml_s_log10f16_core_avx512.S | 4 +- .../fpu/multiarch/svml_s_log10f8_core_avx2.S | 4 +- .../fpu/multiarch/svml_s_log1pf16_core_avx512.S | 4 +- .../fpu/multiarch/svml_s_log1pf8_core_avx2.S | 4 +- .../fpu/multiarch/svml_s_log2f16_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_s_log2f8_core_avx2.S | 4 +- .../fpu/multiarch/svml_s_sinhf16_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_s_sinhf8_core_avx2.S | 4 +- .../fpu/multiarch/svml_s_tanf16_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_s_tanf8_core_avx2.S | 4 +- .../fpu/multiarch/svml_s_tanhf16_core_avx512.S | 4 +- .../x86_64/fpu/multiarch/svml_s_tanhf8_core_avx2.S | 4 +- sysdeps/x86_64/isa-default-impl.h | 59 ++++ sysdeps/x86_64/memchr.S | 357 +------------------- sysdeps/x86_64/multiarch/ifunc-evex.h | 29 +- sysdeps/x86_64/multiarch/ifunc-impl-list.c | 72 ++-- sysdeps/x86_64/multiarch/memchr-avx2.S | 5 +- sysdeps/x86_64/multiarch/memchr-evex.S | 5 +- sysdeps/x86_64/multiarch/memchr-sse2.S | 363 ++++++++++++++++++++- sysdeps/x86_64/multiarch/rawmemchr-avx2.S | 7 +- sysdeps/x86_64/multiarch/rawmemchr-evex.S | 7 +- sysdeps/x86_64/multiarch/rawmemchr-sse2.S | 198 ++++++++++- .../multiarch/rtld-memchr.S} | 4 +- .../multiarch/rtld-rawmemchr.S} | 4 +- sysdeps/x86_64/multiarch/strrchr-avx2.S | 2 +- sysdeps/x86_64/multiarch/wmemchr-avx2.S | 7 +- sysdeps/x86_64/multiarch/wmemchr-evex.S | 7 +- sysdeps/x86_64/multiarch/wmemchr-sse2.S | 9 +- sysdeps/x86_64/rawmemchr.S | 184 +---------- .../{pthread/tst-atfork3mod.c => x86_64/wmemchr.S} | 34 +- 99 files changed, 1077 insertions(+), 809 deletions(-) create mode 100644 sysdeps/x86/isa-ifunc-macros.h create mode 100644 sysdeps/x86/isa-level.h create mode 100644 sysdeps/x86_64/isa-default-impl.h copy sysdeps/{powerpc/powerpc64/multiarch/rtld-strcspn.c => x86_64/multiarch/rtld- [...] copy sysdeps/{powerpc/powerpc64/multiarch/rtld-strcspn.c => x86_64/multiarch/rtld- [...] copy sysdeps/{pthread/tst-atfork3mod.c => x86_64/wmemchr.S} (68%)