[Tcwg-commits] [llvm] branch stable updated (5f6bfbd1c49 -> 452fac1bdef)

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from 5f6bfbd1c49 Updating branches/google/stable to r298696 adds c85444ebf66 Remove stale and unused (MC)TargetOptions comparators. adds 54c10c042d1 Don't build up std::vectors with constant sizes when an arr [...] adds 1dd3d84b802 Make GCC happy again. adds 01a5eed38e3 Another instance where GCC doesn't understand implicit cons [...] adds ce91f536880 [X86][SSE] Generalised lowerTruncate by PACKSS to work with [...] adds 7a6e6b169d1 stable-merge-request.sh: Add a script for submitting merge [...] adds 4ec90bf9eab [AMDGPU] Add a new line after a debug message adds 5792952b40c [AMDGPU] Fix SGPR usage count in SI scheduler adds bab6d5ee26b [InstCombine] Provide a way to calculate KnownZero/One for [...] adds ab5b354a110 [X86][SSE] Add ashr + mask test cases. adds d6031923302 [PDB] Split item and type records when merging type streams adds 80aca9b9aac [AMDGPU] Remove double map lookups in SI scheduler adds 65bb8eff359 [AMDGPU] Don't enforce constexpr, there are still old stand [...] adds cf5d3caaabb [ThinLTO] Correct counting of functions in inliner stats adds 30b1056d8fd [AMDGPU] Add AMDGPUAliasAnalysis to opt pipeline adds 1007ee7060d [AMDGPU] Rename Kind to ValueKind in metadata to be consistent adds a332f465b26 [AMDGPU] Fold V_CNDMASK with identical source operands adds a640c061b8e TTI: Split IsSimple in MemIntrinsicInfo adds f9d04c6fdc5 AMDGPU: Fold rcp/rsq of undef to undef adds c1124f1e805 Make testcase less nonsensical while still exercising the s [...] adds b3204c752ed Revert r298652 on Quentin's request adds 876bc454208 AMDGPU: Unify divergent function exits. adds d4f64851739 AMDGPU: Implement f16 fround adds 3685331284e [asan] Delay creation of asan ctor. adds 122446a9160 Document how to fetch monorepo SVN revision notes adds ee343dc1d15 [Outliner] Remove no red zone requirment for AArch64 adds 76f79b89349 Revert r298620: [LV] Vectorize GEPs adds a7925b808d3 [MachineScheduler] Add missing machine pass dependency. adds a9597509395 AMDGPU: Fix annotating loops with nested loop conditions adds 4712ec63c2b Move spill size and alignment info from MC to TargetRegisterInfo adds a149d64a7e9 [libFuzzer] honor -exact_artifact_path for all intermediate [...] adds 026cdd9de14 [x86] add 32-bit RUN for better memcmp coverage; NFC adds 7ebd1797a39 Revert r298711 "[InstCombine] Provide a way to calculate Kn [...] adds e1646b6e514 [libFuzzer] be more careful when calling strlen of strcmp p [...] adds 6bf738a1c88 [Outliner] Revert r298734. adds 4b2847eaf84 [codeview] Don't assert when the user violates the ODR adds a31a2f7e7b6 Apply clang-format as commented in D31311. NFCI. adds fb446bff1e7 [ARM] Fix mixup between Lo and Hi in SMLALBB formation. adds 2061be0b303 [libFuzzer] read asan's dedup_token while minimizing a cras [...] adds 261cb614ef2 [asan] Put ctor/dtor in comdat. adds cc4a0d11e4d [libFuzzer] Fix test on Windows. adds d81243066b6 [AMDGPU] Switch data layout by triple environment amdgiz adds b47fa05ce54 [NewGVN] Adjust NDEBUG markers. adds fb5242baa3d [AArch64] Refine Falkor Machine Model - Part1 adds da174a7f04d [InstCombine] Change the interface of SimplifyDemandedBits [...] adds ea4d19ebb3e [X86][SSE] Add extra computeNumSignBits test case for D31311. adds a39e64c0aa1 [x86] use PMOVMSK to replace memcmp libcalls for 16-byte equality adds 4671240f7db [X86][SSE] Generalised CMP+AND1 combine to ZERO/ALLBITS+MASK adds 284e861f70f [X86][SSE] Added ComputeNumSignBitsForTargetNode support fo [...] adds d8caf85d6db Change the default attributes for llvm.prefetch to inaccess [...] adds f47742a1840 [X86][SSE] Combine (VSRLI (VSRAI X, Y), (NumSignBits-1)) -> [...] adds d7e1b091d09 [X86] Pull out repeated ScalarValueSizeInBits code. NFCI. adds 627e0f9985f [IR] Make SwitchInst::CaseIt almost a normal iterator. adds c61c2fdaeaa Add check for BSD when setting LIB_NAMES for GNU ld adds 3d72b708423 Split the SimplifyCFG pass into two variants. adds 7733e74e545 [GlobalISel][X86] support G_FRAME_INDEX instruction selection. adds 9d6e3e4b1e6 Regenerate tests to remove duplicated checks adds a67830be67a Regenerate test adds 356599a5325 Regenerate test adds 29226b40633 Fix MSVC signed/unsigned comparison warnings. adds acbed126667 [X86][AVX512F] Fix reg class for VMOVSSZrr/VMOVSSZrrk and V [...] adds 1dc69d0cabe [X86][SSE] Add computeKnownBitsForTargetNode support for (V [...] adds 00c788d0683 Fix signed/unsigned comparison warnings. adds c068dfa8712 [IR] Switch to more normal template parameter names ending [...] adds 9f6d8acec16 [LoopUnroll] Remap references in peeled iteration adds 87a993d16b6 [llvm-readobj] Prefer ILT to IAT for reading COFF imports adds 4e72658b4f4 Fix signed/unsigned comparison warnings. adds f8ac651af5a Fix typo in comment; NFC adds df70a930f47 [MachineScheduler] Reference the correct header. adds 6a175e4bb1f [Target] Remove some code probably copy/pasted from another [...] adds 8a88c236128 [IR] Make Instruction::isAssociative method inline. Add LLV [...] adds 170b761d4e7 [IR] Share implementation of pairs of const and non-const m [...] adds 4f2f5a394ae [IR] Share implementation for pairs of const and non-const [...] adds 306a7df3fbd [IR] Implement pairs of non-const and const methods using t [...] adds f6c7abbfd1c [TableGen] Make CodeGenMapTable understand the namespace fi [...] adds cd2a3f9e73d [X86][AVX2] bugzilla bug 21281 Performance regression in ve [...] adds acec6edc61c ADT: Add range helpers for pointer_ and pointee_iterator adds d5d860727bf [tablegen] Use categories on options that only matter to on [...] adds df544d6b0bc Correct OptionCategoryCompare() in the command line library. adds e8b81e06e1b [InstCombine] Avoid incorrect folding of select into phi no [...] adds ab3be33d40c [AMDGPU] Get address space mapping by target triple environment adds c7506ed1245 [AArch64] Mark mrs of TPIDR_EL0 (thread pointer) as not hav [...] adds cb5431a9315 [AMDGPU][MC] Fix for Bug 28207 + LIT tests adds 460b7329102 [GlobalISel][AArch64] Use proper constant types in test. NFC. adds fb6a2d6627b [GlobalISel] Add a 'getConstantVRegVal' helper. adds 2597299d8e5 [GlobalISel][AArch64] Select CBZ. adds 2a867a816ec [AMDGPU] Fix SI scheduler LiveOut Refcount issue adds 82ba8a62686 [APInt] Move the >64 bit case for flipAllBits out of line. adds 96f1d455e70 [AMDGPU] SISched: Update colorEndsAccordingToDependencies adds 3d5ea4cd131 [GlobalISel][AArch64] Select store of zero to WZR/XZR. adds db6b71ba795 [GlobalISel][AArch64] Fold G_GEP into LDR/STR ui addressing mode. adds 97874bddd63 [GlobalISel][AArch64] Fold FI into LDR/STR ui addressing mode. adds 573d120591e Remove unneccessary virtual destructor from DwarfExpression. adds 91a21c4db64 Remove redundant check for nullptr. adds 31355ac4355 [APInt] Use memset in setAllBits. adds c53cf7e424b [GlobalISel][AArch64] Extract a variable out of an NDEBUG b [...] adds 0532ee926c2 [APInt] Move operator&=(uint64_t) inline and use memset to [...] adds fa92ec8e9e5 [Support] Avoid concurrency hazard in signal handler registration adds bc04e5d6d23 [AMDGPU] SISched: Detect dependency types between blocks adds daa7fe44b1f [TableGen] Print #nnn as a name of an non-native reg unit w [...] adds 28ec1cc8922 [APInt] Move operator=(uint64_t) inline as its pretty simpl [...] adds fcdf36fabb6 [LV] Transform truncations of non-primary induction variables adds 3903b47a909 Add the error handling for Mach-O dyld compact lazy bind, w [...] adds 47652291c2d Improve machine schedulers for in-order processors adds 26cbef5f441 [libfuzzer] Remove XFAIL for OutOfMemory test. adds 92ef0d20782 [ARM] Mark falky test unsupported until we find the cause adds 617b05090f6 Remove an oddly unnecessary temporary. adds 3c1e4143bab Revert "[asan] Put ctor/dtor in comdat." adds af689e8d8ff Revert "[asan] Delay creation of asan ctor." adds 38ca8aac82d [APInt] Move the single word cases of the bitwise operators [...] adds c0fa0b75733 CodeGen : Check LLVM_ENABLE_DUMP definition for dumpMachine [...] adds 217a56948ad MachineScheduler/ScheduleDAG: Add support for GetSubGraph adds 0bdb15850fe [APInt] Use 'unsigned' instead of 'unsigned int' in the int [...] adds a77792d82f6 [APInt] Combine variable declaration and initialization whe [...] adds b68e2b67cc9 [APInt] Remove an anonymous namespace around static functions. NFC adds cc9aca66160 [APInt] Reformat tc functions to put opening curly braces o [...] adds 3a50eea6d97 Dont emit Mapping symbols for sections that contain only data. adds 072955ea76a [AMDGPU] Update SI scheduler colorHighLatenciesGroups adds 495d20631a1 rename instcombine test file. NFC adds 90db4d6a69e [InstCombine] For select rule, use positive check of consta [...] adds 7a3b1c28d8f [GlobalISel][X86] support G_FRAME_INDEX instruction selection. adds c05e81481a2 [AArch64] [Assembler] option to disable negative immediate [...] adds eb81f2b1a2d Strip trailing whitespace adds f67785e4401 [X86][SSE] Set second operand to undef instead of first ope [...] adds 3781220f498 Wdocumentation fix adds 3d39cb0a48a [X86][SSE] Begin merging vector shuffle to BLEND for loweri [...] adds e6987121baa [SDAG] Minor cleanup of variable usage. NFC. adds c47b59c064f Fix signed/unsigned comparison warning adds e43ad9f7000 [x86] add AVX2 run to show 256-bit opportunity; NFC adds 5dc2b583019 [SDAG] Fix Stale SDNode usage in visitAND adds 227a06d5bb1 [SDAG] Avoid deleted SDNodes PromoteIntBinOp adds 1a36c64204c [X86][SSE] Refactored shuffle BLEND combining to make futur [...] adds 3409abefac2 [x86] add separate check prefix for SSE; NFC adds ee18eb90ff9 [AVX-512] Fix accidental uses of AH/BH/CH/DH after copies t [...] adds a4ee850374e [X86][AVX2] Add support for combining v16i16 shuffles to VPBLENDW adds 0a6c80abd7d Add reproducer test for pr32449. NFC. adds f92edffedaa [SDAG] Deal with deleted node in PromoteIntShiftOp adds 13bfce64bce Revert "Dont emit Mapping symbols for sections that contain [...] adds e26bd3af58c [x86] use VPMOVMSK to replace memcmp libcalls for 32-byte equality adds 88f78105741 [AMDGPU] Split -amdgpu-early-inline-all option adds e4c5b69aa39 Add support for -fno-builtin to LTO and ThinLTO to libLTO adds d707b92e85f [DAGCombiner] add helper function for and-of-setcc folds; NFC adds 5c57c1108ed [IR] Add AllowContract to FastMathFlags adds 3812900a6d9 [DAGCombiner] clean up foldAndOfSetCCs; NFCI adds 98ede9e115c Fix crashing on TargetCustom PseudoSourceValues adds c9e0a0dbb1c [X86][MMX] Match MMX fp_to_sint conversions from XMM registers adds f54b836e267 [DAGCombiner] rename variables in foldAndOfSetCCs for easie [...] adds 7a9c51436fa [AMDGPU] Fix recorded region boundaries in max-occupancy scheduler adds e42e44c7e3f [AMDGPU] Boost unroll threshold for loops reading local memory adds 8cc66a64a3c [DAGCombiner] remove redundant conditions and duplicated co [...] adds bdb8cec802d [DAG] fix formatting; NFC adds aba00eee422 LTO: Replace InputFile::Symbol::getFlags() with predicate a [...] adds da55f9cbbf6 Add a similar test for tailcall optimization as in r270287 [...] adds 3a0175382af [DAGCombiner] reduce code duplication with local variables; NFCI adds 522a572e3cc [PPC] In PPCBoolRetToInt change the bool value to i64 if th [...] adds b032c49e1aa [AVX-512] Punt on fast-isel of truncates to i1 when AVX512 [...] adds 24afa43c4b5 [AVX-512] Add test case that was supposed to go with r298957. adds 14ecedfe4c1 More accurate header inclusions. NFC. adds 22fddd859be [SDAG] Add AllowContract to SNodeFlags adds 672fd126130 [SDAG] Handle VectorReduction in SDNodeFlags::intersectWith adds fdcdb2a0469 [SDAG] Remove -enable-fmf-dag adds 8985450e52e [XRay][tools] Handle "no subcommand" case for llvm-xray adds f5e37626b97 [XRay] Update FDR log reader to be aware of buffer sizes pe [...] adds 8d23f77d881 [AVX-512] Remove explicit KMOVWrk/KMOVWKr instructions from [...] adds 31932b16fc2 [AVX-512] Remove explicit KMOVWrk from isel patterns. COPY_ [...] adds d94614ff32c Move the x86 cpu feature rtm from Haswell to Skylake matchi [...] adds 64532cd1e1b [MachineVerifier] Avoid reference to nullptr adds 7c4741f2ec2 [X86] Removed old comment. NFCI. adds c4c4b3ba30a [X86][MMX] Added generic sitofp test to compare against exi [...] adds 70a5705cf0c [AMDGPU] Tidy up computeKnownBitsForTargetNode/ComputeNumSi [...] adds d0ea014431b [X86][AVX2] Prevent unary interleaving patterns from callin [...] adds 814c8a1f892 Remove unused argument. adds 31e9ec9aa50 Fix GettingStarted.rst statement. adds 65afd8323d1 Cleanup in preparation for D30703. NFCI adds cc54be812c0 [MachineVerifier] Drop a spurious const adds 2c2eb599d39 Spelling mistakes in comments. NFCI. adds 5ae7dc88622 [tablegen][globalisel] Convert the SelectionDAG importer to [...] adds aa3cce33cc9 [DAGCombiner] reduce code duplication by rearranging checks; NFCI adds d7f209a331e [X86] Tidied up comment - we don't custom lower add/sub i64 [...] adds ebe3d55fadd llvm-pdbdump: If we don't change the color, don't reset the color. adds 37cb59fa3b7 [DAGCombiner] unify type checks and add asserts; NFCI adds 946702101bf [InstCombine] Correct the check for vector GEPs adds 72b6f29aab2 Add ifunc support to ModuleSymbolTable. adds b92b951964d Re-land: "Make NativeExeSymbol a concrete subclass of Nativ [...] adds 64abec8d569 [DAGCombiner] Remove else after return. NFCI. adds ad6daf4031c [X86IselLowering] Remove extraneous semicolon. NFCI. adds b476db57dff [CodeGen] clean up and add tests for scalar and-of-setcc; NFC adds 19db4433102 [codeview] Fix buggy BeginIndexMapSize assertion adds fef24043fa2 If the DIUnit has flags passed on it then have DW_AT_produc [...] adds 2d9dd043ff6 [libFuzzer] best effort support for -fsanitize-coverage=tra [...] adds 2f7335804b2 [DAGCombine] A shuffle of a splat is always the splat itself adds 5b2ce7b2d4d [libFuzzer] remove a stale flag from tests, run value-profi [...] adds 8dac88a6524 [APInt] Remove references to integerPartWidth outside of AP [...] adds f1d06b8e0a7 Refactor getHostCPUName to allow testing on non-native hardware. adds f68acdfc6c2 Make naming in Host.h in line with coding standards. adds b774d824a42 [globalisel][tablegen] Change Expected<bool> to Error and r [...] adds f1a9d6ebdb3 Attempt to fix the Windows builds by using llvm::detail::.. [...] adds 578991f2fda Another attempt fix the Windows builds adds d897ffbad47 Revert "Make naming in Host.h in line with coding standards." adds cac5a6fb064 Spelling mistakes in comments. NFCI. adds 428e69317e7 Spelling mistakes in comments. NFCI. adds c599971b394 Test commit. adds 3e6ef772728 [yaml2obj] Enable and fix tests adds af5759db477 [DAGCombiner] add helper function for visitORLike; NFCI adds 04dea7e0881 [CodeGen] Pass SDAG an ORE, and replace FastISel stats with [...] adds 1042cb40de3 [DAGCombiner] Initial support for the fast-math flag contract adds 38ad05a6a6a Following r297661, disable dup workaround to disable duplic [...] adds 349a48fadde [WebAssembly] Improve support for WebAssembly binary format adds e47c9571b78 [AArch64] Simplify isSingExtended()/isZeroExtended(). NFCI. adds 5fd6afdd7d2 [AArch64ISelLowering] Remove `else` after `return` in Lower [...] adds 2bca52a6bf6 [Object] Remove check for BIND_OPCODE_DONE/REBASE_OPCODE_DONE. adds 70eccef966d Teach stripNonLineTableDebugInfo() to remap DILocations in [...] adds 38e381b5a35 [AMDGPU] Add GlobalOpt parameter to Always Inliner pass adds 4e16bc09ec7 lit: support redirect from globs adds c1e48aa5eb0 [AVX-512] Fix another case where fastisel was generating a [...] adds 62aabaa87db Use os.path.realpath when tracking the cwd. adds 373055293b0 [AVX-512] Fix bad comment from r299112. NFC adds dbc8b93e8ae [SimplifyIndvar] Replace the sdiv used by IV if we can prov [...] adds 3361f1d2d72 [InstSimplify] Use APInt::isMaxSignedValue() instead of com [...] adds 83c5596f48c [InstSimplify] Use m_SignBit instead of calling getSignBit [...] adds 3c1dcddf86e AMDGPU: Add all atomicrmw fields to atomic.inc/dec adds 48cd2fd945d [InstCombine] Fix typo last->least. NFC adds 95604f98b90 getPristineRegs is not accurately considering shrink wrappi [...] adds 9d2fdf4cbe8 Add testcase for r299124. adds 9065c48517e LangRef: Don't refer to a 'generic' address space. adds 0b40dade416 ThinLTOBitcodeWriter: Use Module::global_values(). NFCI. adds 21463ca8615 [XRay][docs] Examples for how to use XRay adds 839e869207c AMDGPU: Rename isKernel adds 546a4623a53 [WebAssembly] Initial linking metadata support adds 2dee6275def ModuleSummaryAnalysis: Use a more precise #include. NFC. adds e10396a06ac [libFuzzer] try to fix value-profile-strncmp on the Mac bot adds 49223227ce8 Fix typo, defind -> defined. adds 365612c08f3 [XRay][tools] Remove some assertions in llvm-xray graph adds 39fd9e9f7e3 Temporarily revert "[PPC] In PPCBoolRetToInt change the boo [...] adds f43d588ee8d [libFuzzer] make sure we don't execute libFuzzer's mem* and [...] adds 9f482fc3fc4 LTO: Reduce memory consumption by creating an in-memory sym [...] adds 0c34fa17ac0 Fix 32-bit build. adds bfb6d1adc0a Revert r299168 and r299169 due to library dependency issues. adds 8cefdcb5f69 [XRay][docs] Add XRayExample to docindex. adds 15e73a64fce [libFuzzer] ensure that strncmp is not inlined in a test adds e857d23c614 [libFuzzer] tests: don't test 64-bit comparison on 32-bit builds adds b6a531620b7 [libFuzzer] simplify the code a bit adds 537523b656c Move llvm::canBeOmittedFromSymbolTable() to Analysis. adds 8dc921e4a67 Move llvm::emitLinkerFlagsForGlobalCOFF() to Mangler. adds 957cbf8cf70 Re-apply r299168 and r299169 now that the libdeps are fixed. adds 903a9622093 Go binding: Add GetCurrentDebugLocation to obtain debug loc [...] adds 1fcb6de3bd6 [Scalarizer] Handle scalar arguments in vector GEP adds dbf64c9e974 [APInt] Add unittests that demonstrate how very broken APIn [...] adds 0cd81d8a105 Instsimplify: Adding shufflevector test. NFC. adds 347f8943df5 Fix signed/unsigned warning adds c0e4be99c33 Fix MSVC 'not all control paths return a value' warning adds 8d28e342767 Spelling mistakes in comments. NFCI. adds 07898901dfc [DAGCombiner] Add vector demanded elements support to compu [...] adds ff45a181890 [AMDGPU] SDWA Peephole: improve search for immediates in SD [...] adds 55cd27a0316 Do not pollute the namespace in a header file. adds 85ae85b8217 [ScalarEvolution] Re-enable Predicate implication from operations adds bc82d26e5bc Update comment for r299098 per feedback from James Henderson. adds 922c62304e6 Use the current working directory in the glob expansion adds 5f4e285a08f Make naming in Host.h in line with coding standards. adds 1f79e38e073 [SystemZ] Skip DAGCombining of vector node for older subtargets. adds 7066857d65d Add a %basename substitution. adds 1c48d9ec4d9 Do not pollute the namespace in a header file. adds 9fc191fd45d [DAGCombiner] Add vector demanded elements support to Compu [...] adds 8419f9e400d [SystemZ] Make sure of correct regclasses in insertSelect() adds 40593e05daa [DAGCombiner] Add ComputeNumSignBits vector demanded elemen [...] adds 1cbe5a4d1dc Remove more name space pollution from .inc files adds 7fb9f75fc3c [mips][msa] Prevent output operand from commuting for dpadd [...] adds c295532b907 Remove name space pollution from Signals.cpp adds dcfd6182191 Refactor code to create getFallThrough method in MachineBas [...] adds 22478be44ee Fix the InstCombine to reserve the VP metadata and sets cor [...] adds bc8f4f4a24f Rename variable. adds af26b710854 [AVX-512] Update lowering for gather/scatter prefetch intri [...] adds f580f444f6a [MSSA] Small test fix adds e37d964eac5 Improve DebugInfo/strip-loop-metadata.ll test adds bced0c80a54 [x86] add/consolidate tests for setcc+setcc+and/or; NFC adds 126805f01e1 [AArch64] Add new subtarget feature to fold LSL into address mode. adds d1c650cbed3 [DAGCombiner] remove redundant code and add comments; NFCI adds 3eae0cb1658 [APInt] Remove unused functions from the APIntOps namespace [...] adds 406105d95e5 [APInt] Rewrite getLoBits in a way that will do one less me [...] adds a694469515b [PowerPC] add tests for setcc+setcc+logic; NFC adds 1abd9ecbfcf AMDGPU/R600: Fix amdgpu alias analysis pass. adds c4de629ce24 AMDGPU: Remove unnecessary ands when f16 is legal adds 3e86a05613a Do not translate rint into nearbyint, but truncate it like [...] adds 38017a1fee4 [APInt] Remove shift functions from APIntOps namespace. Rep [...] adds b09e7cd9e91 [AMDGPU] Remove assumption that vector and scalar types do [...] adds 0f0cd01471b [DAGCombiner] add fold for 'All sign bits set?' adds 872b505b043 Fix APFloat mod (committing for simonbyrne) adds 2215b7d1b28 Fix 80-column violation in previous commit. adds 8b1380a0094 [Hexagon] Fix typo in HexagonEarlyIfCConv.cpp adds 9a9ab69f850 [Hexagon] Remove unused variables adds cba91e6d224 [InstCombine] Add test case demonstrating missed opportunit [...] adds 761a817d060 [llvm-ar] Extract objects to their basename in the CWD adds bf7a949a319 Fix binary static archive that got mangled by patch adds e44ee41b80f [DAGCombiner] refactor and/or-of-setcc to get rid of duplic [...] adds a71015bc013 [InstCombine] When adding an Instruction and its Users to t [...] adds 7afeaaf4b7a LTO: call getRealLinkageName on IRNames before feeding to getGUID adds 9120fd79043 Add virtual destructor to WasmYAML::Section or avoid memory leak adds 5f15d53c5c5 [AMDGPU] Fix typo in test filename. NFC. adds a9c17af0f65 [APInt] Fix bugs in isShiftedMask to match behavior of the [...] adds e41b5221455 AMDGPU/llvm-readobj: Rename RuntimeMDNoteType -> CodeObject [...] adds dae6ed5d296 Small cleanup to remove extraneous cast. adds 8d057d4705f Reduce the number of times we query the subtarget for the s [...] adds 61a230e3a01 Fix a test to check assembly output instead of bitcode. adds 79114cd2fa2 Feature generic option to setup start/stop-after/before adds 3bae06e77eb Localizer fun adds 9ca9c4340dc Instrument SDISel C++ patterns adds 209e8f27d25 [RegBankSelect] Support REG_SEQUENCE for generic mapping adds 1da12ea8404 Revert "Instrument SDISel C++ patterns" adds b6fca8cdd31 Revert "Localizer fun" adds 2a400a79a23 Revert "Feature generic option to setup start/stop-after/before" adds 0c554b7eb16 [DAGCombiner] Fix fold (or (shuf A, V_0, MA), (shuf B, V_0, [...] adds fa958b2284e [APInt] Remove the mul/urem/srem/udiv/sdiv functions from t [...] adds ea476cb4cb3 [APInt] Implement operator! using operator==(uint64_t). NFCI adds b0c8c6a0ef8 MemorySSA: Kill the WalkTargetCache now that we have getBlockDefs. adds ae7bf03f7ce MemorySSA: Push const correctness further. adds eea3e1dabcb MemorySSA.h - make clang-format happy adds 3a5434ad3a6 Move def_chain iterator to MemorySSA.h so it can be reused adds fa75a7ca5c3 NewGVN: Use def_chain iterator in singleReachablePhiPath in [...] adds 1a42d5c3bd5 NewGVN: Clean up GVNExpression memory hierarchy, restructur [...] adds b0cedc77cbe NewGVN: Don't try to kill off the stored value of stores wh [...] adds 9d36a3c5456 MemorySSA: Update expensive checking version of def_chain_i [...] adds 8159cf81b91 [PowerPC, x86] add vector tests for any/all {sign} bits set [...] adds c2d4aab4d94 [DAGCombiner] enable vector transforms for any/all {sign} b [...] adds e02485adcee fix formatting; NFC adds c1440de3342 fix formatting; NFC adds 08e6f17325c [InstSimplify] add tests for missed constant folding; NFC adds 6d5ad7b563e [InstSimplify] add constant folding for fdiv/frem adds 0b798207e7f [AMDGPU] Garbage collect now unused dead code. NFCI. adds ad53f4b9c29 [WASM] Remove an assertion that can never fire. adds 913760d6894 [WASM] Remove a set but never used variable. adds 084c1ea3b41 [WASM] Remove other comparison of unsigned expression >= 0. adds 2ea3d99e260 [APInt] Allow GreatestCommonDivisor to take rvalue inputs e [...] adds e222bade096 [APInt] Implement AndAssignSlowCase using tcAnd. Do the sam [...] adds ef14ce8e1be [APInt] Fix indentation. NFC adds 9bf6f549d3c [APInt] Implement flipAllBitsSlowCase with tcComplement. NFCI adds 548688adbde [APInt] Use conditional operator to simplify some code. NFC adds fe76989fe74 MemorySSA: Add support for caching clobbering access in stores adds e991dabbb6c [APInt] Fix typo in comment. NFC adds 4010109a872 [APInt] Simplify some code by using operator+=(uint64_t) in [...] adds c3f2c54438a [APInt] Combine declaration and initialization. NFC adds 8290bf9842b [X86] Use tcAdd/tcSubtract to implement the slow case of op [...] adds a544ecba502 Add another interesting shufflevector test case for InstSim [...] adds bd2ffa7d854 [X86][MMX] Add generic fptosi 4f32-4i32 test adds 650bf3e5995 [BypassSlowDivision] Do not bypass division of hash-like values adds 72710465b66 NewGVN: Handle coercion of constant stores, loads, memory insts. adds 9960918c016 Regenerate test. NFCI. adds c21f4c0e26f Regenerate test with codegen. NFCI. adds a323ca71030 Regenerate test with codegen. NFCI. adds 5a5f4253b82 APInt.h: Prune \param(s) in \returns. [-Wdocumentation] adds 4475a6621a2 [X86][MMX] Added support for subvector extraction to MMX register adds 888b1815665 [X86][MMX] Simplify tablegen patterns by always combining M [...] adds 9e3a09349cb [InstCombine] Remove redundant combine from visitAnd adds 07ccae240aa [X86][MMX] Improve support for folding fptosi from XMM to MMX adds 9071ac1443f [InstCombine] Make InstCombiner::OptAndOp take a BinaryOper [...] adds 6b60db9e917 [APInt] Add a public typedef for the internal type of APInt [...] adds c94363ef7c7 [APInt] Make use of whichWord and maskBit to simplify some [...] adds 995bf6a1597 Reformat. adds 23a948a82f0 Trailing whitespace. adds 77e7374775b [InstCombine] Remove a And transform that should be handled [...] adds 38c71d62897 [InstCombine] Make foldOpWithConstantIntoOperand take a Bin [...] adds d369b4141bc ARMAsmParser: clean up of isImmediate functions adds 3c078c15897 [DAGCombiner] Check limits before accessing array element ( [...] adds 68149f546eb [APInt] Move isMask and isShiftedMask out of APIntOps and i [...] adds 7d1d15ba840 [InstCombine] fix formatting for foldLogOpOfMaskedICmps and [...] adds 1cca49874c3 Revert r299337 "[InstCombine] Remove redundant combine from [...] adds ab1bde3393b [Hexagon] Factor out some common code in HexagonEarlyIfConv [...] adds f60f35be0ac Revert "[DAGCombine] A shuffle of a splat is always the sp [...] adds aee31d3e9ad [InstCombine] Add test cases showing how we fail to fold ve [...] adds 7bceb160312 Bitcode: Remove reader support for MODULE_CODE_PURGEVALS. adds 211802721c2 [Support] Make printAllJSONValues public, for custom output. adds cd7c9c31787 AMDGPU: Remove legacy bfe intrinsics adds 5b2afe9ffbc Fix LLVMBuild.txt typo. NFC adds 445d3cfd6bf [DAGCombine][InstCombine] Fix inverted if condition in equi [...] adds 78c95b332bd [CodeGenPrep] move aarch64-type-promotion to CGP adds 019f65e751b x86 interrupt calling convention: re-align stack pointer on [...] adds d1815f3bc32 [InstCombine] Remove canonicalization for (X & C1) | C2 --> [...] adds dc4f56dd529 [X86][SSE]] Lower BUILD_VECTOR with repeated elts as BUILD_ [...] adds 2c2955a0450 [codeview] Add support for label type records adds 5b7b340242c DAG: Fix missing legalization for any_extend_vector_inreg operands adds 513e714dfdf AMDGPU: Remove llvm.SI.vs.load.input adds c4d3801c208 Reland r298901 with modifications (reverted in r298932) adds 07d42b869da InstSimplify: Add a hook for shufflevector adds 9d740a4a716 Update stale doxygen links in ProgrammersManual.rst adds e20330959b1 add/move codegen tests for and/or of setcc; NFC adds d6780ccb606 [Fuzzer] Flush std::cout before aborting in CxxStringEqTest adds 7c5b7f36c11 [codeview] Cope with unsorted streams in type merging adds 48f7bb5c740 [PDB] Save one type record copy adds c7f9b76a740 InstCombine: Use the InstSimplify hook for shufflevector adds 099a6fd775f [InstCombine] Use setAllBits in place of getAllOnesValue si [...] adds ba1514c2191 Align all scalar numbers to LLVM_YAML_IS_FLOW_SEQUENCE_VECTOR adds 78ed6ce91d1 [X86] Add 64 bit pattern matching for PSADBW adds d7a71bf354d [mips] Deal with empty blocks in the mips hazard scheduler adds 690f0b25abf [tablegen][globalisel] Add support for nested instruction m [...] adds 3341db988be [X86][LLVM] Converting __mm{|256|512}_movm_epi{8|16|32|64} [...] adds 8eaecfe64f1 [globalisel][tablegen] Try to make MSVC happy with r299430 adds 62b3ad70e25 [globalisel][tablegen] Fix non-determinism introduced in r299430. adds 21de338c735 Strip trailing whitespace adds 7c1642caaf1 [X86][MS-compatability]Allow named synonymous for MS-assemb [...] adds f486610d1fb AMDGPU: Remove legacy image intrinsics adds 452506a655f AMDGPU: Remove legacy export intrinsic adds 9e52f8ee8b5 [PGO] Memory intrinsic calls optimization based on profiled size adds 1f3f346415b [x86] remove dead select-of-constants transform; NFCI adds e65aa1c44ea [RuntimeDyld] Make RuntimeDyld honor the ProcessAllSections flag. adds c1eaf3a1f1a [InstCombine] Add more test cases for missing combines of s [...] adds 983e1a1b993 [X86][inline-asm] Add support for MS 'EVEN' directive adds 5d76ab9dece [AArch64] Refine Falkor Machine Model - Part 2 adds dce3b51aea5 Verifier: Check some amdgpu calling convention restrictions adds 4dd33e62692 Implement host CPU detection for AArch64 adds 80bfe66e42a [InstCombine] Add test cases for missing combines of phis w [...] adds 75d650872fc [AArch64][Fuchsia] Allow -mcmodel=kernel for --target=aarch [...] adds d6c407ebd68 [InstCombine] Support folding and/or/xor with a constant ve [...] adds 54eda943893 [ExecutionDepsFix] Don't revisit true dependencies adds 340999bcb91 [AArch64] Add missing schedinfo, check completeness for Falkor. adds 7597f2aad70 [InstCombine] Turn subtract of vectors of i1 into xor like [...] adds 828ad8830a9 [InstCombine] rename variable for easier reading; NFC adds 7cc76f28bd7 [lit] Add a minimum export implementation. adds 862117b6f41 [InstCombine] Add test cases for various add/subtracts of c [...] adds 8719ab145aa Change section flag character for SHF_LINK_ORDER to "o". adds 6f50c7fe4aa [AArch64] Avoid partial register deps on insertelt of load [...] adds 802fcd9c3ea [MC] Set defaults based on section names and support name suffixes adds d8050a7d38c Revert "MemorySSA: Add support for caching clobbering acces [...] adds 4977b97dfc9 Re-apply MemorySSA: Add support for caching clobbering acce [...] adds 73135b623b8 Allow targets to opt-in to codegen in SCC order adds e339e10540a [X86] Relax assert in broadcast-of-subvector lowering. adds ed735da23f3 ThinLTOBitcodeWriter: handle aliases first in filterModule adds 9be01ddb136 [RuntimeDyld] Remove an unused static member left over from [...] adds 1115fbdce4d [ObjCArc] Do not dereference an invalidated iterator. adds f202abfbd68 [coroutines] Add syntax coloring to examples in Coroutines.rst adds 3a168569fcd [LAA] Correctly return a half-open range in expandBounds adds ff1254b6f8c Add MCContext argument to MCAsmBackend::applyFixup for erro [...] adds f05816007bc [AArch64] Crypto requires FP. adds a71e6d97d58 [X86][SSE] Renamed combine to make it clear that it only ha [...] adds 9544eb39b64 Fix WebAssembly after r299529. adds 45233895432 [AMDGPU] SDWA peephole: enable by default adds be2d374747c [globalisel][tablegen] Fix patterns involving multiple Comp [...] adds 0a06935a2e6 [InstCombine] add tests for missing add canonicalization; NFC adds 4a035b600a7 [DAGCombiner] Don't make a BUILD_VECTOR with operands of i [...] adds a070c921e55 [DAGCombiner] add and use TLI hook to convert and-of-seteq [...] adds a9eefb03757 [LV] Make test case more robust adds 4561efc963f [yaml2obj] Improve error message when output file cannot be [...] adds 50982d318ed Respect CMAKE_INSTALL_MANDIR for sphinx generated manpages adds 6edf98cd9d9 [llvm-ar] errors go on stderr and not on stdout. adds cfe642f7aed [llvm-ar] Remove unneeded std::, NFCI. adds 6bc97db3ed3 [yaml2obj] Factor out error handling code. adds af1205bfaed [SystemZ] Prevent Merging Bitcast with non-normal loads adds 8067b87e5f0 [AMDGPU][MC] Fix for Bug 28167 + LIT tests adds 81a71c47567 [InstCombine] add tests for missing icmp fold (PR32524) adds 9331ebeba7a [ARM] Try to re-enable MachineBranchProb.ll for ARM/AArch64 adds e514965f7ea [lit] Use process pools for test execution by default adds 5b76b2964c6 ARMFrameLowering: Slight cleanups; NFC adds 3f58a16d8ee [lit] Use Python 3 style print to satisfy some bots adds 3282f4edba2 [lit] Revert to old execution strategy while I debug these [...] adds 5def10a6fce MemorySSA: Fix and use optimized_def_chain adds 4b7a5e5aa16 [AMDGPU][MC] Fix for Bug 28158 + LIT tests adds 9dd1db13fe9 [InstCombine] fix formatting and variable names; NFCI adds 5acb804311d [ExecutionDepsFix] Don't recurse over the CFG adds bcca3be4b54 [InstCombine] add fold for icmp with or mask of low bits (PR32542) adds 0a518c38def [DAGCombine] Remove commented-out code from r299096 adds c0a481413e8 [DAGCombine] Support FMF contract in fused multiple-and-sub too adds 12290fa787b [llvm-readobj] Only print the real size of the note adds d6a6d70f050 MemorySSA: Remove MemorySSA walker caching. adds acdd13502c2 [Hexagon] Use -mattr to select HVX mode in a testcase, NFC adds f836c7dbdea Revert r299536. [AMDGPU] SDWA peephole: enable by default. adds 4640b8eb908 Remove accidental debug printf. Follow up to r299583. adds 15bfd0f9a03 [X86 TTI] Implement LSV hook adds 062224cde73 [Bugpoint] Use `unique_ptr` correctly. adds 1f64ee0da04 Bitcode: Remove an unused declaration. NFC. adds ce637fef4f1 StringTableBuilder: Don't assert when writing an empty raw [...] adds 57cceedbb18 [lit] Implement timeouts and max_time for process pool testing adds e128ff2ea98 [Orc] Make orcError return an error_code rather than Error. adds 456e01a064d [Orc] Break QueueChannel out into its own header and add a [...] adds 6eb553fb1a1 [XRay] - Fix spelling error to test commit access. adds 5c2c633a8d2 foo adds 4b9e4f7c82f bar adds 8f5aadd4651 [IR] Add commutable matchers for Add and Mul to go with the [...] adds f399f6df54f Revert accidental commit of r299618 adds 0555b650347 Revert accidental commit of r299619. adds d6028a160d3 [Orc] Add missing header include for r299611. adds af703fae1e9 [XRay][docs] Fix hyperlink to XRay doc adds 1194a001b6d [InstSimplify] Teach SimplifyAddInst and SimplifySubInst th [...] adds 3c3df0d82ae [InstSimplify] Add test cases for mixing add/sub i1 with xo [...] adds 3b23ff52042 [ARM] Remove a dead ADD during the creation of TBBs adds f167493b19f [globalisel][tablegen] Move <Target>InstructionSelector dec [...] adds ed65bfc6c90 [X86][MMX] Test showing failure to create MMX non-temporal store adds ff14b9ebc7a [SelectionDAG] NFC patch removing a redundant check. adds 3481b0868ee [AMDGPU] Resubmit SDWA peephole: enable by default Reviewer [...] adds ba2269c0f06 [InstCombine] Fix a case where we weren't checking that an [...] adds 3b10e5fb8dd [AMDGPU] Eliminate barrier if workgroup size is not greater [...] adds 0caf3858331 [ADT] Add a generic breadth-first-search graph iterator. adds 6cf90d36479 [Hexagon] Change the vector scaling for vector offsets adds 864291860e0 [InstSimplify] Teach SimplifyMulInst to recognize vectors o [...] adds 0719006e7ee AMDGPU: Stop using CCAssignToRegWithShadow adds 942d6e6f58b [ARM] Add Kryo to available targets adds a96ab41df75 NewGVN: This patch makes memory congruence work for all typ [...] adds 8648b7dd7aa NewGVN: Fix a small formatting issue in performSymbolicLoad [...] adds 934731460a0 NewGVN: Fixup some small issues adds 3d88b146f6a NewGVN: Rename some functions for consistency adds f8e400cffa8 [InstSimplify] Remove unreachable default from SimplifyBinOp. adds d4d2ab353e0 [SDAG] Fix visitAND optimization to deal with vector extrac [...] adds dc9458d5a74 Revert "[ARM] Add Kryo to available targets" adds e4f931e960a [AMDGPU] Temporarily change constant address space from 4 to 2 adds 93e3e80c720 [StripDeadDebugInfo] Drop dead CUs entirely adds 593fb7ed17e Bitcode: Do not create FNENTRYs for aliases of functions. adds fcc345974fe [asan] Delay creation of asan ctor. adds 9d134816b42 [asan] Put ctor/dtor in comdat. adds 7bfedca6fc4 [asan] Fix dead stripping of globals on Linux. adds 753bd2a7728 Turn some C-style vararg into variadic templates adds e184e1f8707 [SelectionDAG] [ARM CodeGen] Fix chain information of LowerMUL adds 8701bbc75d6 Revert "Turn some C-style vararg into variadic templates" adds 519b967c7ea [BFIterator] Remove an assertion that doesn't hold. NFCI. adds ff802834d54 [InstCombine] Remove redundant combine from visitAnd adds 1f6fa0f45ad [llvm-extract] Add option for recursive extraction adds bdbfd7487e7 [PGO] Preserve GlobalsAA in pgo-memop-opt pass. adds 34d56777267 AMDGPU: Replace fp16SrcZerosHighBits with a whitelist adds 3c04b9a3cf1 [InstCombine] When checking to see if we can turn subtracts [...] adds c82755f01b1 AMDGPU: Diagnose illegal SGPR to VGPR copies adds 40df19a1400 iwyu fixes for lldbCore. adds f8a82f02009 [InstCombine] Remove testing assert I accidentally left in [...] adds bf82f16ca46 [X86] Revert r299387 due to AVX legalization infinite loop. adds f25acacbe6e Turn on -addr-sink-using-gep by default. adds 619d61b042a Revert "Revert "[ARM] Add Kryo to available targets"" adds 42c1cc1993c [InstCombine] Add a few cases for OR we fail to optimize du [...] adds d78c0c1930c Remove the default subtarget from the Power port. It's unne [...] adds 4d40c977964 AMDGPU/GFX9: Fix shared and private aperture queries adds dbbede1ea28 [llvm-pdbdump] Allow pretty to only dump specific types of types. adds b4706100910 Allow specification of what kinds of class members to dump. adds ca5c29bce66 [WebAssembly] Fix -Wcovered-switch-default warning adds 1096080a5df [InstCombine] Add more commuted patterns to support folding [...] adds f634bfbb16e AliasAnalysis: Be less conservative about volatile than atomic. adds 61e26210b1d [InstSimplify] Use Instruction::BinaryOps instead of unsign [...] adds ae892fe4466 [InstCombine] Add additional tests with varied commuting to [...] adds 826edb2ba1f [InstCombine] Handle more commuted cases of ((A & B) | ~A) [...] adds 3afaea7b42e [ARM] GlobalISel: Support frem for 32-bit values adds aa39cd364de [ARM] GlobalISel: Support frem for 64-bit values adds 218a5a7e27d [AMDGPU] Move SiShrinkInstruction and SDWAPeephole to SSAOp [...] adds f51d2756c0c [ARM] GlobalISel: Test hard float properly adds 311a698548c [SystemZ] Remove confusing comment in combineEXTRACT_VECTOR_ELT() adds c833eb7ff65 [SystemZ] Check for presence of vector support in SystemZI [...] adds dc04fc16d68 [SelectionDAG] Enable target specific vector scalarization [...] adds 7bf2a5770da [AMDGPU][MC] Fix for Bug 28211 + LIT tests adds 2ad61e77494 [mips][msa] Fix generation of bm(n)zi and bins[lr]i instructions adds 6abe02259e1 [mips] Remove usage of debug only variable (NFC) adds ccc38cc5e76 Reapply r298620: [LV] Vectorize GEPs adds 2702a94ea50 [coroutines] Insert spills of PHI instructions correctly adds ea3c2beccb1 [GlobalISel] implement narrowing for G_CONSTANT. adds 7b4e08c8d81 [lit] Try using process pools by default again adds d8cebd13cb1 Use PMADDWD to expand reduction in a loop adds abcd91992d9 [AMDGPU] Unroll more to eliminate phis and conditions adds 0bea7aaa6fe Revert "[SelectionDAG] Enable target specific vector scalar [...] adds ea470c8570c [Dominators] Simplify a member function. NFCI. adds f095cc03e1d De-flake a test that is failing due to coroutine spill inse [...] adds 1afcae44d92 NewGVN: Make CongruenceClass a real class in preparation fo [...] adds 7fa217a5245 [AArch64] Allow global register asm("x18") or asm("w18") un [...] adds fb99fcdbc93 [ConstantFolding] Use Intrinsic::not_intrinsic instead of 0 [...] adds 80726a4dd80 [GlobalISel]: Fix bug where we can report GISelFailure on e [...] adds 251a136db40 [ARM] Prefer BIC over BFC in ARM mode. adds 212b2d57cbc [cfi] Take over existing __cfi_check in CrossDSOCFI. adds ad9f9e3325a gitignore: Ignore .vs folder (VS2017 config files) adds 3cc8445f854 [coroutines] Make CoroSplit pass deterministic adds 52f987ac7fb [AArch64] Refine Falkor Machine Model - Part 3 adds 0a13ad66375 [IR] Inline Type::getScalarType() by using isVectorTy() and [...] adds 0b9a8d8fd20 Reorganize libLTO C API header lto.h (NFC) adds b28be420c04 [AsmParser]Emit an error if a macro has two (or more) param [...] adds 1ad9b2d946f AMDGPU: Actually write nops for writeNopData adds b06c394fe3f MC: Remove unused virtual function MCObjectWriter::isWeak. NFC. adds d8e1379d72a [InstCombine] rename variable for easier reading; NFC adds 6fd8f784105 [InstCombine] Use the SubOne helper function to shorten som [...] adds 35b55965c4d [InstCombine] Add test cases to show missing support for ve [...] adds c5f68270ad4 [InstCombine] Extend a canonicalization check to apply to v [...] adds 239032f6685 [InstCombine] Extend some OR combines to support vectors. adds cfe441c8741 [MemorySSA] Fix use of pointsToConstantMemory in isUseTrivi [...] adds 8009ba263a1 [InstCombine] auto-generate better checks; NFC adds d0196ef8d24 [SimplifyCFG] auto-generate better checks; NFC adds 619694e7afc [Mem2Reg] Remove AliasSetTracker updating logic from the pass. adds e093a14cd1e [InstCombine] remove duplicate test; NFC adds 23f07450a29 [InstCombine] remove dead cases from icmp pair switches; NFCI adds 64aab18a2e5 [SCCP] Resolve indirect branch target when possible. adds 18fcab5833b General usability improvements to generic PDB library. adds 4dbdbc79049 Remove unused method. adds 60e8e12279b [InstCombine] Use m_OneUse to shorten some code. NFC adds 1a4cc6a638b [InstCombine] Make the (A|B)^B -> A & ~B transform code con [...] adds 9ed6500653d [InstCombine] Remove unnecessary dyn_cast to BinaryOperator [...] adds d178fa97c3a [InstCombine] Add test cases demonstrating missing handling [...] adds dbe14483606 [InstCombine] use m_c_And and m_c_Xor to handle commuted ve [...] adds 17e3b0ef514 [InstCombine] Make sure we preserve fast math flags when fo [...] adds 1fafa7b072d [SelectionDAG] TargetLowering::SimplifyDemandedBits how to [...] adds 7bb46d80561 [InstCombine] Use commutable and/or/xor matchers to simplif [...] adds af6290684b9 [ARM] GlobalISel: Support G_FPOW for float and double adds 31ad416f00b [InstCombine] add test for PR32524; NFC adds 4ed87e3dc1f [InstCombine] Support folding of add instructions with vect [...] adds 95d726af975 Improves pretty printing of variable types in llvm-pdbdump adds ea87eb616e3 [InstCombine] fix matching of or-of-icmps constants (PR32524) adds 8b6100048eb [X86][MMX] Add fast-isel support for MMX non-temporal writes adds 0a52d06b894 [InstCombine] Use m_c_Add to shorten some code. Add testcas [...] adds 08a5893e913 Remove eol-style:native from BitVector.h adds d2f46ef6a61 Fix line endings. adds a360984c0bf [Support] Add support for finding unset bits in a BitVector. adds 40cf5b3d29a AMDGPU: Fix crash when disassembling VOP3 mac adds f4272d1c372 [InstCombine] Use commutable matchers and m_OneUse in visit [...] adds 42df88e1f83 [ARM/AArch64] Ensure valid vector element types for interle [...] adds 13d8288f8e0 MemorySSA: Make lifetime starts defs for mustaliased pointers adds 9b5d7f63748 [MemCpyOpt] Only replace memcpy with bitcast if address spa [...] adds e98c913509f [llvm-pdbdump] Display padding bytes on record layout adds a0e581d63e6 [InstSimplify] Use cast instead of dyn_cast after isa<> che [...] adds 4ac99f71cc0 [InstCombine] improve variable names; NFCI adds 20b5e3ba0be [mips] Use Triple::isLittleEndian to check endianness. NFC adds c29751d1b43 Fix signed / unsigned comparison warnings. adds df685624d01 Remove svn:eol-style properties from some files so 'git llv [...] adds a8b5a980c81 [IR] Make AttributeSetNode public, avoid temporary Attribut [...] adds bdbe8280f25 Add address space mangling to lifetime intrinsics adds d5d5d0b80ed Revert "[IR] Make AttributeSetNode public, avoid temporary [...] adds 9cf476f3113 Revert "[asan] Fix dead stripping of globals on Linux." adds 465b9a5c3d2 Revert "[asan] Put ctor/dtor in comdat." adds c6b073116e0 [GVNHoist] Call isGuaranteedToTransferExecutionToSuccessor [...] adds 5c741f7437f Emit less compiler optimization remarks in samplepgo to red [...] adds 995bc5b095a Bitcode: Merge the code for parsing global value module cod [...] adds 400ee3160b6 Get the TOC save offset off of PPCFrameLowering rather than [...] adds e0b3c335a27 Allow DataLayout to specify addrspace for allocas. adds ad1b74fa7d9 CodeGen: BranchFolding: Merge identical blocks, even if the [...] adds 132e8441ed9 CodeGen: BlockPlacement: Minor probability changes. adds 663903f2e86 CodeGen: BlockPlacement: Don't always tail-duplicate with n [...] adds 21197c2fc56 [MemorySSA] We don't need to compute dominator levels anymore. adds a2e505ede00 [NewGVN] Surround with parens to clarify allegedly ambiguou [...] adds ed488fa93dd [ARM, x86] add tests to show possible improvement for bool [...] adds 7dde8e89fc9 Reland "[IR] Make AttributeSetNode public, avoid temporary [...] adds e937c5e12f1 Remove AttributeSetNode::get(AttributeList, unsigned) and s [...] adds 7708dd836fa NewGVN: Don't propagate over phi backedges where undef caus [...] adds f47b8f1cd16 Revert "NewGVN: Don't propagate over phi backedges where un [...] adds a8ca30150ca [IR] Sink some AttributeListImpl methods out of headers NFC adds a65ac0dca0c [bugpoint] Also remove comdat's from externalized GVs adds 7ddaf9fa1f1 [PowerPC] multiply-with-overflow might use the CTR register adds bf06691a187 [LICM] Hoist fp division from the loops and replace by a re [...] adds 861af97ffa1 [LoopUnswitch] Fix a test case adds 70fe0347f52 [InstCombine] Support weird size element types in dyn_castNegVal. adds c2741201b52 [InstCombine] Refinement of r299915. Only consider a Consta [...] adds cd0241d19a9 [IR] Fix a typo in a comment. NFC adds 262869e2bf8 Simplify the code and remove dead code adds ec124b3a6f9 Turn some C-style vararg into variadic templates adds 4714fdf5957 [SelectionDAG] Check CALLSEQ_BEGIN nodes in DelayForLiveRegs adds 1d02724c713 Revert "Turn some C-style vararg into variadic templates" adds e49d0dbf86a [GlobalISel] LegalizerInfo: Enable legalization of non-powe [...] adds 0a032476a58 GlobalISel: Allow legalizing G_FADD to a libcall adds 465e205500e Add MachineRegionInfoPassID to Passes.h. adds 1a173576c93 [StripDeadDebug/DIFinder] Track inlined SPs adds 5074c86cc68 [SDAG] Reorder expensive StoreMerge Check after cheaper one. NFC adds da18b45fd0c [SDAG] Factor ChainMerge into helper function NFCI. adds 020cbfba488 [SDAG] Factor CandidateMatch check into lambda. NFC. adds 22bc776233c [GVNHoist] Re-enable GVNHoist by default adds 8cc8cfefdfb [ARM] Refactor Thumb2 sat instructions adds 6fb757e5743 [AVR] Migrate to new MCAsmBackend applyFixup adds afa9824a92d Remove unused functions. Remove static qualifier from funct [...] adds 9d54400bba7 Module::getOrInsertFunction is using C-style vararg instead [...] adds c9b31391b3a [Profile] PE binary coverage bug fix adds 4efddeefbfc revert r299851 - [InstCombine] fix matching of or-of-icmps [...] adds 3129c622b3d [PDB] Emit index/offset pairs for TPI and IPI streams adds 385894b5b5e Revert 299953 : test failure needs to be fixed adds 9015ee5fc73 [AMDGPU] Add A5 to data layout for amdgiz environment adds 3a60ccfe457 [InstCombine] Use ConstantExpr::getBinOpIdentity to impleme [...] adds be0ad757ca9 llvm-lto2: Move the LTO::run() action behind a subcommand. adds f79a56c2443 [libFuzzer] fix type in signal name. adds c3ff31ab3f1 [LV] Move first order recurrence test to common folder. NFC adds a031d73f8b5 Fix spelling compliment->complement. Mostly refering to 2s [...] adds 94a0ddaec9e [InstCombine] Add testcases for (B&A)^A -> ~B & A and (B|A) [...] adds 2ef157559bb [AddDiscriminators] Assign discriminators to MemIntrinsic calls. adds d7dec945d06 [X86] Create the correct ADC/SBB SDNode when lowering add. adds 4e34a0eb576 [AArch64] Simplify MacroFusion adds b86967b0063 MIR: Allow parsing of empty machine functions adds e0f5ddbc01d MemorySSA: Move to Analysis, from Transforms/Utils. It's us [...] adds 530eee55793 [InstSimplify] add tests for chains of shuffles; NFC adds 3d57035bd97 [LV] Avoid vectorizing first order recurrence when phi uses [...] adds 9a12eacf3d3 [x86] Relax the check in areLoadsFromSameBasePtr adds 4fb7a1861e5 [DAGCombine] Add more test cases for shuffle of splat. NFC. adds f14c498699f InstSimplify: A shuffle of a splat is always the splat itself adds b66309b465c Minor updates to floating point intrinsic documentation adds 15d522b811d Avoid some string copies, NFC adds 7feea4e245b [AArch64] Fix scheduling info for INS(vector, general) inst [...] adds adabd2ad348 [asan] Give global metadata private linkage. adds 3bca0534eec AMDGPU: Prune unecessary include adds 651ac560976 AMDGPU: Fix folding reg_sequence into copy to phys reg adds 938bfaf893c AMDGPU: Refactor argument lowering adds 56db90276b4 AMDGPU: Refactor SIMachineFunctionInfo slightly adds 8c86ad544bb AMDGPU: Insert wait at start of callee functions adds 824c3767b35 Remove xgene1 from host detection adds 06090406b0c [IR] Add AttributeSet to hide AttributeSetNode* again, NFC adds 2a0eb61dccc [WebAssembly] Update use of Attributes after r299875 adds e9dc13a1838 Revert "[WebAssembly] Update use of Attributes after r299875" adds 4a0d76ba2f3 ThinLTOBitcodeWriter: keep comdats together, rename if lead [...] adds 92625cfb474 CodeGen: BlockPlacement: Clear ComputedEdges between functions. adds d3302ddc52a [AMDGPU] Add a new pass to insert waitcnts. Leave under an [...] adds 81e9372c9e3 [INC] Test commit. NFC. adds 4f5f4e9e2a6 [BPI] Refactor post domination calculation and simple fix f [...] adds 96d92eadca2 [InstCombine][IR] Add a commutable BinOp matcher. Use it to [...] adds 00b79068c49 [IR] Fix copy and paste mistake in comment. NFC adds ddfada260ad [IR] Redesign the case iterator in SwitchInst to actually b [...] adds 3512d22fea4 Invariant.group and mustalias docs fixes adds a22205806d2 [LoadCombine] Avoid analysing dead basic blocks adds 81de2d08abe [globalisel][tablegen] Add experimental support for Operand [...] adds 76dc6181d8c [IR] Rename the class templates for the case iterator and c [...] adds 2b0a45f335f [DWARF] - Refactoring of DWARFContextInMemory implementation. adds 9a421935fb7 [AMDGPU] SDWA: make pass global adds 715890b2794 [LangRef] fix documentation adds 6120b8f9e92 [DWARF] Fix compiler warnings in DWARFContext.cpp, NFCi adds c33bdfa7b1f [SystemZ] TargetTransformInfo cost functions implemented. adds 2778098e176 [SystemZ] Updated test fp-cast.ll adds fcce15e3902 [AMDGPU][MC] Corrected src0 size for s_cbranch_join adds 43d439da886 [LoopVectorizer, TTI] New method supportsEfficientVectorEl [...] adds e353fb8d83b [GlobalIsel][X86] support G_CONSTANT selection. adds 16b23e95d58 [LoopVectorizer] Improve handling of branches during cost [...] adds 2b37175e41f [MachineBlockPlacement] Clean up data structures a bit. adds 4e5abdf67c5 [MachineBlockPlacment] Add an assert to ensure there is no [...] adds 0b09474fe1a [SLPVectorizer] Pass the right type argument to getCmpSelI [...] adds 944d939ce13 Fix detection of backtrace() availability on FreeBSD adds e4957d5a3e1 Remove redundant type casts adds c2dad95b1e5 Fix a RUN line in new test. adds df5e51ce8f9 [AMDGPU][MC] Corrected ds_wrxchg2* to support two offsets adds e930b092c40 [InstCombine] morph an existing instruction instead of crea [...] adds 6f3228cc826 Fix the bootstrap failure caused by r299986. adds 405c945bb5c [AMDGPU][MC] Corrected encoding of V_MQSAD_U32_U8 for CI adds 490024c9341 [WebAssembly] Update use of Attributes after r299875 adds ef86a1e6af9 [AMDGPU][MC] Corrected parsing of v_cmp_class* and v_cmpx_class* adds 3461e9c2e46 Teach SimplifyDemandedUseBits that adding or subtractings 0 [...] adds b4ede06cc4c [AMDGPU][MC] Added support for several VI-specific opcodes [...] adds 3183fbc849f [SystemZ] Fix target specific tests adds 73ba5e94152 [SystemZ] Fix more target specific tests adds c7bad98e0ee [InstCombine] Move portion of SimplifyDemandedUseBits that [...] adds 6b814345d13 MachineScheduler: Skip acyclic latency heuristic for in-ord [...] adds 51f7e1a9dc7 [InstCombine] Teach SimplifyDemandedInstructionBits that ev [...] adds d9096c73918 [InstCombine] In SimplifyMultipleUseDemandedBits, use a swi [...] adds 1c404b475de llvm-lto2: Add a dump-symtab subcommand. adds 718593b3f9a CodeGen: BlockPlacement: Add comment about DenseMap Safety. adds c5de42f38f5 [SelectionDAG] Use APInt move assignment to avoid 2 memory [...] adds 2c5adb18ba8 [InstCombine] fix wrong undef handling when converting sele [...] adds 1db7e25e94b [InstCombine] Remove unreachable code for turning an And wh [...] adds d0d13f5774d [InstCombine] Teach SimplifyMultipleUseDemandedBits to hand [...] adds 12e38cb73b4 Remove svnprop eol-style:native from Casting.h adds ab480f45cd2 [Support] Add support for unique_ptr<> to Casting.h. adds 5bfc47d1521 Bitcode: Move version and global value module code parsers [...] adds 4f344492bbb Append -w when LLVM_ENABLE_WARNINGS is Off. adds 6f93f61542c Remove readnone from invariant.group.barrier adds bb9002fbb26 [AMDGPU] Generate range metadata for workitem id adds ab28f3b39e5 AMDGPU: Fix invalid copies when copying i1 to phys reg adds 7c6ef2a2995 [IR] Assert that we never create an empty AttributeListImpl, NFC adds 53726fa11ac [ValueTracking] Teach GetUnderlyingObject to stop when it r [...] adds f31bea8f808 [IR] Make AttributeSet constructor from AttributeSetNode* explicit adds b25869aa9e7 [InstSimplify] Don't try to constant fold AllocaInsts since [...] adds 69dba786840 [libFuzzer] XFAIL fuzzer-oom.test on Darwin. adds 7724dc63a78 [llvm-pdbdump] More advanced class definition dumping. adds 67dcd802e32 [llvm-pdbdump] Minor prepatory refactor of Class Def Dumper. adds e05ab25f5dd ArgList: cache index ranges containing arguments with each ID adds 71cd6a6292c Fix initialization order of class members. adds e22326d7b4a Fix some ArgList uses after API change in r300135. adds 24e7b0fb5cf AMDGPU : Fix common dominator of two incoming blocks termin [...] adds fae6220cbbf Fix compiler error in Attributes.cpp ``` Compiling Attribut [...] adds dc359e4a20c Work around MSVC rejects-valid bug related to C++11 narrowi [...] adds 2d32ddf1434 [IR] Remove the APIntMoveTy typedef from ConstantRange. Use [...] adds e9a46bf123c [IR] Take func, ret, and arg attrs separately in AttributeL [...] adds a43d3686c7c [ORC] Use native Errors rather than converted std::error_co [...] adds ebc666e155b [ORC] Add missing file from r300155. adds 8b69529e74e Support: Add a VCSRevision.h header file. adds 422574b6f8c [InstCombine] Add vector version of a test to show missing [...] adds 55525ab26b9 Remove some unused private fields. adds ed576a186fb [ORC] Add RPC and serialization support for Errors and Expecteds. adds c1231f81aea Update the LangRef to reflect reality. adds cd686df68a2 [APInt] Generalize the implementation of tcIncrement to sup [...] adds d8ea48f65f4 [ORC] Remove extraneous semi-colon added in r300167. adds c170edb60bb [APInt] Reorder fields to avoid a hole in the middle of the class adds d6137707334 Remove more lies from the LangRef. adds 24828a324b2 [ORC] Remove more extraneous semicolons from r300167, renam [...] adds e460ede847d [Orc] Fix bool serialization for RawByteChannels. adds 679e17374bd [ORC] Temporarily disable the RPC Error/Expected unit tests [...] adds 3d5761e1a92 Fix typo in static_assert message. NFC adds 17f2fca6082 [LV] Refactor ILV to provide vectorizeInstruction(); NFC adds 456f727677e [X86] Change instructions names to keep consistency with th [...] adds 4c76a123930 Reverting cmake/modules/AddLLVM.cmake changes from revision [...] adds 78f9d9d6a43 [globalisel][tablegen] Report more detail in some Selection [...] adds 2c882c2737b [DWARF] - Simplify (use dyn_cast instead of isa + cast). adds 67b50524f64 [X86] Added missing mayLoad/mayStore attributes to some X86 [...] adds 4aae21ea76b llvm/test/BugPoint/compile-custom.ll: Use %/s for its path [...] adds cf2d2611cfc Use methods to access data stored with frame instructions adds db734f0a3dd [Hexagon] Fix "LowerFormalArguments emitted a value with th [...] adds 7fa51d159a9 [Hexagon] Implement HexagonTargetLowering::CanLowerReturn adds 0f154b0e368 Re-apply "[GVNHoist] Move GVNHoist to function simplificati [...] adds 718498681fb [InstCombine] add/move tests for or-of-icmps; NFC adds 9defcc42050 [InstCombine] fix assert to not always be true adds d8dec6c86f9 [Hexagon] Unxfail passing tests adds 7f80f1bbf58 LTO: Pass SF_Executable flag through to InputFile::Symbol adds 9c0f53a0b48 [APSInt] Add a static_assert to ensure APSInt is packed wel [...] adds b2b7c4b1a73 [Analysis] Support bitreverse in -demanded-bits pass adds 0f68a54cc99 Revert r300213 "[APSInt] Add a static_assert to ensure APSI [...] adds 104e2fb761d [APInt] Fix the returns description for the postfix increme [...] adds c1e5fd3c421 [InstCombine] use similar ops for related folds; NFCI adds b39f4c5d6c0 [APSInt] Remove named And/Or/Xor methods. adds 881e9f31775 [AMDGPU] Combine DS operations with offsets bigger than byte adds 0bd53cd74c0 [ArgPromotion] Don't drop !prof metadata on promoted calls adds d2a36f278b1 [InstCombine] Simplify attribute code with new AttributeLis [...] adds a7bdbbca61d [ValueTracking] Move a temporary APInt instead of copying it. adds fe376941a24 [DAE] Simplify call site replacement code with CallSite NFC adds 7784ce736d8 [InstCombine] fold X == 0 || X == -1 to one compare (PR32524) adds 0bd00d7d97b [LV] Fix the vector code generation for first order recurrence adds e1c6ddcf64d [ValueTracking] Prevent a call to computeKnownBits if we al [...] adds 14eaa3c97f2 SamplePGO: convert callsite samples map key from callsite_l [...] adds 042486c4488 [DAG] Fold away temporary vector in store candidate merge NFC. adds 3ce76120dda [LCSSA] Use `auto` when the type is obvious. NFCI. adds 24b800cc1d4 [LCSSA] Remove spurious whitespaces. NFCI. adds c099906b133 [LCSSA] Assert that we always have a valid loop. adds caf5bedd42f [InstCombine] Fix !prof metadata preservation for invokes adds 74413b926ab Remove all allocation and divisions from GreatestCommonDivisor adds ef30b29ef51 Revert accidentally-committed files in r300252. adds 85740fd11e5 Fix -Wunused-value warning adds 77643b4d4f9 [LCSSA] Efficiently compute blocks dominating at least one exit. adds a402bd1ba7a [ValueTracking] Remove duplicate call to computeKnownBits f [...] adds 10683346a57 [llvm-pdbdump] Recursively dump class layout. adds ed853677385 [CMake][runtimes] Use -nodefaultlibs for the runtimes build adds e7866ab1801 [InstCombine] Use APInt::getBitsSetFrom instead of invertin [...] adds 6ac17df7d79 [Support] Fix ErrorOr assertion when /proc/cpuinfo doesn't exist. adds 1130138bb15 MIRLangRef: Simplify/update documentation adds c67ef6aaf75 [bpf] Fix memory offset check for loads and stores adds 1c35defd748 [IR] Make getParamAttributes take argument numbers, not ArgNo+1 adds c941e1f94e1 build_llvm_package.bat: Move to VS2017 adds 2b1bb6d8f89 AMDGPU/GFX9: Do not use v_pack_b32_f16 when packing adds 0100c808ce5 [AArch64] Avoid partial register writes on lane 0 of BUILD_ [...] adds 2fc706bf3c5 [Profile] PE binary coverage bug fix adds dc1a361ccdc MIRLangRef: Add a section on simplifying .mir tests adds fefad770b8b Simplify some Verifier attribute checks with AttributeSet adds cf5b18b7008 [ORC] Re-enable the Error/Expected unit tests that were dis [...] adds b02882850b8 [AMDGPU] added SIInstrInfo::getAddNoCarry() helper adds 0b8d594c8b3 LLVMCodeGen: Add ProfileData into deps corresponding to r300277. adds 5dbce153e78 Use transform instead of manual loop; NFC adds 96ed2063265 Use range-for; NFC adds c432779417b NewGVN: Don't propagate over phi backedges where undef caus [...] adds a9b9e013db8 Object, LTO: Add target triple to irsymtab and LTO API. adds de136fdf4c5 Fix test failure on windows: pass module to getInstrProfXXN [...] adds d62c8b31512 [InstCombine] Use APInt::setSignBit and APInt::isNegative(). NFC adds 24f10721515 [ValueTracking] Use APInt::sext instead of zext and setBits [...] adds 7796f70177b [ValueTracking] Use APInt::isNegative(). NFC adds 3557926315c [ValueTracking] Calculate the KnownZeros for Intrinsic::ctp [...] adds e92557c9308 [LV] Remove implicit single basic block assumption adds 3796561c6ee This patch closes PR#32216: Better testing of schedule mode [...] adds 1ad79db10eb Add more test cases for StringRef::edit_distance adds 613b188e314 Fix for PR#30562: Selection DAG error: Detected cycle in Se [...] adds e0e3f379442 [AMDGPU][MC] Enabled constants for src operands of s_cbranc [...] adds 7ad0e8bdbf3 [AMDGPU][MC] Corrected ds_write_src2_* to require one offse [...] adds ede58cd8441 Reorder StoreMergeCandidates to run faster. NFCI. adds 693dd9f10c9 Fix missing virtual destructor to silence build warning. adds 99a634fdf11 [X86][SSE] Update MOVNTDQA non-temporal loads to generic im [...] adds c15f9695db7 [Bugpoint] Use boolean AND instead of bitwise AND (PR32660) adds c7e0860814f [Hexagon] Make a couple of passes compliant with -opt-bisect-limit adds cfd7f99b333 Remove NormalizeAutodetect; NFC adds fe33eb87105 Tighten the API for ScalarEvolutionNormalization adds b50ba92cd81 Add a unit test for SCEV Normalization adds 7fd520400d4 Simplify PostIncTransform further; NFC adds edfd87d4812 Use range for adds 3a98382e184 [Hexagon] Fix a latent problem with interpreting live-in la [...] adds 6e68f3381d6 Add missing #include for STLExtras adds 58bea371b9d [RDF] Refine propagation of reached uses in liveness computation adds 69a0438a059 Delete some unnecessary boilerplate adds 4a9d2df17bf Remove "#if 0"ed out assert adds ec87df5c2db [FunctionImport] assert(false) -> llvm_unreachable(). NFCI. adds 0e9e7d51d92 [RDF] Switch RegisterAggr to a bit vector of register units adds 2eb84fd76a4 Add missing #include adds e4f44dfa739 Make SCEVRewriteVisitor smarter about when it trys to create SCEVs adds 4c23f32e1e5 Rewrite SCEV Normalization using SCEVRewriteVisitor; NFC adds 8806d7a68a6 Use range-for in a few places adds aaf7ddc474c Update tests for the patch. adds e8752f4f056 [Profile] Make host tool aware of object format when querin [...] adds c1656ad2273 [InstCombine] Refactor SimplifyUsingDistributiveLaws to mor [...] adds b4e05013d04 [ValueTracking] Avoid undefined behavior in unittest by not [...] adds 41a76abbb9e [InstCombine] add/move tests for and/or-of-icmps equality f [...] adds 6142660ca8b [InstCombine] Regenerate test checks using script. NFC adds aa717883e8c [Test commit] Cleanup some whitespace in a test file adds d8c6515dbf8 [AMDGPU] set read_only access qualifier for pointers adds 0b4a709cf73 [InstCombine] Support folding a subtract with a constant LH [...] adds 285779ca0f4 [InstCombine] (X != C1 && X != C2) --> (X | (C1 ^ C2)) != C [...] adds a70c36a148b [WebAssembly] Improve readobj and nm support for wasm adds 2bb40bf0782 [libFuzzer] more trophies adds 1f8f0490690 [IR] Make paramHasAttr to use arg indices instead of attr indices adds 05d022e31ee [RDF] Correctly enumerate reg units for reg masks adds ce27c612e60 [RDF] No longer ignore implicit defs or uses on any instructions adds 61f35170e7a [InstCombine] MakeAnd/Or/Xor handling to reuse previous API [...] adds 78d2f5fa4d9 Generalize SCEV's unit testing helper a bit adds 737d8b68096 [ProfileData] Unify getInstrProf*SectionName helpers adds a051d980fff Cache the DataLayout rather than looking it up frequently. adds bbbafde8bfb Tidy checking for the soft float attribute. adds 55d12253766 [InstCombine] add tests to show missing transforms for vect [...] adds c4cce50c34e [InstCombine] allow (X != C1 && X != C2) and similar patter [...] adds df332423cfc Use correct registers for "A" inline asm constraint adds 2f3c5dbfdb6 [APInt] Fix a bug in lshr by a value more than 64 bits abov [...] adds aacdb999ef4 [X86][X86 intrinsics]Folding cmp(sub(a,b),0) into cmp(a,b) [...] adds 997ed308f7b [Constants] simplify get true/false code; NFCI adds 9c08b69245c Garbage collect HAVE_EXECINFO_H from config.h.cmake after r [...] adds c2b0974b936 [InstSimplify] improve getTrue/getFalse; NFCI adds 8f7c2a67b82 MemorySSA: Stop tracking def-or-use blocks. adds 48452ec4772 [X86] Remove special handling for 16 bit for A asm constraints. adds bfe2c605676 [InstCombine] In SimplifyDemandedUseBits, don't bother to m [...] adds 0bd8066c868 [LCSSA] Fix non-determinism due to iterating over a SmallPtrSet. adds 9563b959554 [InstCombine][ValueTracking] When computing known bits for [...] adds f763838a0b4 [LCSSA] Simplify a loop. NFCI. adds 023ae40959d [InstCombine] Add test cases for missing support for turnin [...] adds f84ee35832e [InstCombine] Add support for turning vector sdiv into udiv. adds 2b555ede154 [InstCombine] Add missing testcases for srem->urem conversi [...] adds b39b99c0aad [InstCombine] Add support for vector srem->urem. adds af3add1d491 [InstCombine] Add test cases for missing support for simpli [...] adds b844f35bcd7 [InstCombine] Simplify 1/X for vectors. adds 8c6e6605aa4 [BPI] Use metadata info before any other heuristics adds db6b21de413 [LoopPeeling] Fix condition for phi-eliminating peeling adds 38eae0ca5ea [BPI] NFC: reorder ifs to bail out earlier adds 63c0d1d702c [LoopPeeling] Get rid of Phis that become invariant after N steps adds 603e72e193c Introducing LLVMMetadataRef adds 5c0006e064a [LCSSA] Don't insert tokens into the worklist at all. adds 6d01b814853 AMDGPU: SimplifyDemandedElts for image intrinsics adds f1a890db285 Introduce APInt::isSignBitSet/isSignBitClear. Use in place [...] adds a017dc69651 AArch64: support nonlazybind adds 0c79d1f4e07 Distinguish between code pointer size and DataLayout::getPo [...] adds 6163b4af732 Bitcode: Add a string table to the bitcode format. adds fc84bd3dbe4 Object: Use offset+size as the irsymtab string representation. adds 82b3362feae AMDGPU: Set CodePointerSize to 8 for amdgcn adds 1ba7d194288 [IR] Put the Use list waymarking bits in the bit positions [...] adds 8e598253826 AMDGPU: Test handling of R_AMDGPU_ABS64 in RelocVisitor adds 8f48abe12db AArch64: put nonlazybind special handling behind a flag for now. adds 7b19c164adb [IR] Implement DataLayout::getPointerTypeSizeInBits using g [...] adds ef47b09cd91 [APInt] Remove self move check from move assignment operator adds c45a5a4d32c Bitcode: Add missing build dep to fix shlib build. adds 3778de46350 Unbreak build of the wasm backend after r300463. adds 80269962da6 [CodeGenPrepare] Fix crash due to an invalid CFG adds fc3524b1a2d AMDGPU: Change stack alignment adds 74ac54ec5bb AMDGPU: Use MachineRegisterInfo to find max used register adds 3b1256dc1d7 Add GNU_discriminator support for inline callsites in llvm- [...] adds e39a78c9519 [WebAssembly] Encode block signatures as SLEB instead of ULEB adds 9fc2ff7f340 Update the test to fix the buildbot failure introduced by r [...] adds 4aa15d3d334 [InstSimplify] add/move tests for (icmp X, C1 & icmp X, C2); NFC adds e35a5f55184 [SCEV] Add a local cache for getZeroExtendExpr and getSignE [...] adds 61710dfa3ab [InstCombine] Matchers work with both ConstExpr and Instructions. adds cd789d8cfe1 Add a linker script to version LLVM symbols adds b662731542a [libFuzzer] experimental option -cleanse_crash: tries to re [...] adds c2c171286cf Fix an unused variable error in rL300494. adds 2e4163e54d5 [SCEV] Fix another unused variable warning in release builds. adds fee2961b5ac [WebAssembly] Fix WebAssemblyOptimizeReturned after r300367 adds 9128da58315 [APInt] Merge the multiword code from lshrInPlace and tcShi [...] adds 538a54682a7 [SimplifyCFG] Use hasNUses instead of comparing getNumUses [...] adds e8773635a3b Change the testcase tail-merge-after-mbp.ll to tail-merge-a [...] adds 62b2c39c085 Build SymbolMap in SampleProfileLoader to help matchin func [...] adds 4df72d14c8b Object: Shrink the size of irsymtab::Symbol by a word. NFCI. adds 540c0392b5a [Target] Use hasOneUse() instead of getNumUses(). adds cc56be2830e Add const to a const method. NFC adds b560ea777b0 PR32382: Fix emitting complex DWARF expressions. adds 4bf2830a010 [APInt] Make operator<<= shift in place. Improve the implem [...] adds 0f06c8216fc [APInt] Cleanup the reverseBits slow case a little. adds 6aff9c90154 test commit adds d18725e897b [GlobalISel] Support vector-of-pointers in LLT adds ed0381e4388 [ARM] Check for correct HW div when lowering divmod adds 83bb944fae9 Fix gcc build after r300535. adds 0d04c2b2a9a Revert "[GlobalISel] Support vector-of-pointers in LLT" adds c3a1bd43f40 [SampleProfile] Skip intrinsic calls when visiting callsite [...] adds 615f6579bd0 [SampleProfile] Don't assert when printing the DebugLoc of [...] adds 51238028abb [ARM] GlobalISel: Add support for G_SUB adds 129d6cdefec [ARM] Add hardware build attributes in assembler adds 76b885c0b41 Add store Merge test. adds 8bb4e6d1851 [GVNHoist] Mark GlobalsAA as preserved by GVNHoist. adds 2d0d1f3d178 Make globalaa-retained.ll test catching more cases. adds ddb79e619dd [ConstantRange] fix doxygen comment formatting; NFC adds e9d7070f016 [LV] Cache block mask values adds fdc4eb0ce7e LoopRerollPass: Prefer Value::hasOneUse() over Value::getNu [...] adds 80658778361 Add base-index-based store merge test adds e77d07916ef [DAG] Improve store merge candidate pruning. adds d80bc42060a NewGVN: Don't waste time value numbering unreachable blocks adds df220349394 [APInt] Use lshrInPlace to replace lshr where possible adds 248df79ddd6 [X86] Use for-range loop. NFCI. adds 6e087c51520 [SLP vectorizer] Allow phi node reordering in tryToVectorizeList. adds 6c361eb2972 [X86][SSE] Add scheduling latency/throughput tests for (mos [...] adds 461e0b352d5 [APInt] Inline the single word case of lshrInPlace similar [...] adds 21b4d8e9b9a [X86] Keep EXTRACT_VECTOR_ELT result type as f128 for Andro [...] adds f5a8309ea32 NewGVN: Fix memory congruence verification. The return true [...] adds 649ee281808 [MemoryBuiltins] Use ImmutableCallSite instead of CallSite [...] adds 6adfad1341a AMDGPU: Make MFI fields private adds 632c2834200 Fix typo adds 663bdf65c59 DAG: Make mayBeEmittedAsTailCall parameter const adds 0b4630581a4 [LoopReroll] Prefer hasNUses/hasNUses or more as they're ch [...] adds a8fe21d79ae [MemoryBuiltins] Add isMallocOrCallocLikeFn so BasicAA can [...] adds 51ccb32245b Add a getPointerOperandType() helper to LoadInst and StoreI [...] adds 129271c86a7 Fix crash in AttributeList::addAttributes, add test adds 2fdc2378175 [x86] add tests for potential andn optimization; NFC adds 19d17b65bdb [ConstantRange] Optimize APInt creation in getSignedMax/get [...] adds 44292db8902 [XRay][tools] Add option to llvm-xray extract to symbolize [...] adds 18daf4ef225 [AVR] Fix the build adds 35e5e58dc50 Allow suppressing host and target info in VersionPrinter adds d007524faa9 [XRay][tools] Fix yaml matching to be more permissive adds fb21a1a7792 [DataLayout] Removed default value from a variable that isn [...] adds c03abe83a33 ARMFrameLowering: Reserve emergency spill slot for large arguments adds afe170774a3 [AVR] Migrate to new MCAsmInfo CodePointerSize adds d4cfbc56b18 [libFuzzer] update -help: mention -exact_artifact_path in h [...] adds 4bc9eb623db Remove buggy 'addAttributes(unsigned, AttrBuilder)' overload adds 4b58a5066b1 ARM: Use methods to access data stored with frame instructions adds 97b95a7b729 Cleanup some GraphTraits iteration code adds b9fe533b26e [JumpThread] We want to fold (not thread) when all predeces [...] adds c1b4c393a32 Revert r300657 due to crashes in stage2 of bootstraps: http [...] adds ec70be0eaf7 [GlobalISel] Remove non-determinism from IRTranslator. adds bece65fd181 [GlobalISel] Support vector-of-pointers in LLT adds 909758a6a6a [ARM] GlobalISel: Add support for G_MUL adds f85765dc4f3 [GlobalISel][X86] Split select tests. NFC. adds e6eaf3dfe61 Revert "ARMFrameLowering: Reserve emergency spill slot for [...] adds e9d3d132cef [X86][SSE] Add scheduling latency/throughput tests for (mos [...] adds 85e6b8c8b97 [X86] Add D32039/PR31357 tests to show current BSWAP codegen adds c0199e4844a [GlobalIsel][X86] support G_TRUNC selection. adds 4c9576b0d28 [AVR] Fix the test suite adds 83479b7405a Regenerate test. NFCI. adds a7de5df7fd2 [AVR] Remove the 'multibyte' asm test adds e874e438549 [DAG] Loop over remaining candidates on successful merge of [...] adds c99545d60ad [InstSimplify] Deduce correct type for vector GEP. adds 2d19a458639 Using address range map to speedup finding inline stack for [...] adds 78415aba70c [ARM] add test and auto-generate checks; NFC adds f60747136ea [PowerPC] add test and auto-generate checks; NFC adds cfaa15d9055 [Hexagon] Cache reached blocks in bit tracker instead of sc [...] adds 111ac46fe72 [RDF] Cache register units for reg masks instead of recalcu [...] adds 1896b7912b1 [RDF] Use faster version of findBlock adds ad6758286ad [RDF] Switch NodeList to SmallVector from std::vector adds f6728e6d7da [Hexagon] Remove RDefMap, use Liveness:getNearestAliasedRef [...] adds d9552968c46 [Hexagon] Generate proper offset in opt-addr-mode adds 815d217552d Revert r300697 which causes buildbot failure. adds f1e3a3638c1 Remove eol-style:native from MathExtras.h adds dc88b88a05f [Support] Add some helpers to generate bitmasks. adds a036dbbac59 Add an #include for <climits> for CHAR_BIT. adds af30bb9796f use 'auto' with 'dyn_cast' and fix formatting; NFC adds 19e4f8f1d92 [InstSimplify] fold identity shuffles (recursing if needed) adds 51a84388011 [APInt] Move the 'return *this' from the slow cases of assi [...] adds 8ccdc594587 [InstCombine] Reduce visitLoadInst() code duplication. NFCI. adds d6b4b10a395 Prefer addAttr(Attribute::AttrKind) over the AttributeList [...] adds 610621c4ba1 AMDGPU: Change DivergenceAnalysis for function arguments adds 902e7e59d19 AMDGPU: Don't align callable functions to 256 adds 5c42a4d473b [MathExtras] Fix undefined behavior (shift by bit width) adds f7fa9ffd087 IR: Remove some comments that are documenting the obvious. NFC. adds 14ee3d3d791 [DAG] add splat vector support for 'and' in SimplifyDemandedBits adds 8a1f075c935 ARM: TLS calling convention doesn't preserve r9 or r12 on Darwin. adds eab85946c15 Update comment to match r300252. adds 980a21c3065 [GVN] Don't coerce non-integral pointers to integers or vice versa adds fe6b2045f82 StructurizeCFG: Directly invert cmp instructions adds de213fd92a9 [AMDGPU][mc][tests][NFC] Update bulk ISA tests for Gfx7 and Gfx8 adds 48c8dfd6477 [tblgen] GCC/MS builtin to target intrisics map. adds 0e1e60b73a9 AMDGPU: Don't emit amd_kernel_code_t for callable functions adds f0c95e1f1a4 PR32710: Disable using PMADDWD for unsigned short. adds e708328af67 Update the madd.ll test with utils/update_llc_test_checks.py (NFC) adds fd134f768b3 Using address range map to speedup finding inline stack for [...] adds b4afe9c79f5 [SCEV] Make SCEV or modeling more aggressive. adds a5ac74c2973 [APInt] Use SignExtend64 instead of reinventing it. NFC adds 89e89fb349e [ARM] Use TableGen patterns to select vtbl. NFC. adds 2684aaead6b [InstCombine] Add frem constant folding test (PR32177) adds 4925efae1f9 [GISEL]: Move getConstantVReg to Utils adds 3767f141eb5 [ARM] Remove redundant computeKnownBits helper. adds 074b06ad8d4 Code style change as suggested in https://reviews.llvm.org/ [...] adds ac9b651ab61 AMDGPU: Custom lower illegal small select types adds 6c2fd36052e [InstCombine] Add frem constant folding test (PR3316) adds 3bebc1eb2e5 [APInt] Cast calls to add/sub/mul overflow methods to void [...] adds ed95c621a6d ARMFrameLowering: Reserve emergency spill slot for large arguments adds 27b613382c6 [DAG] add splat vector support for 'xor' in SimplifyDemandedBits adds 47ba2c1622a [libFuzzer] remove -output_csv option. It duplicates the de [...] adds 06c0527072a [sanitizer-coverage] remove stale code adds 2aa6ae886a7 [DAG] add splat vector support for 'or' in SimplifyDemandedBits adds 119d9368287 [APInt] Cast more calls to add/sub/mul overflow functions t [...] adds 11bae79f9c6 Remove two unused variables (-Werror). adds d89a81f5c94 [sanitizer-coverage] remove some more stale code adds 86bfc787f13 [Object] Fix some Clang-tidy modernize and Include What You [...] adds 0749000e144 X86FrameLowering: Fix getFrameIndexReference() for 'fixed' objects adds a716933950c Refresh the statepoint docs a bit adds 6b92d164d6c Temporarily revert r299221 to fix nondeterminism in ThinLTO [...] adds e7cb3935c62 Simplify test for sret attribute in instcombine adds 6a6847fd694 [GlobalOpt] Simplify attribute code stripping nest, NFC adds d3e13b98628 [libFuzzer] Always build libFuzzer adds 0c5a2b47dc7 Fix bug that caused DwarfExpression to drop DW_OP_deref fro [...] adds 453ce6b7183 Revert earlier change. ds permute operations affect lgkm counter. adds 113bca21d3e Revert "Fix bug that caused DwarfExpression to drop DW_OP_d [...] adds ffa4b4378e6 Fix bug that caused DwarfExpression to drop DW_OP_deref fro [...] adds d92618f3220 Revert r300789: There are Windows bot failures. adds ae23971d1e2 [DAE] Simplify attribute list creation, NFC adds 29c6d769ca2 [APInt] Use ugt(uint64_t) for the compare in getLimitedValu [...] adds ef5181372f9 Statepoint Docs: fix incorrect uses of it's adds 25d6dbfc6a4 [APInt] Don't call getActiveBits() in ult/ugt(uint64_t) if [...] adds ba583aa0267 [APInt] Implement operator==(uint64_t) similar to ugt/ult(u [...] adds 7634af30c1e [libFuzzer] extend help for -minimize_crash to cover ASAN_O [...] adds 786ac2097e3 Revert "[libFuzzer] XFAIL fuzzer-oom.test on Darwin." new 452fac1bdef Updating branches/google/stable to r300801

The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: .gitignore | 3 +- CMakeLists.txt | 3 + bindings/go/llvm/IRBindings.cpp | 13 + bindings/go/llvm/IRBindings.h | 19 +- bindings/go/llvm/ir.go | 14 + bindings/go/llvm/ir_test.go | 39 + cmake/config-ix.cmake | 5 +- cmake/modules/AddLLVM.cmake | 3 +- cmake/modules/AddSphinxTarget.cmake | 7 +- cmake/modules/HandleLLVMOptions.cmake | 4 + cmake/modules/VersionFromVCS.cmake | 84 +- docs/AliasAnalysis.rst | 2 +- docs/BitCodeFormat.rst | 52 +- docs/Coroutines.rst | 38 +- docs/Extensions.rst | 6 +- docs/GettingStarted.rst | 26 +- docs/LLVMBuild.rst | 2 +- docs/LangRef.rst | 101 +- docs/LibFuzzer.rst | 2 + docs/MIRLangRef.rst | 78 +- docs/ProgrammersManual.rst | 34 +- docs/SourceLevelDebugging.rst | 22 +- docs/Statepoints.rst | 159 +- docs/XRayExample.rst | 273 + docs/index.rst | 4 + examples/BrainF/BrainF.cpp | 8 +- examples/BrainF/BrainFDriver.cpp | 2 +- examples/Fibonacci/fibonacci.cpp | 3 +- examples/HowToUseJIT/HowToUseJIT.cpp | 7 +- examples/ParallelJIT/ParallelJIT.cpp | 6 +- include/llvm-c/Core.h | 10 + include/llvm-c/Transforms/Scalar.h | 3 + include/llvm-c/Types.h | 7 + include/llvm-c/lto.h | 144 +- include/llvm/ADT/APFloat.h | 3 + include/llvm/ADT/APInt.h | 440 +- include/llvm/ADT/APSInt.h | 3 - include/llvm/ADT/BitVector.h | 40 + include/llvm/ADT/BreadthFirstIterator.h | 164 + include/llvm/ADT/DepthFirstIterator.h | 2 +- include/llvm/ADT/PointerUnion.h | 8 +- include/llvm/ADT/SetVector.h | 2 +- include/llvm/ADT/SmallBitVector.h | 29 + include/llvm/ADT/SmallPtrSet.h | 6 +- include/llvm/ADT/iterator.h | 25 + include/llvm/Analysis/AliasAnalysis.h | 8 + include/llvm/Analysis/BlockFrequencyInfoImpl.h | 12 +- include/llvm/Analysis/BranchProbabilityInfo.h | 2 + include/llvm/Analysis/CFGPrinter.h | 3 +- include/llvm/Analysis/ConstantFolding.h | 6 + include/llvm/Analysis/DominanceFrontierImpl.h | 8 +- include/llvm/Analysis/InstructionSimplify.h | 8 + include/llvm/Analysis/LoopInfo.h | 23 +- include/llvm/Analysis/LoopInfoImpl.h | 80 +- include/llvm/Analysis/MemoryBuiltins.h | 5 + include/llvm/Analysis/MemorySSA.h | 1155 +++ include/llvm/Analysis/MemorySSAUpdater.h | 153 + include/llvm/Analysis/ObjectUtils.h | 42 + include/llvm/Analysis/ScalarEvolution.h | 29 + include/llvm/Analysis/ScalarEvolutionExpressions.h | 66 +- .../llvm/Analysis/ScalarEvolutionNormalization.h | 45 +- include/llvm/Analysis/TargetTransformInfo.h | 88 +- include/llvm/Analysis/TargetTransformInfoImpl.h | 17 +- include/llvm/Bitcode/BitcodeReader.h | 4 + include/llvm/Bitcode/BitcodeWriter.h | 14 + include/llvm/Bitcode/LLVMBitCodes.h | 17 +- include/llvm/CMakeLists.txt | 1 + include/llvm/CodeGen/Analysis.h | 7 - include/llvm/CodeGen/AsmPrinter.h | 3 + include/llvm/CodeGen/BasicTTIImpl.h | 60 +- include/llvm/CodeGen/ExecutionDepsFix.h | 3 +- include/llvm/CodeGen/FastISel.h | 12 +- .../llvm/CodeGen/GlobalISel/InstructionSelector.h | 3 + include/llvm/CodeGen/GlobalISel/LegalizerHelper.h | 7 +- include/llvm/CodeGen/GlobalISel/Utils.h | 3 + include/llvm/CodeGen/MachineBasicBlock.h | 17 +- include/llvm/CodeGen/MachineFunctionInitializer.h | 2 +- include/llvm/CodeGen/MachineInstrBuilder.h | 5 + include/llvm/CodeGen/MachineModuleInfoImpls.h | 12 +- include/llvm/CodeGen/MachineOperand.h | 22 +- include/llvm/CodeGen/MachineValueType.h | 67 +- include/llvm/CodeGen/Passes.h | 3 + include/llvm/CodeGen/ScheduleDAG.h | 8 + include/llvm/CodeGen/SelectionDAG.h | 19 +- include/llvm/CodeGen/SelectionDAGISel.h | 6 + include/llvm/CodeGen/SelectionDAGNodes.h | 8 +- .../llvm/CodeGen/TargetLoweringObjectFileImpl.h | 3 - include/llvm/CodeGen/TargetPassConfig.h | 9 + include/llvm/CodeGen/TargetSchedule.h | 12 + include/llvm/CodeGen/ValueTypes.h | 131 +- include/llvm/Config/config.h.cmake | 8 +- include/llvm/DebugInfo/CodeView/CodeView.h | 6 + include/llvm/DebugInfo/CodeView/TypeRecord.h | 10 + include/llvm/DebugInfo/CodeView/TypeRecords.def | 2 +- include/llvm/DebugInfo/CodeView/TypeStreamMerger.h | 5 +- include/llvm/DebugInfo/CodeView/TypeTableBuilder.h | 6 + include/llvm/DebugInfo/DWARF/DWARFDie.h | 11 +- include/llvm/DebugInfo/DWARF/DWARFUnit.h | 13 +- .../llvm/DebugInfo/PDB/ConcreteSymbolEnumerator.h | 10 +- include/llvm/DebugInfo/PDB/DIA/DIARawSymbol.h | 1 + include/llvm/DebugInfo/PDB/DIA/DIASession.h | 2 +- include/llvm/DebugInfo/PDB/IPDBRawSymbol.h | 5 + include/llvm/DebugInfo/PDB/IPDBSession.h | 13 +- .../llvm/DebugInfo/PDB/Native/NativeExeSymbol.h | 39 + .../llvm/DebugInfo/PDB/Native/NativeRawSymbol.h | 3 +- include/llvm/DebugInfo/PDB/Native/NativeSession.h | 2 +- .../llvm/DebugInfo/PDB/Native/TpiStreamBuilder.h | 11 +- include/llvm/DebugInfo/PDB/PDBSymDumper.h | 16 + include/llvm/DebugInfo/PDB/PDBSymbol.h | 37 +- include/llvm/DebugInfo/PDB/PDBSymbolBlock.h | 2 +- include/llvm/DebugInfo/PDB/PDBSymbolCompiland.h | 2 +- .../llvm/DebugInfo/PDB/PDBSymbolCompilandDetails.h | 2 +- include/llvm/DebugInfo/PDB/PDBSymbolCompilandEnv.h | 2 +- include/llvm/DebugInfo/PDB/PDBSymbolData.h | 8 +- include/llvm/DebugInfo/PDB/PDBSymbolExe.h | 2 + include/llvm/DebugInfo/PDB/PDBSymbolFunc.h | 12 +- include/llvm/DebugInfo/PDB/PDBSymbolFuncDebugEnd.h | 2 +- .../llvm/DebugInfo/PDB/PDBSymbolFuncDebugStart.h | 2 +- include/llvm/DebugInfo/PDB/PDBSymbolLabel.h | 2 +- include/llvm/DebugInfo/PDB/PDBSymbolPublicSymbol.h | 2 +- include/llvm/DebugInfo/PDB/PDBSymbolThunk.h | 6 +- include/llvm/DebugInfo/PDB/PDBSymbolTypeArray.h | 9 +- .../llvm/DebugInfo/PDB/PDBSymbolTypeBaseClass.h | 11 +- include/llvm/DebugInfo/PDB/PDBSymbolTypeBuiltin.h | 2 +- include/llvm/DebugInfo/PDB/PDBSymbolTypeEnum.h | 12 +- include/llvm/DebugInfo/PDB/PDBSymbolTypeFriend.h | 4 +- .../llvm/DebugInfo/PDB/PDBSymbolTypeFunctionArg.h | 6 +- .../llvm/DebugInfo/PDB/PDBSymbolTypeFunctionSig.h | 11 +- include/llvm/DebugInfo/PDB/PDBSymbolTypePointer.h | 7 +- include/llvm/DebugInfo/PDB/PDBSymbolTypeTypedef.h | 8 +- include/llvm/DebugInfo/PDB/PDBSymbolTypeUDT.h | 16 +- include/llvm/DebugInfo/PDB/PDBSymbolTypeVTable.h | 7 +- .../llvm/DebugInfo/PDB/PDBSymbolTypeVTableShape.h | 2 +- .../llvm/DebugInfo/PDB/PDBSymbolUsingNamespace.h | 2 +- include/llvm/DebugInfo/PDB/UDTLayout.h | 180 + include/llvm/ExecutionEngine/Orc/OrcError.h | 18 +- .../ExecutionEngine/Orc/OrcRemoteTargetServer.h | 23 +- .../llvm/ExecutionEngine/Orc/RPCSerialization.h | 243 +- include/llvm/ExecutionEngine/Orc/RPCUtils.h | 334 +- include/llvm/ExecutionEngine/Orc/RawByteChannel.h | 12 +- include/llvm/IR/Argument.h | 12 +- include/llvm/IR/Attributes.h | 118 +- include/llvm/IR/BasicBlock.h | 89 +- include/llvm/IR/CallSite.h | 21 +- include/llvm/IR/Constant.h | 7 +- include/llvm/IR/ConstantRange.h | 37 +- include/llvm/IR/DataLayout.h | 3 + include/llvm/IR/DebugInfoMetadata.h | 5 +- include/llvm/IR/Dominators.h | 10 +- include/llvm/IR/Function.h | 5 + include/llvm/IR/GlobalIndirectSymbol.h | 18 +- include/llvm/IR/GlobalValue.h | 14 +- include/llvm/IR/IRBuilder.h | 9 +- include/llvm/IR/Instruction.h | 20 +- include/llvm/IR/Instructions.h | 262 +- include/llvm/IR/Intrinsics.td | 37 +- include/llvm/IR/IntrinsicsAMDGPU.td | 20 +- include/llvm/IR/IntrinsicsX86.td | 40 - include/llvm/IR/Mangler.h | 4 + include/llvm/IR/Metadata.h | 11 +- include/llvm/IR/Module.h | 61 +- include/llvm/IR/ModuleSummaryIndex.h | 11 +- include/llvm/IR/ModuleSummaryIndexYAML.h | 2 +- include/llvm/IR/Operator.h | 22 +- include/llvm/IR/PatternMatch.h | 24 + include/llvm/IR/Type.h | 6 +- include/llvm/IR/Use.h | 24 +- include/llvm/IR/User.h | 14 +- include/llvm/IR/Value.h | 47 +- include/llvm/InitializePasses.h | 2 + include/llvm/LTO/LTO.h | 205 +- include/llvm/LTO/legacy/LTOCodeGenerator.h | 5 + include/llvm/LTO/legacy/ThinLTOCodeGenerator.h | 8 + include/llvm/LinkAllPasses.h | 2 + include/llvm/MC/MCAsmBackend.h | 6 +- include/llvm/MC/MCAsmInfo.h | 8 +- include/llvm/MC/MCELFStreamer.h | 1 + include/llvm/MC/MCObjectStreamer.h | 4 +- include/llvm/MC/MCObjectWriter.h | 5 - include/llvm/MC/MCRegisterInfo.h | 6 + include/llvm/MC/MCStreamer.h | 5 +- include/llvm/MC/MCSubtargetInfo.h | 17 + include/llvm/MC/MCTargetOptions.h | 25 - include/llvm/Object/Archive.h | 49 +- include/llvm/Object/Binary.h | 33 +- include/llvm/Object/COFF.h | 100 +- include/llvm/Object/ELF.h | 2 +- include/llvm/Object/IRSymtab.h | 305 + include/llvm/Object/MachO.h | 24 +- include/llvm/Object/ObjectFile.h | 58 +- include/llvm/Object/SymbolicFile.h | 28 +- include/llvm/Object/Wasm.h | 97 +- include/llvm/ObjectYAML/DWARFYAML.h | 2 +- include/llvm/ObjectYAML/MachOYAML.h | 2 +- include/llvm/ObjectYAML/ObjectYAML.h | 6 +- include/llvm/ObjectYAML/WasmYAML.h | 339 + include/llvm/Option/ArgList.h | 214 +- include/llvm/ProfileData/InstrProf.h | 59 +- include/llvm/ProfileData/InstrProfData.inc | 67 +- include/llvm/ProfileData/SampleProf.h | 48 +- include/llvm/Support/ARMTargetParser.def | 1 + include/llvm/Support/CMakeLists.txt | 54 + include/llvm/Support/Casting.h | 70 + include/llvm/Support/Compiler.h | 4 +- include/llvm/Support/Endian.h | 2 + include/llvm/Support/Error.h | 63 +- include/llvm/Support/FormatProviders.h | 3 +- include/llvm/Support/FormatVariadic.h | 2 +- include/llvm/Support/GenericDomTree.h | 58 +- include/llvm/Support/GraphWriter.h | 7 +- include/llvm/Support/Host.h | 8 + include/llvm/Support/LowLevelTypeImpl.h | 211 +- include/llvm/Support/MathExtras.h | 20 +- include/llvm/Support/Regex.h | 2 +- include/llvm/Support/TargetParser.h | 2 +- include/llvm/Support/Timer.h | 4 +- include/llvm/Support/Wasm.h | 106 +- include/llvm/Support/WasmRelocs/WebAssembly.def | 2 + include/llvm/TableGen/Record.h | 3 + include/llvm/TableGen/StringMatcher.h | 2 +- include/llvm/TableGen/StringToOffsetTable.h | 10 +- .../llvm/Target/GlobalISel/SelectionDAGCompat.td | 2 + include/llvm/Target/TargetInstrInfo.h | 25 + include/llvm/Target/TargetLowering.h | 38 +- include/llvm/Target/TargetOptions.h | 37 - include/llvm/Target/TargetSchedule.td | 3 + include/llvm/Target/TargetSubtargetInfo.h | 8 + include/llvm/Transforms/IPO/FunctionAttrs.h | 2 +- include/llvm/Transforms/InstrProfiling.h | 21 +- include/llvm/Transforms/Instrumentation.h | 1 + include/llvm/Transforms/PGOInstrumentation.h | 10 + include/llvm/Transforms/Scalar.h | 8 + include/llvm/Transforms/Scalar/GVNExpression.h | 129 +- include/llvm/Transforms/Scalar/SimplifyCFG.h | 9 +- include/llvm/Transforms/Utils/Local.h | 3 +- include/llvm/Transforms/Utils/MemorySSA.h | 1062 --- include/llvm/Transforms/Utils/MemorySSAUpdater.h | 153 - include/llvm/Transforms/Utils/ModuleUtils.h | 3 + include/llvm/Transforms/Utils/PromoteMemToReg.h | 3 - include/llvm/XRay/InstrumentationMap.h | 2 + include/llvm/XRay/XRayRecord.h | 5 + lib/Analysis/AliasAnalysis.cpp | 10 +- lib/Analysis/Analysis.cpp | 2 + lib/Analysis/BasicAliasAnalysis.cpp | 18 +- lib/Analysis/BranchProbabilityInfo.cpp | 236 +- lib/Analysis/CFLGraph.h | 3 +- lib/Analysis/CMakeLists.txt | 2 + lib/Analysis/ConstantFolding.cpp | 2 +- lib/Analysis/CostModel.cpp | 14 +- lib/Analysis/DemandedBits.cpp | 3 + lib/Analysis/IVUsers.cpp | 88 +- lib/Analysis/InlineCost.cpp | 61 +- lib/Analysis/InstructionSimplify.cpp | 408 +- lib/Analysis/LazyValueInfo.cpp | 8 +- lib/Analysis/LoopAccessAnalysis.cpp | 5 +- lib/Analysis/MemoryBuiltins.cpp | 19 +- lib/Analysis/MemorySSA.cpp | 2056 +++++ lib/Analysis/MemorySSAUpdater.cpp | 494 ++ lib/Analysis/ModuleSummaryAnalysis.cpp | 2 +- lib/Analysis/ScalarEvolution.cpp | 401 +- lib/Analysis/ScalarEvolutionExpander.cpp | 3 +- lib/Analysis/ScalarEvolutionNormalization.cpp | 299 +- lib/Analysis/SparsePropagation.cpp | 2 +- lib/Analysis/TargetTransformInfo.cpp | 29 +- lib/Analysis/ValueTracking.cpp | 152 +- lib/AsmParser/LLLexer.cpp | 1 + lib/AsmParser/LLParser.cpp | 171 +- lib/AsmParser/LLParser.h | 14 +- lib/AsmParser/LLToken.h | 1 + lib/Bitcode/Reader/BitcodeReader.cpp | 842 ++- lib/Bitcode/Reader/MetadataLoader.cpp | 59 +- lib/Bitcode/Reader/MetadataLoader.h | 3 + lib/Bitcode/Writer/BitcodeWriter.cpp | 427 +- lib/Bitcode/Writer/LLVMBuild.txt | 2 +- lib/CodeGen/AggressiveAntiDepBreaker.cpp | 3 +- lib/CodeGen/Analysis.cpp | 19 - lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 65 +- lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | 43 +- lib/CodeGen/AsmPrinter/DIE.cpp | 8 +- lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 23 +- lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 22 +- lib/CodeGen/AsmPrinter/DwarfExpression.cpp | 138 +- lib/CodeGen/AsmPrinter/DwarfExpression.h | 21 +- lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 14 +- lib/CodeGen/BranchFolding.cpp | 16 + lib/CodeGen/CodeGenPrepare.cpp | 310 +- lib/CodeGen/CountingFunctionInserter.cpp | 2 +- lib/CodeGen/CriticalAntiDepBreaker.cpp | 4 +- lib/CodeGen/DetectDeadLanes.cpp | 2 +- lib/CodeGen/ExecutionDepsFix.cpp | 64 +- lib/CodeGen/GlobalISel/IRTranslator.cpp | 28 +- lib/CodeGen/GlobalISel/InstructionSelector.cpp | 20 +- lib/CodeGen/GlobalISel/Legalizer.cpp | 39 +- lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 49 +- lib/CodeGen/GlobalISel/LegalizerInfo.cpp | 15 +- lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 5 +- lib/CodeGen/GlobalISel/RegisterBankInfo.cpp | 26 +- lib/CodeGen/GlobalISel/Utils.cpp | 17 + lib/CodeGen/ImplicitNullChecks.cpp | 2 +- lib/CodeGen/InlineSpiller.cpp | 19 +- lib/CodeGen/IntrinsicLowering.cpp | 6 +- lib/CodeGen/LLVMBuild.txt | 2 +- lib/CodeGen/LowLevelType.cpp | 6 +- lib/CodeGen/MIRParser/MIRParser.cpp | 3 - lib/CodeGen/MachineBasicBlock.cpp | 22 +- lib/CodeGen/MachineBlockPlacement.cpp | 120 +- lib/CodeGen/MachineInstr.cpp | 28 + lib/CodeGen/MachineOutliner.cpp | 2 +- lib/CodeGen/MachinePipeliner.cpp | 2 +- lib/CodeGen/MachineRegionInfo.cpp | 2 +- lib/CodeGen/MachineScheduler.cpp | 31 +- lib/CodeGen/MachineVerifier.cpp | 23 +- lib/CodeGen/PrologEpilogInserter.cpp | 15 +- lib/CodeGen/PseudoSourceValue.cpp | 5 +- lib/CodeGen/RegAllocFast.cpp | 14 +- lib/CodeGen/SafeStack.cpp | 8 +- lib/CodeGen/ScheduleDAG.cpp | 81 + lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 728 +- lib/CodeGen/SelectionDAG/FastISel.cpp | 16 +- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 7 +- lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 13 +- lib/CodeGen/SelectionDAG/LegalizeTypes.h | 3 +- lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 16 + lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 23 +- lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 110 +- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 130 +- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 2 +- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 295 +- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 54 +- lib/CodeGen/SjLjEHPrepare.cpp | 8 +- lib/CodeGen/StackProtector.cpp | 6 +- lib/CodeGen/TargetInstrInfo.cpp | 6 +- lib/CodeGen/TargetLoweringBase.cpp | 2 +- lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 36 +- lib/CodeGen/TargetPassConfig.cpp | 8 +- lib/CodeGen/TargetSchedule.cpp | 94 +- lib/CodeGen/TargetSubtargetInfo.cpp | 46 + lib/CodeGen/WinEHPrepare.cpp | 6 +- lib/DebugInfo/CodeView/CVSymbolVisitor.cpp | 9 - lib/DebugInfo/CodeView/TypeDatabaseVisitor.cpp | 4 + lib/DebugInfo/CodeView/TypeDumpVisitor.cpp | 9 + lib/DebugInfo/CodeView/TypeRecordMapping.cpp | 5 + lib/DebugInfo/CodeView/TypeStreamMerger.cpp | 273 +- lib/DebugInfo/DWARF/DWARFContext.cpp | 140 +- lib/DebugInfo/DWARF/DWARFDie.cpp | 30 +- lib/DebugInfo/DWARF/DWARFUnit.cpp | 70 +- lib/DebugInfo/PDB/CMakeLists.txt | 2 + lib/DebugInfo/PDB/DIA/DIARawSymbol.cpp | 15 + lib/DebugInfo/PDB/DIA/DIASession.cpp | 2 +- lib/DebugInfo/PDB/Native/NativeExeSymbol.cpp | 79 + lib/DebugInfo/PDB/Native/NativeRawSymbol.cpp | 40 +- lib/DebugInfo/PDB/Native/NativeSession.cpp | 7 +- lib/DebugInfo/PDB/Native/TpiStream.cpp | 8 +- lib/DebugInfo/PDB/Native/TpiStreamBuilder.cpp | 86 +- lib/DebugInfo/PDB/PDBSymbol.cpp | 36 +- lib/DebugInfo/PDB/PDBSymbolAnnotation.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolBlock.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolCompiland.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolCompilandDetails.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolCompilandEnv.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolCustom.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolData.cpp | 6 +- lib/DebugInfo/PDB/PDBSymbolExe.cpp | 15 +- lib/DebugInfo/PDB/PDBSymbolFunc.cpp | 21 +- lib/DebugInfo/PDB/PDBSymbolFuncDebugEnd.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolFuncDebugStart.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolLabel.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolPublicSymbol.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolThunk.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolTypeArray.cpp | 10 +- lib/DebugInfo/PDB/PDBSymbolTypeBaseClass.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolTypeBuiltin.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolTypeCustom.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolTypeDimension.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolTypeEnum.cpp | 11 +- lib/DebugInfo/PDB/PDBSymbolTypeFriend.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolTypeFunctionArg.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolTypeFunctionSig.cpp | 17 +- lib/DebugInfo/PDB/PDBSymbolTypeManaged.cpp | 4 +- lib/DebugInfo/PDB/PDBSymbolTypePointer.cpp | 10 +- lib/DebugInfo/PDB/PDBSymbolTypeTypedef.cpp | 4 +- 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3 +- lib/Target/AMDGPU/SIISelLowering.cpp | 961 ++- lib/Target/AMDGPU/SIISelLowering.h | 23 +- lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 1863 +++++ lib/Target/AMDGPU/SIInsertWaits.cpp | 14 + lib/Target/AMDGPU/SIInstrFormats.td | 12 +- lib/Target/AMDGPU/SIInstrInfo.cpp | 129 +- lib/Target/AMDGPU/SIInstrInfo.h | 11 + lib/Target/AMDGPU/SIInstrInfo.td | 11 +- lib/Target/AMDGPU/SIInstructions.td | 24 +- lib/Target/AMDGPU/SIIntrinsics.td | 131 - lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 317 +- lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 42 +- lib/Target/AMDGPU/SIMachineFunctionInfo.h | 22 +- lib/Target/AMDGPU/SIMachineScheduler.cpp | 251 +- lib/Target/AMDGPU/SIMachineScheduler.h | 22 +- lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 389 +- lib/Target/AMDGPU/SIRegisterInfo.cpp | 6 +- lib/Target/AMDGPU/SMInstructions.td | 4 +- lib/Target/AMDGPU/SOPInstructions.td | 58 +- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 80 +- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 34 +- 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