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from a816f42e4da [CodeGen] allow printing of zero latency in sched comments new 47473109e3c [GlobalIsel][X86] Support for G_SDIV instruction new 1fd0177abc0 SjLjEHPrepare: Don't reg-to-mem swifterror values new dc84b5c40c7 [WebAssembly] Identify COMDATs by index rather than string. NFC new d1498c372ae [X86][AVX] Use WriteFShuffleLd for broadcast reg-mem instructions
The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: include/llvm/BinaryFormat/Wasm.h | 5 +- include/llvm/Object/Wasm.h | 2 - lib/CodeGen/SjLjEHPrepare.cpp | 29 +--- lib/Object/WasmObjectFile.cpp | 17 ++- lib/Target/X86/X86InstrSSE.td | 9 +- lib/Target/X86/X86InstructionSelector.cpp | 84 +++++++++++ lib/Target/X86/X86LegalizerInfo.cpp | 8 +- test/CodeGen/ARM/sjljeh-swifterror.ll | 33 ++++- test/CodeGen/X86/GlobalISel/x86-legalize-sdiv.mir | 114 ++++++++++++++ test/CodeGen/X86/GlobalISel/x86-select-sdiv.mir | 128 ++++++++++++++++ test/CodeGen/X86/GlobalISel/x86_64-irtranslator.ll | 56 +++++++ .../X86/GlobalISel/x86_64-legalize-sdiv.mir | 145 ++++++++++++++++++ test/CodeGen/X86/GlobalISel/x86_64-select-sdiv.mir | 164 +++++++++++++++++++++ test/CodeGen/X86/avx-schedule.ll | 2 +- test/CodeGen/X86/avx2-schedule.ll | 18 +-- tools/obj2yaml/wasm2yaml.cpp | 16 +- 16 files changed, 768 insertions(+), 62 deletions(-) create mode 100644 test/CodeGen/X86/GlobalISel/x86-legalize-sdiv.mir create mode 100644 test/CodeGen/X86/GlobalISel/x86-select-sdiv.mir create mode 100644 test/CodeGen/X86/GlobalISel/x86_64-legalize-sdiv.mir create mode 100644 test/CodeGen/X86/GlobalISel/x86_64-select-sdiv.mir