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from 10f786ca0ff [AMDGPU] Change register type for v32 vectors new 65c12193d04 AMDGPU/GlobalISel: Select G_SHL
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Summary of changes: lib/Target/AMDGPU/SOPInstructions.td | 4 +- lib/Target/AMDGPU/VOP2Instructions.td | 2 +- lib/Target/AMDGPU/VOP3Instructions.td | 2 +- test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir | 327 +++++++++++++++++++++ .../AMDGPU/GlobalISel/inst-select-shl.s16.mir | 203 +++++++++++++ .../AMDGPU/GlobalISel/inst-select-shl.v2s16.mir | 168 +++++++++++ 6 files changed, 702 insertions(+), 4 deletions(-) create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.v2s16.mir