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from 4b6c339 [X86] Basic additions to support RegCall Calling Convention. new 00d9ddd [DAGCombiner] Add vector support to (sub -1, x) -> (xor x, -1 [...] new 9f063fb [mips] Add IAS support for dvp, evp
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Summary of changes: lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 13 +++++++++++- lib/Target/Mips/MicroMips32r6InstrInfo.td | 5 +++-- lib/Target/Mips/Mips32r6InstrFormats.td | 16 +++++++++++++++ lib/Target/Mips/Mips32r6InstrInfo.td | 23 ++++++++++++++++++++++ lib/Target/Mips/MipsEVAInstrFormats.td | 4 ++-- test/CodeGen/X86/combine-sub.ll | 5 ++--- test/MC/Disassembler/Mips/micromips32r6/valid.txt | 4 ++++ test/MC/Disassembler/Mips/micromips64r6/valid.txt | 4 ++++ .../Mips/mips32r6/valid-mips32r6-el.txt | 4 ++++ .../Disassembler/Mips/mips32r6/valid-mips32r6.txt | 4 ++++ .../Mips/mips64r6/valid-mips64r6-el.txt | 4 ++++ .../Disassembler/Mips/mips64r6/valid-mips64r6.txt | 4 ++++ test/MC/Mips/mips32r6/invalid.s | 6 ++++++ test/MC/Mips/mips32r6/valid.s | 4 ++++ test/MC/Mips/mips64r6/invalid.s | 6 ++++++ test/MC/Mips/mips64r6/valid.s | 4 ++++ 16 files changed, 102 insertions(+), 8 deletions(-)