[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig updated (bad2b3cf08b -> c5ef502ee81)

7 Jun 2019


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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig
in repository toolchain/ci/llvm-project.
from  bad2b3cf08b Revert "Speedup to_string and to_wstring for integers using [...]
      adds  d3144a4abc8 [AArch64][GlobalISel] Add manual selection support for G_ZE [...]
      adds  dbceb9b2203 Fixup files added in r362636 to build with gcc 5.4. NFCI
      adds  0d02dc60542 Update AST matchers tutorial to use monorepo layout
      adds  3c82c57d2b5 [AVR] Fix the 'load.ll' test after r362351
      adds  3a29f7c99c2 [X86] Add ENQCMD instructions
      adds  54eeb3f40ab [clangd] Remove unused signature help quality signal. NFC
      adds  7cc580f5e95 [SCEV] Use wrap flags in InsertBinop
      adds  faaa2b5d215 [MIPS GlobalISel] Select floor and ceil
      adds  a7d00064474 [MIPS GlobalISel] Select fpext and fptrunc
      adds  0a1fd355b2f [MIPS GlobalISel] Select fabs
      adds  cff7d2fdc9e [RISCV] Add CostModel GEP tests
      adds  81132ce0e95 [MIPS GlobalISel] Select sqrt
      adds  711f3615969 [RISCV] Disable test/Analysis/CostModel/RISCV tests if RISC [...]
      adds  f5b73c95555 Fix whitespace indentation. NFCI.
      adds  da993d08c87 [DAGCombine] Cleanup isNegatibleForFree/GetNegatedExpressio [...]
      adds  8c2c0725828 Include what you use in LanaiAsmParser.cpp
      adds  dc8affe607a [X86][SSE] Add nonuniform constant vector test for PR42105
      adds  bce9e11a7b0 [AArch64] Handle ISD::LROUND and ISD::LLROUND for float16
      adds  f1249442cf3 Revert "[SCEV] Use wrap flags in InsertBinop"
      adds  559e69a821b AArch64] Handle ISD::LRINT and ISD::LLRINT for float16
      adds  df95e6109e1 [clang-tidy] Fix an assertion failure in misc-redundant-exp [...]
      adds  60e1296a9a3 [clang-tidy] Make the plugin honor NOLINT
      adds  dd2d1a168f4 [InstCombine] add tests for loads of bitcasted vector pointer; NFC
      adds  bf5bca5bea5 [llvm-ar] Create thin archives with MRI scripts
      adds  71d3f227a79 FileCheck [6/12]: Introduce numeric variable definition
      adds  a4f5a2ad1f0 [clang-tidy] Another attempt to fix misc-redundant-expressi [...]
      adds  2e4a628c06c [LibTooling] Add insert/remove convenience functions for cr [...]
      adds  0338b88861d [AIX] Implement call lowering with parameters could pass onto GPRs
      adds  47feb771e13 gn build: Add new tidy checks to gn files
      adds  0924f448592 [NFC][CodeGen] Remove duplicate test in fp-fast.ll
      adds  03e8369a728 [DA] Add an option to control delinearization validity checks
      adds  1d85a7518c6 [NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.l [...]
      adds  b341d305a4c [PowerPC] Add R_PPC_IRELATIVE
      adds  5c011405812 [NFC][CodeGen] Add unary fneg tests to fmul-combines.ll fnabs.ll
      adds  758c08921da [Profile]: Add runtime interface to specify file handle for [...]
      adds  6b67dfa54c7 [X86] Make masked floating point equality/ordered compares  [...]
      adds  5438cc6910b Remove unused PPC.h includes under llvm/lib/Target/PowerPC.
      adds  ab245c8fefb gn build: Merge r362685
      adds  f1b8c6ac4f9 [NFC][CodeGen] Add unary fneg tests to X86/fma_patterns_wide.ll
      adds  82442adfc03 [PPC32] Improve the 32-bit PowerPC port
      adds  7ccfdad7ab7 [PPC32] Support GD/LD/IE/LE TLS models and their relaxations
      adds  842c7792aaa [DAGCombine] MergeConsecutiveStores - improve non-temporal  [...]
      adds  bd9e810b23b [ScheduleTreeTransform] Silence compiler warning. NFC.
      adds  101915cfdab [LoopPred] Fix a bug in unconditional latch bailout introdu [...]
      adds  249b7210377 Fixing ppc tests: sed -i 's/# REQUIES: ppc/# REQUIRES: ppc/g'
      adds  06de52674da [NFC][CodeGen] Add unary fneg tests to X86/fma_patterns.ll
      adds  51f85b40bc6 [clang][HeaderSearch] Consider all path separators equal
      adds  6cda33ba364 [InlineCost] Add support for unary fneg.
      adds  f288a0685f8 [NFC][CodeGen] Add unary fneg tests to X86/fma4-fneg-combine.ll
      adds  60ec248148c [AIX] Implement function descriptor on SDAG
      adds  9e97caf5947 [LV] Wrap LV illegality reporting in a function. NFC.
      adds  ca541b20d0c [CFLGraph] Add support for unary fneg instruction.
      adds  a0a63b2f905 Revert "[ELF] Suppress "STT_SECTION symbol should be define [...]
      adds  f1d9b3180e6 Revert "Reland D61583 [ELF] Error on relocations to STT_SEC [...]
      adds  e8a301f87f7 clang-format: better handle namespace macros
      adds  3d2ee0053aa [NFC][CodeGen] Add unary fneg tests to X86/fma-scalar-combine.ll
      adds  38c5ee18028 [InstSimplify] add tests for fcmp with known-never-nan oper [...]
      adds  6ba76dd7795 Revert "Revert "Reland D61583 [ELF] Error on relocations to [...]
      adds  6a573e3ec3e Revert "Revert "[ELF] Suppress "STT_SECTION symbol should b [...]
      adds  980d3645df4 Add cdb test for global constants
      adds  f320f267167 [X86] Make a bunch of merge masked binops commutable for lo [...]
      adds  169fc2b0209 [NFC][CodeGen] Add unary fneg tests to X86/fma-intrinsics-x86.ll
      adds  37bd9bd1375 [AMDGPU] Partial revert for the ba447bae7448435c9986eece081 [...]
      adds  b9f1e7b16ed [DebugInfo] Incorrect debug info record generated for loop  [...]
      adds  66f286845ca [NFC][CodeGen] Add unary fneg tests to X86/fma4-intrinsics-x86.ll
      adds  b82ea52b78e [NFC] Test commit, whitespace change
      adds  b6cfa129cc2 AMDGPU: Insert skip branches over return blocks
      adds  0629e1252ff Revert [ELF] Simplify the condition to create .interp
      adds  dcf17ded66c Convert MemberExpr creation and serialization to work the s [...]
      adds  84be9984976 Factor out duplicated code building a MemberExpr and markin [...]
      adds  e41e366ae72 Change GWP-ASan build to use '-pthread' instead of '-lpthre [...]
      adds  ef4a3aa549e [PowerPC] Exploit the vector min/max instructions
      adds  99ee81b1839 AMDGPU: Insert skips for blocks with FLAT
      adds  c0edb8f5cf2 AMDGPU: Don't count mask branch pseudo towards skip threshold
      adds  19189993c90 [LV] Fix -Wunused-function after r362736
      adds  c7029e4ef46 [NFC] Test commit.
      adds  c7903b9f1e9 Set an output file name for the override-new-delete.cpp test.
      adds  0bddef79019 [ADT] Enable set_difference() to be used on StringSet
      adds  c841b9abf03 [MC][ELF] Don't create relocations with section symbols for [...]
      adds  50f61af3f30 [llvm-objdump] Add warning if --disassemble-functions speci [...]
      adds  fd54fa5d72d [WebAssembly] Fix for discarded init functions
      adds  53211aa9f13 [lld] Allow args::getInterger to parse args larger than 2^31-1
      adds  767bdd55e1a [llvm-objdump] Print source when subsequent lines in the tr [...]
      adds  65d1ff8e7e2 [NFC] Delete trailing whitespace character.
      adds  04b418f2460 [AVR] Expand 16-bit rotations during the legalization stage
      adds  c5ef502ee81 [CodeGen] Generic Hardware Loop Support
No new revisions were added by this update.
Summary of changes:
 .../clang-tidy/ClangTidyDiagnosticConsumer.cpp     |   94 +-
 .../clang-tidy/ClangTidyDiagnosticConsumer.h       |   13 +
 .../clang-tidy/misc/RedundantExpressionCheck.cpp   |    9 +-
 .../clang-tidy/plugin/ClangTidyPlugin.cpp          |   23 +-
 clang-tools-extra/clangd/CodeComplete.cpp          |    9 +-
 clang-tools-extra/clangd/Quality.cpp               |    2 -
 clang-tools-extra/clangd/Quality.h                 |    1 -
 clang-tools-extra/test/clang-tidy/basic.cpp        |    1 +
 .../test/clang-tidy/misc-redundant-expression.cpp  |   12 +
 .../test/clang-tidy/nolint-plugin.cpp              |   50 +
 .../test/clang-tidy/nolintnextline-plugin.cpp      |   48 +
 clang/docs/ClangCommandLineReference.rst           |    2 +
 clang/docs/ClangFormatStyleOptions.rst             |   13 +
 clang/docs/LibASTMatchersTutorial.rst              |   12 +-
 clang/include/clang/AST/Expr.h                     |   68 +-
 clang/include/clang/AST/Stmt.h                     |    1 +
 clang/include/clang/Basic/BuiltinsX86.def          |    4 +
 clang/include/clang/Driver/Options.td              |    2 +
 clang/include/clang/Format/Format.h                |   13 +
 clang/include/clang/Sema/Sema.h                    |   17 +
 .../clang/Tooling/Refactoring/Transformer.h        |   17 +
 clang/lib/AST/DeclBase.cpp                         |    1 +
 clang/lib/AST/Expr.cpp                             |   72 +-
 clang/lib/Basic/Targets/X86.cpp                    |    6 +
 clang/lib/Basic/Targets/X86.h                      |    1 +
 clang/lib/Format/Format.cpp                        |    1 +
 clang/lib/Format/FormatToken.h                     |    7 +-
 clang/lib/Format/FormatTokenLexer.cpp              |    2 +
 clang/lib/Format/NamespaceEndCommentsFixer.cpp     |   91 +-
 clang/lib/Format/TokenAnnotator.cpp                |   12 +-
 clang/lib/Format/TokenAnnotator.h                  |    1 +
 clang/lib/Format/UnwrappedLineFormatter.cpp        |   40 +-
 clang/lib/Format/UnwrappedLineParser.cpp           |   17 +-
 clang/lib/Frontend/Rewrite/RewriteModernObjC.cpp   |   54 +-
 clang/lib/Frontend/Rewrite/RewriteObjC.cpp         |   24 +-
 clang/lib/Headers/CMakeLists.txt                   |    1 +
 clang/lib/Headers/cpuid.h                          |    1 +
 clang/lib/Headers/enqcmdintrin.h                   |   63 +
 clang/lib/Headers/immintrin.h                      |    4 +
 clang/lib/Lex/HeaderSearch.cpp                     |    5 +
 clang/lib/Sema/SemaExprCXX.cpp                     |   12 +-
 clang/lib/Sema/SemaExprMember.cpp                  |   71 +-
 clang/lib/Sema/SemaOverload.cpp                    |   11 +-
 clang/lib/Serialization/ASTReaderStmt.cpp          |   96 +-
 clang/lib/Serialization/ASTWriterStmt.cpp          |   56 +-
 clang/test/CodeGen/x86-enqcmd-builtins.c           |   20 +
 clang/test/Driver/x86-target-features.c            |    5 +
 clang/test/PCH/cxx-templates.cpp                   |    9 +
 clang/test/PCH/cxx-templates.h                     |    9 +
 clang/test/Preprocessor/x86_target_features.c      |    7 +
 clang/unittests/Format/FormatTest.cpp              |  114 +
 .../Format/NamespaceEndCommentsFixerTest.cpp       |  270 ++
 clang/unittests/Lex/HeaderSearchTest.cpp           |    7 +
 clang/unittests/Tooling/TransformerTest.cpp        |   58 +
 .../lib/gwp_asan/guarded_pool_allocator.cpp        |   22 +-
 compiler-rt/lib/gwp_asan/guarded_pool_allocator.h  |    4 +-
 compiler-rt/lib/gwp_asan/tests/CMakeLists.txt      |    2 +-
 compiler-rt/test/gwp_asan/dummy_test.cc            |    2 +-
 .../test/hwasan/TestCases/override-new-delete.cpp  |    2 +-
 .../profile/instrprof-set-file-object-merging.c    |   43 +
 .../test/profile/instrprof-set-file-object.c       |   31 +
 debuginfo-tests/win_cdb/global-constant.cpp        |   33 +
 lld/Common/Args.cpp                                |    5 +-
 lld/ELF/Arch/PPC.cpp                               |  367 ++-
 lld/ELF/Arch/PPC64.cpp                             |    7 +-
 lld/ELF/InputFiles.h                               |    4 +
 lld/ELF/InputSection.cpp                           |    8 +
 lld/ELF/Options.td                                 |    1 +
 lld/ELF/Relocations.cpp                            |   42 +-
 lld/ELF/Relocations.h                              |    3 +-
 lld/ELF/SyntheticSections.cpp                      |   61 +-
 lld/ELF/SyntheticSections.h                        |   12 +
 lld/ELF/Target.h                                   |    3 +
 lld/ELF/Thunks.cpp                                 |  125 +-
 lld/ELF/Thunks.h                                   |   13 +-
 lld/ELF/Writer.cpp                                 |   15 +-
 lld/include/lld/Common/Args.h                      |    3 +-
 lld/test/ELF/basic-ppc.s                           |  206 +-
 lld/test/ELF/dynamic-linker.s                      |   16 +-
 lld/test/ELF/ppc-rela.s                            |    2 +-
 lld/test/ELF/ppc-relocs.s                          |  106 -
 lld/test/ELF/ppc32-abs-pic.s                       |   23 +
 lld/test/ELF/ppc32-call-stub-nopic.s               |   81 +
 lld/test/ELF/ppc32-call-stub-pic.s                 |  151 +
 lld/test/ELF/ppc32-gnu-ifunc-nonpreemptable.s      |   45 +
 lld/test/ELF/ppc32-gnu-ifunc.s                     |   41 +
 lld/test/ELF/ppc32-local-branch.s                  |   21 +
 lld/test/ELF/ppc32-reloc-addr.s                    |   34 +
 lld/test/ELF/ppc32-reloc-got.s                     |   36 +
 lld/test/ELF/ppc32-reloc-rel.s                     |   34 +
 lld/test/ELF/ppc32-tls-gd.s                        |   98 +
 lld/test/ELF/ppc32-tls-ie.s                        |   67 +
 lld/test/ELF/ppc32-tls-ld.s                        |   82 +
 lld/test/ELF/ppc32-tls-le.s                        |   24 +
 lld/test/ELF/ppc32-weak-undef-call.s               |   19 +
 lld/test/ELF/silent-ignore.test                    |    1 +
 lld/test/wasm/Inputs/comdat1.ll                    |   23 +-
 lld/test/wasm/Inputs/comdat2.ll                    |   23 +-
 lld/test/wasm/comdats.ll                           |   12 +-
 lld/test/wasm/large-memory.test                    |    5 +
 lld/wasm/InputChunks.h                             |    5 +-
 lld/wasm/InputFiles.cpp                            |   38 +-
 lld/wasm/MarkLive.cpp                              |    7 +-
 lld/wasm/Symbols.cpp                               |    7 +
 lld/wasm/Symbols.h                                 |    3 +
 lld/wasm/Writer.cpp                                |    3 +
 llvm/docs/CommandGuide/FileCheck.rst               |   49 +-
 llvm/docs/README.txt                               |    2 +-
 llvm/include/llvm/ADT/StringMap.h                  |    5 +
 llvm/include/llvm/ADT/StringSet.h                  |    6 +
 llvm/include/llvm/Analysis/TargetTransformInfo.h   |   39 +
 .../llvm/Analysis/TargetTransformInfoImpl.h        |    7 +
 .../llvm/BinaryFormat/ELFRelocs/PowerPC.def        |    1 +
 llvm/include/llvm/CodeGen/BasicTTIImpl.h           |    7 +
 llvm/include/llvm/CodeGen/Passes.h                 |    3 +
 llvm/include/llvm/CodeGen/TargetLowering.h         |    4 +-
 llvm/include/llvm/IR/Intrinsics.td                 |   21 +
 llvm/include/llvm/InitializePasses.h               |    1 +
 llvm/include/llvm/LinkAllPasses.h                  |    1 +
 llvm/include/llvm/MC/MCSymbol.h                    |    3 +
 llvm/include/llvm/MC/MCSymbolXCOFF.h               |   35 +
 llvm/include/llvm/Support/FileCheck.h              |  134 +-
 .../Vectorize/LoopVectorizationLegality.h          |   20 +-
 llvm/lib/Analysis/CFLGraph.h                       |   10 +
 llvm/lib/Analysis/DependenceAnalysis.cpp           |   29 +-
 llvm/lib/Analysis/InlineCost.cpp                   |   23 +
 llvm/lib/Analysis/TargetTransformInfo.cpp          |    6 +
 llvm/lib/CodeGen/CMakeLists.txt                    |    1 +
 llvm/lib/CodeGen/CodeGen.cpp                       |    1 +
 llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp    |   10 +-
 llvm/lib/CodeGen/HardwareLoops.cpp                 |  441 +++
 llvm/lib/CodeGen/LLVMTargetMachine.cpp             |    9 +
 llvm/lib/CodeGen/LiveDebugVariables.cpp            |   20 +-
 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp      |   71 +-
 llvm/lib/CodeGen/SelectionDAG/FastISel.cpp         |    7 +
 llvm/lib/MC/ELFObjectWriter.cpp                    |    6 +
 llvm/lib/MC/MCContext.cpp                          |    4 +-
 llvm/lib/Support/FileCheck.cpp                     |  407 ++-
 llvm/lib/Target/AArch64/AArch64InstrInfo.td        |   16 +
 .../Target/AArch64/AArch64InstructionSelector.cpp  |   23 +
 llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp         |  169 +-
 llvm/lib/Target/AMDGPU/SIISelLowering.cpp          |   87 -
 llvm/lib/Target/AMDGPU/SIISelLowering.h            |    5 +-
 llvm/lib/Target/AMDGPU/SIInsertSkips.cpp           |   24 +-
 llvm/lib/Target/AMDGPU/SIInstrInfo.cpp             |   13 +-
 llvm/lib/Target/AVR/AVRISelLowering.cpp            |    4 +-
 llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp |    1 -
 llvm/lib/Target/Mips/MipsInstructionSelector.cpp   |   10 +
 llvm/lib/Target/Mips/MipsLegalizerInfo.cpp         |   11 +-
 llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp      |   12 +-
 llvm/lib/Target/PowerPC/PPCCTRLoops.cpp            |  572 ----
 llvm/lib/Target/PowerPC/PPCFastISel.cpp            |    7 +
 llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp   |    3 +-
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp        |  180 +-
 llvm/lib/Target/PowerPC/PPCISelLowering.h          |    1 -
 llvm/lib/Target/PowerPC/PPCInstr64Bit.td           |    8 +-
 llvm/lib/Target/PowerPC/PPCInstrAltivec.td         |   26 +
 llvm/lib/Target/PowerPC/PPCInstrInfo.td            |   10 +-
 llvm/lib/Target/PowerPC/PPCInstrVSX.td             |   21 +
 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp        |    5 +
 llvm/lib/Target/PowerPC/PPCTargetMachine.cpp       |    3 +-
 llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp |  344 +++
 llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h   |    6 +-
 llvm/lib/Target/X86/X86InstrAVX512.td              |   21 +-
 llvm/lib/Target/X86/X86InstrInfo.cpp               |   18 +-
 llvm/lib/Transforms/Scalar/LoopPredication.cpp     |    4 +-
 .../Vectorize/LoopVectorizationLegality.cpp        |  222 +-
 .../Steensgaard/must-and-partial.ll                |    3 +-
 llvm/test/Analysis/CostModel/RISCV/gep.ll          |  189 ++
 .../CostModel}/RISCV/lit.local.cfg                 |    0
 .../CodeGen/AArch64/GlobalISel/select-zextload.mir |  139 +-
 llvm/test/CodeGen/AArch64/llrint-conv-fp16.ll      |   35 +
 llvm/test/CodeGen/AArch64/llround-conv-fp16.ll     |   32 +
 llvm/test/CodeGen/AArch64/lrint-conv-fp16-win.ll   |   36 +
 llvm/test/CodeGen/AArch64/lrint-conv-fp16.ll       |   35 +
 llvm/test/CodeGen/AArch64/lround-conv-fp16-win.ll  |   33 +
 llvm/test/CodeGen/AArch64/lround-conv-fp16.ll      |   32 +
 .../AArch64/wrong_debug_loc_after_regalloc.ll      |  171 ++
 llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll         |   12 +-
 llvm/test/CodeGen/AMDGPU/branch-relaxation.ll      |    3 +-
 llvm/test/CodeGen/AMDGPU/branch-uniformity.ll      |    4 +-
 llvm/test/CodeGen/AMDGPU/commute-shifts.ll         |    4 +-
 .../CodeGen/AMDGPU/control-flow-fastregalloc.ll    |    7 +-
 .../AMDGPU/divergent-branch-uniform-condition.ll   |   55 +-
 .../CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll  |    6 +-
 llvm/test/CodeGen/AMDGPU/fabs.ll                   |   12 +-
 llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll  |   58 +-
 llvm/test/CodeGen/AMDGPU/fmin_legacy.ll            |    8 +-
 llvm/test/CodeGen/AMDGPU/fneg-fabs.ll              |   16 +-
 llvm/test/CodeGen/AMDGPU/fsub.ll                   |   12 +-
 llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll      |   10 +-
 .../CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll   |    1 +
 .../test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir |   58 +
 .../CodeGen/AMDGPU/insert-skips-ignored-insts.mir  |   54 +
 llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll      |    6 +-
 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll  |    2 +-
 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.ll      |    8 +-
 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll    |    2 -
 .../CodeGen/AMDGPU/llvm.amdgcn.mqsad.pk.u16.u8.ll  |    2 +-
 .../CodeGen/AMDGPU/llvm.amdgcn.qsad.pk.u16.u8.ll   |    2 +-
 llvm/test/CodeGen/AMDGPU/loop_break.ll             |    8 +-
 llvm/test/CodeGen/AMDGPU/madak.ll                  |   12 +-
 .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll |    5 +-
 llvm/test/CodeGen/AMDGPU/multilevel-break.ll       |    5 +-
 llvm/test/CodeGen/AMDGPU/select-opt.ll             |    4 +-
 llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll      |    3 +-
 llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir    |    2 +-
 .../CodeGen/AMDGPU/skip-branch-taildup-ret.mir     |  194 ++
 llvm/test/CodeGen/AMDGPU/smrd.ll                   |    1 +
 .../CodeGen/AMDGPU/subreg-coalescer-undef-use.ll   |   53 +-
 .../AMDGPU/uniform-loop-inside-nonuniform.ll       |    5 +-
 .../test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll |    9 +-
 llvm/test/CodeGen/AMDGPU/valu-i1.ll                |    6 +-
 .../vgpr-spill-emergency-stack-slot-compute.ll     |    1 -
 llvm/test/CodeGen/AVR/load.ll                      |    4 +-
 .../Mips/GlobalISel/instruction-select/fabs.mir    |   65 +
 .../instruction-select/fpext_and_fptrunc.mir       |   65 +
 .../Mips/GlobalISel/instruction-select/fsqrt.mir   |   65 +
 .../Mips/GlobalISel/legalizer/ceil_and_floor.mir   |  147 +
 .../CodeGen/Mips/GlobalISel/legalizer/fabs.mir     |   61 +
 .../GlobalISel/legalizer/fpext_and_fptrunc.mir     |   61 +
 .../CodeGen/Mips/GlobalISel/legalizer/fsqrt.mir    |   61 +
 .../Mips/GlobalISel/llvm-ir/ceil_and_floor.ll      |   79 +
 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fabs.ll  |   27 +
 .../Mips/GlobalISel/llvm-ir/fpext_and_fptrunc.ll   |   25 +
 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fsqrt.ll |   27 +
 .../CodeGen/Mips/GlobalISel/regbankselect/fabs.mir |   63 +
 .../GlobalISel/regbankselect/fpext_and_fptrunc.mir |   63 +
 .../Mips/GlobalISel/regbankselect/fsqrt.mir        |   63 +
 llvm/test/CodeGen/PowerPC/aix_gpr_param.ll         |  199 ++
 llvm/test/CodeGen/PowerPC/ctr-minmaxnum.ll         |   21 +-
 llvm/test/CodeGen/PowerPC/ctrloop-intrin.ll        |   11 +-
 llvm/test/CodeGen/PowerPC/ppc-passname.ll          |   12 -
 llvm/test/CodeGen/PowerPC/sat-add.ll               |   24 +-
 llvm/test/CodeGen/PowerPC/test_call_aix.ll         |    8 +-
 llvm/test/CodeGen/PowerPC/vec-min-max.ll           |  239 ++
 .../PowerPC/vector-constrained-fp-intrinsics.ll    |  524 +---
 llvm/test/CodeGen/X86/fma-intrinsics-x86.ll        |  896 ++++++
 llvm/test/CodeGen/X86/fma-scalar-combine.ll        |  100 +-
 llvm/test/CodeGen/X86/fma4-fneg-combine.ll         |  105 +
 llvm/test/CodeGen/X86/fma4-intrinsics-x86.ll       |  221 ++
 llvm/test/CodeGen/X86/fma_patterns.ll              |  304 ++
 llvm/test/CodeGen/X86/fma_patterns_wide.ll         |  219 ++
 llvm/test/CodeGen/X86/fmul-combines.ll             |   66 +
 llvm/test/CodeGen/X86/fnabs.ll                     |   63 +
 llvm/test/CodeGen/X86/fp-fast.ll                   |    3 +-
 llvm/test/CodeGen/X86/fp-fold.ll                   |   35 +-
 llvm/test/CodeGen/X86/fp-in-intregs.ll             |    7 +
 llvm/test/CodeGen/X86/fp-stack-compare-cmov.ll     |   10 +
 llvm/test/CodeGen/X86/fp-stack-compare.ll          |   12 +
 llvm/test/CodeGen/X86/fsxor-alignment.ll           |   26 +-
 .../CodeGen/X86/merge-consecutive-stores-nt.ll     |   66 +-
 llvm/test/CodeGen/X86/stack-folding-fp-avx512.ll   |  268 ++
 llvm/test/CodeGen/X86/stack-folding-int-avx512.ll  | 3229 +++++++++++++++++---
 llvm/test/DebugInfo/X86/dbg-addr-dse.ll            |    7 +-
 llvm/test/DebugInfo/X86/live-debug-variables.ll    |    2 +-
 .../test/FileCheck/numeric-defines-diagnostics.txt |    6 +-
 llvm/test/FileCheck/numeric-expression.txt         |  107 +-
 llvm/test/FileCheck/var-scope.txt                  |   17 +-
 llvm/test/FileCheck/verbose.txt                    |   29 +-
 llvm/test/MC/ELF/ifunc-reloc.s                     |   39 +-
 llvm/test/Transforms/HardwareLoops/scalar-while.ll |  144 +
 llvm/test/Transforms/HardwareLoops/unscevable.ll   |   47 +
 llvm/test/Transforms/Inline/inline_constprop.ll    |   31 +
 .../Transforms/InstCombine/load-bitcast-vec.ll     |   90 +
 .../InstSimplify/floating-point-compare.ll         |   48 +-
 llvm/test/Transforms/LoopPredication/basic.ll      |   26 +
 llvm/test/tools/llvm-ar/mri-thin-archive.test      |   23 +
 .../X86/Inputs/source-interleave-header1.h         |    1 +
 .../X86/Inputs/source-interleave-header2.h         |    1 +
 .../source-interleave-same-line-different-file.c   |    2 +
 .../source-interleave-same-line-different-file.ll  |   61 +
 .../llvm-objdump/X86/Inputs/source-interleave.ll   |    2 +-
 ...sassemble-implied-by-disassemble-functions.test |    2 +-
 ...source-interleave-same-line-different-file.test |   12 +
 .../llvm-objdump/X86/warn-missing-disasm-func.test |   11 +
 llvm/tools/llc/llc.cpp                             |    1 +
 llvm/tools/llvm-ar/llvm-ar.cpp                     |    6 +-
 llvm/tools/llvm-objdump/llvm-objdump.cpp           |   17 +-
 llvm/tools/opt/opt.cpp                             |    1 +
 llvm/unittests/ADT/CMakeLists.txt                  |    1 +
 llvm/unittests/ADT/StringMapTest.cpp               |   15 -
 llvm/unittests/ADT/StringSetTest.cpp               |   43 +
 llvm/unittests/Support/FileCheckTest.cpp           |  294 +-
 .../clang-tools-extra/clang-tidy/android/BUILD.gn  |    2 +
 llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn |    1 +
 polly/lib/Transform/ScheduleTreeTransform.cpp      |    2 +-
 287 files changed, 13535 insertions(+), 3244 deletions(-)
 create mode 100644 clang-tools-extra/test/clang-tidy/nolint-plugin.cpp
 create mode 100644 clang-tools-extra/test/clang-tidy/nolintnextline-plugin.cpp
 create mode 100644 clang/lib/Headers/enqcmdintrin.h
 create mode 100644 clang/test/CodeGen/x86-enqcmd-builtins.c
 create mode 100644 compiler-rt/test/profile/instrprof-set-file-object-merging.c
 create mode 100644 compiler-rt/test/profile/instrprof-set-file-object.c
 create mode 100644 debuginfo-tests/win_cdb/global-constant.cpp
 delete mode 100644 lld/test/ELF/ppc-relocs.s
 create mode 100644 lld/test/ELF/ppc32-abs-pic.s
 create mode 100644 lld/test/ELF/ppc32-call-stub-nopic.s
 create mode 100644 lld/test/ELF/ppc32-call-stub-pic.s
 create mode 100644 lld/test/ELF/ppc32-gnu-ifunc-nonpreemptable.s
 create mode 100644 lld/test/ELF/ppc32-gnu-ifunc.s
 create mode 100644 lld/test/ELF/ppc32-local-branch.s
 create mode 100644 lld/test/ELF/ppc32-reloc-addr.s
 create mode 100644 lld/test/ELF/ppc32-reloc-got.s
 create mode 100644 lld/test/ELF/ppc32-reloc-rel.s
 create mode 100644 lld/test/ELF/ppc32-tls-gd.s
 create mode 100644 lld/test/ELF/ppc32-tls-ie.s
 create mode 100644 lld/test/ELF/ppc32-tls-ld.s
 create mode 100644 lld/test/ELF/ppc32-tls-le.s
 create mode 100644 lld/test/ELF/ppc32-weak-undef-call.s
 create mode 100644 lld/test/wasm/large-memory.test
 create mode 100644 llvm/include/llvm/MC/MCSymbolXCOFF.h
 create mode 100644 llvm/lib/CodeGen/HardwareLoops.cpp
 create mode 100644 llvm/test/Analysis/CostModel/RISCV/gep.ll
 copy llvm/test/{MC/Disassembler => Analysis/CostModel}/RISCV/lit.local.cfg (100%)
 create mode 100644 llvm/test/CodeGen/AArch64/llrint-conv-fp16.ll
 create mode 100644 llvm/test/CodeGen/AArch64/llround-conv-fp16.ll
 create mode 100644 llvm/test/CodeGen/AArch64/lrint-conv-fp16-win.ll
 create mode 100644 llvm/test/CodeGen/AArch64/lrint-conv-fp16.ll
 create mode 100644 llvm/test/CodeGen/AArch64/lround-conv-fp16-win.ll
 create mode 100644 llvm/test/CodeGen/AArch64/lround-conv-fp16.ll
 create mode 100644 llvm/test/CodeGen/AArch64/wrong_debug_loc_after_regalloc.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/insert-skips-ignored-insts.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/skip-branch-taildup-ret.mir
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/fabs.mir
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/fpext_and_ [...]
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/fsqrt.mir
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/ceil_and_floor.mir
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/fabs.mir
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/fpext_and_fptrunc.mir
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/fsqrt.mir
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/ceil_and_floor.ll
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fabs.ll
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fpext_and_fptrunc.ll
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fsqrt.ll
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/regbankselect/fabs.mir
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/regbankselect/fpext_and_fptrunc.mir
 create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/regbankselect/fsqrt.mir
 create mode 100644 llvm/test/CodeGen/PowerPC/aix_gpr_param.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/vec-min-max.ll
 create mode 100644 llvm/test/Transforms/HardwareLoops/scalar-while.ll
 create mode 100644 llvm/test/Transforms/HardwareLoops/unscevable.ll
 create mode 100644 llvm/test/Transforms/InstCombine/load-bitcast-vec.ll
 create mode 100644 llvm/test/tools/llvm-ar/mri-thin-archive.test
 create mode 100644 llvm/test/tools/llvm-objdump/X86/Inputs/source-interleave-header1.h
 create mode 100644 llvm/test/tools/llvm-objdump/X86/Inputs/source-interleave-header2.h
 create mode 100644 llvm/test/tools/llvm-objdump/X86/Inputs/source-interleave-same- [...]
 create mode 100644 llvm/test/tools/llvm-objdump/X86/Inputs/source-interleave-same- [...]
 create mode 100644 llvm/test/tools/llvm-objdump/X86/source-interleave-same-line-di [...]
 create mode 100644 llvm/test/tools/llvm-objdump/X86/warn-missing-disasm-func.test
 create mode 100644 llvm/unittests/ADT/StringSetTest.cpp
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[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig updated (bad2b3cf08b -> c5ef502ee81)