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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_cross/gnu-master-arm-build_cross in repository toolchain/ci/binutils-gdb.
from ce3ec98acd sim: unify gettext/intl probing logic adds 83b1d8f4a6 elf: Correct DT_TEXTREL warning in PDE adds 89ee1c2f6e Automatic date update in version.in adds 36842f65be sim: drop old BUILT_SRC_FROM_COMMON ref adds 54c47dfb68 sim: ppc: rename inline defines to match common code adds a979f2a07a sim: unify dtc tool checks adds 57a922a598 sim: move UNUSED before TYPE in SIM_ENDIAN_INLINE's definition adds 7e3941ac06 gdb/gdbserver: switch to AC_CONFIG_MACRO_DIRS adds 406b4ada55 x86: Count PLT for GOTOFF relocation against IFUNC symbol adds d73f39ee43 sim: move sim-inline to the common code adds 4ca8baee00 sim: m68hc11: fix unused function warnings with -O0 adds 1bf5c34239 sim: unify cgen maintainer settings adds 3a829bc50c sim: unify general maintainer settings adds 3eda63f2e4 sim: delete SIM_AC_COMMON macro adds 4488e43c49 sim: rx: scope the unique configure flag adds e27c0d7ae3 Automatic date update in version.in adds 1b40d569a8 sim: cris: clean up printf & abort usage a bit adds 61e2dde2db gdb/python: handle saving user registers in a frame unwinder adds 8b9c48b287 gdb/python: move PyLong_From* calls into py-utils.c adds d52b800721 gdb/python: add PendingFrame.level and Frame.level methods adds 96f842cbdb gdb/riscv: add support for vector registers in target descriptions
No new revisions were added by this update.
Summary of changes: bfd/ChangeLog | 12 ++ bfd/elflink.c | 3 + bfd/elfxx-x86.c | 12 +- bfd/version.h | 2 +- gdb/ChangeLog | 44 ++++++ gdb/NEWS | 11 ++ gdb/acinclude.m4 | 47 ++---- gdb/aclocal.m4 | 11 ++ gdb/arch/riscv.c | 6 + gdb/arch/riscv.h | 12 +- gdb/configure | 1 + gdb/configure.ac | 3 +- gdb/doc/ChangeLog | 10 ++ gdb/doc/gdb.texinfo | 8 + gdb/doc/python.texi | 9 ++ gdb/python/py-frame.c | 23 +++ gdb/python/py-inferior.c | 2 +- gdb/python/py-unwind.c | 40 +++++ gdb/riscv-tdep.c | 121 +++++++++++++- gdb/riscv-tdep.h | 8 +- gdb/testsuite/ChangeLog | 13 ++ gdb/testsuite/gdb.python/py-frame.exp | 11 ++ gdb/testsuite/gdb.python/py-pending-frame-level.c | 49 ++++++ .../gdb.python/py-pending-frame-level.exp | 65 ++++++++ gdb/testsuite/gdb.python/py-pending-frame-level.py | 55 +++++++ gdb/testsuite/gdb.python/py-unwind-user-regs.c | 37 +++++ gdb/testsuite/gdb.python/py-unwind-user-regs.exp | 98 ++++++++++++ gdb/testsuite/gdb.python/py-unwind-user-regs.py | 72 +++++++++ gdbserver/ChangeLog | 7 + gdbserver/acinclude.m4 | 25 +-- gdbserver/aclocal.m4 | 9 ++ gdbserver/configure | 1 + gdbserver/configure.ac | 1 + ld/ChangeLog | 16 ++ ld/testsuite/ld-i386/i386.exp | 2 + ld/testsuite/ld-i386/pr27998a.d | 7 + ld/testsuite/ld-i386/pr27998a.s | 22 +++ ld/testsuite/ld-i386/pr27998b.d | 7 + ld/testsuite/ld-i386/pr27998b.s | 20 +++ ld/testsuite/ld-x86-64/textrel-1.err | 4 + ld/testsuite/ld-x86-64/textrel-1a.s | 9 ++ ld/testsuite/ld-x86-64/textrel-1b.s | 15 ++ ld/testsuite/ld-x86-64/x86-64.exp | 5 + sim/ChangeLog | 31 ++++ sim/Makefile.am | 4 +- sim/Makefile.in | 9 +- sim/README-HACKING | 9 -- sim/aarch64/ChangeLog | 10 ++ sim/aarch64/aclocal.m4 | 89 ----------- sim/aarch64/configure | 74 --------- sim/aarch64/configure.ac | 2 - sim/aclocal.m4 | 2 + sim/arch-subdir.mk.in | 16 ++ sim/arm/ChangeLog | 10 ++ sim/arm/aclocal.m4 | 89 ----------- sim/arm/configure | 74 --------- sim/arm/configure.ac | 2 - sim/avr/ChangeLog | 10 ++ sim/avr/aclocal.m4 | 89 ----------- sim/avr/configure | 74 --------- sim/avr/configure.ac | 2 - sim/bfin/ChangeLog | 15 ++ sim/bfin/Makefile.in | 2 +- sim/bfin/aclocal.m4 | 89 ----------- sim/bfin/configure | 74 --------- sim/bfin/configure.ac | 2 - sim/bpf/ChangeLog | 21 +++ sim/bpf/Makefile.in | 5 - sim/bpf/aclocal.m4 | 90 ----------- sim/bpf/configure | 112 ------------- sim/bpf/configure.ac | 3 - sim/common/ChangeLog | 16 ++ sim/common/Make-common.in | 5 - sim/common/sim-inline.h | 54 +++---- sim/configure | 173 ++++++++++++++++++++- sim/configure.ac | 2 + sim/cr16/ChangeLog | 10 ++ sim/cr16/aclocal.m4 | 89 ----------- sim/cr16/configure | 74 --------- sim/cr16/configure.ac | 2 - sim/cris/ChangeLog | 27 ++++ sim/cris/Makefile.in | 5 - sim/cris/aclocal.m4 | 90 ----------- sim/cris/configure | 112 ------------- sim/cris/configure.ac | 3 - sim/cris/traps.c | 77 +++++---- sim/d10v/ChangeLog | 10 ++ sim/d10v/aclocal.m4 | 89 ----------- sim/d10v/configure | 74 --------- sim/d10v/configure.ac | 2 - sim/erc32/ChangeLog | 10 ++ sim/erc32/aclocal.m4 | 89 ----------- sim/erc32/configure | 74 --------- sim/erc32/configure.ac | 2 - sim/example-synacor/ChangeLog | 10 ++ sim/example-synacor/aclocal.m4 | 89 ----------- sim/example-synacor/configure | 74 --------- sim/example-synacor/configure.ac | 2 - sim/frv/ChangeLog | 21 +++ sim/frv/Makefile.in | 5 - sim/frv/aclocal.m4 | 90 ----------- sim/frv/configure | 112 ------------- sim/frv/configure.ac | 3 - sim/ft32/ChangeLog | 10 ++ sim/ft32/aclocal.m4 | 89 ----------- sim/ft32/configure | 74 --------- sim/ft32/configure.ac | 2 - sim/h8300/ChangeLog | 10 ++ sim/h8300/aclocal.m4 | 89 ----------- sim/h8300/configure | 74 --------- sim/h8300/configure.ac | 2 - sim/iq2000/ChangeLog | 21 +++ sim/iq2000/Makefile.in | 5 - sim/iq2000/aclocal.m4 | 90 ----------- sim/iq2000/configure | 112 ------------- sim/iq2000/configure.ac | 3 - sim/lm32/ChangeLog | 21 +++ sim/lm32/Makefile.in | 5 - sim/lm32/aclocal.m4 | 90 ----------- sim/lm32/configure | 112 ------------- sim/lm32/configure.ac | 3 - sim/m32c/ChangeLog | 10 ++ sim/m32c/aclocal.m4 | 89 ----------- sim/m32c/configure | 74 --------- sim/m32c/configure.ac | 2 - sim/m32r/ChangeLog | 21 +++ sim/m32r/Makefile.in | 5 - sim/m32r/aclocal.m4 | 90 ----------- sim/m32r/configure | 112 ------------- sim/m32r/configure.ac | 3 - sim/m4/sim_ac_common.m4 | 29 ---- sim/m4/sim_ac_option_inline.m4 | 11 +- sim/m4/sim_ac_toolchain.m4 | 2 + sim/m68hc11/ChangeLog | 19 +++ sim/m68hc11/aclocal.m4 | 89 ----------- sim/m68hc11/configure | 74 --------- sim/m68hc11/configure.ac | 2 - sim/m68hc11/sim-main.h | 44 +++--- sim/mcore/ChangeLog | 10 ++ sim/mcore/aclocal.m4 | 89 ----------- sim/mcore/configure | 74 --------- sim/mcore/configure.ac | 2 - sim/microblaze/ChangeLog | 10 ++ sim/microblaze/aclocal.m4 | 89 ----------- sim/microblaze/configure | 74 --------- sim/microblaze/configure.ac | 2 - sim/mips/ChangeLog | 10 ++ sim/mips/aclocal.m4 | 89 ----------- sim/mips/configure | 74 --------- sim/mips/configure.ac | 2 - sim/mn10300/ChangeLog | 10 ++ sim/mn10300/aclocal.m4 | 89 ----------- sim/mn10300/configure | 74 --------- sim/mn10300/configure.ac | 2 - sim/moxie/ChangeLog | 21 +++ sim/moxie/Makefile.in | 4 +- sim/moxie/aclocal.m4 | 89 ----------- sim/moxie/configure | 168 -------------------- sim/moxie/configure.ac | 4 - sim/msp430/ChangeLog | 10 ++ sim/msp430/aclocal.m4 | 89 ----------- sim/msp430/configure | 74 --------- sim/msp430/configure.ac | 2 - sim/or1k/ChangeLog | 21 +++ sim/or1k/Makefile.in | 5 - sim/or1k/aclocal.m4 | 90 ----------- sim/or1k/configure | 112 ------------- sim/or1k/configure.ac | 3 - sim/ppc/ChangeLog | 19 +++ sim/ppc/Makefile.in | 2 +- sim/ppc/configure | 42 ----- sim/ppc/configure.ac | 36 ----- sim/ppc/inline.h | 42 ++--- sim/ppc/options.c | 8 +- sim/ppc/std-config.h | 33 ++-- sim/pru/ChangeLog | 10 ++ sim/pru/aclocal.m4 | 89 ----------- sim/pru/configure | 74 --------- sim/pru/configure.ac | 2 - sim/riscv/ChangeLog | 10 ++ sim/riscv/aclocal.m4 | 89 ----------- sim/riscv/configure | 74 --------- sim/riscv/configure.ac | 2 - sim/rl78/ChangeLog | 10 ++ sim/rl78/aclocal.m4 | 89 ----------- sim/rl78/configure | 74 --------- sim/rl78/configure.ac | 2 - sim/rx/ChangeLog | 17 ++ sim/rx/Makefile.in | 2 +- sim/rx/aclocal.m4 | 89 ----------- sim/rx/configure | 102 ++---------- sim/rx/configure.ac | 21 ++- sim/sh/ChangeLog | 10 ++ sim/sh/aclocal.m4 | 89 ----------- sim/sh/configure | 74 --------- sim/sh/configure.ac | 2 - sim/v850/ChangeLog | 10 ++ sim/v850/aclocal.m4 | 89 ----------- sim/v850/configure | 74 --------- sim/v850/configure.ac | 2 - 200 files changed, 1725 insertions(+), 5882 deletions(-) create mode 100644 gdb/testsuite/gdb.python/py-pending-frame-level.c create mode 100644 gdb/testsuite/gdb.python/py-pending-frame-level.exp create mode 100644 gdb/testsuite/gdb.python/py-pending-frame-level.py create mode 100644 gdb/testsuite/gdb.python/py-unwind-user-regs.c create mode 100644 gdb/testsuite/gdb.python/py-unwind-user-regs.exp create mode 100644 gdb/testsuite/gdb.python/py-unwind-user-regs.py create mode 100644 ld/testsuite/ld-i386/pr27998a.d create mode 100644 ld/testsuite/ld-i386/pr27998a.s create mode 100644 ld/testsuite/ld-i386/pr27998b.d create mode 100644 ld/testsuite/ld-i386/pr27998b.s create mode 100644 ld/testsuite/ld-x86-64/textrel-1.err create mode 100644 ld/testsuite/ld-x86-64/textrel-1a.s create mode 100644 ld/testsuite/ld-x86-64/textrel-1b.s delete mode 100644 sim/m4/sim_ac_common.m4