[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (9a7895dc208 -> 631501b1f90)

23 Dec 2020


      This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig
in repository toolchain/ci/llvm-project.
from  9a7895dc208 [Flang][openmp][5.0] Add task_reduction clause.
      adds  8a58f21f5b6 [PowerPC][Power10] Exploit store rightmost vector element i [...]
      adds  5c1c8443eb7 [lldb] Abstract scoped timer logic behind LLDB_SCOPED_TIMER (NFC)
      adds  be85b3e4324 Fix some misnamed variables in sve-fixed-length-int-minmax.ll.
      adds  5d10b8ad595 [ADT] Add resize_for_overwrite method to SmallVector.
      adds  f106b281be2 [tests] precommit a test mentioned in review for D93317
      adds  ac90bbc9cb8 [LoopDeletion] Add test case where outer loop needs to be deleted.
      adds  f5071489ea8 [ADT] Fix some tests after 5d10b8ad
      adds  e17a00fc87b [lldb] Add SBType::IsScopedEnumerationType method
      adds  1432ae57bf6 [lldb] Add SBType::GetEnumerationIntegerType method
      adds  612ddc3117c [OpenMP][Docs] Updated the faq about building an OpenMP off [...]
      adds  85d4a4bcc71 Revert "Fix memory leak complicated non-type template arguments."
      adds  ab7a60eb410 Revert "Fix MSVC "not all control paths return a value" war [...]
      adds  20802323339 Revert "[c++20] P1907R1: Support for generalized non-type t [...]
      adds  af0dbaaa38f Revert "Following up on PR48517, fix handling of template a [...]
      adds  34e72a14611 Revert "DR2064: decltype(E) is only a dependent type if E i [...]
      adds  1aa10ab2e1d Revert "[Flang][openmp][5.0] Add task_reduction clause."
      adds  b2e734d5f46 Revert "[clangd] zap a few warnings"
      adds  6283d2aa519 Revert "[LLDB] Unbreak the build after recent clang changes"
      adds  a5311d731e1 [clang-tidy] Handle template instantiations in container si [...]
      adds  ae8f4b2178c [AMDGPU] Folding of FI operand with flat scratch
      adds  333108e8bef Add a llvm.coro.end.async intrinsic
      adds  9cb748724ef [OpenMP][Docs] Add FAQ entry about math and complex on GPUs
      adds  1eb082c2ea4 [OpenMP][Docs] Fixed a typo in the doc that can mislead use [...]
      adds  7b0f9dd79a3 [OpenMP][Docs] Fix Typo
      adds  53deef9e0b8 [RISCV] Remove unneeded !eq comparing a single bit value to [...]
      adds  7ec7788ac17 Try to fix build on Windows
      adds  57ffbe020af glld/mac] Don't add names of unreferenced symbols to string table
      adds  0d15d4b6f43 [SLP] use operand index abstraction for number of operands
      adds  f6929c01952 [SLP] add reduction tests for maxnum/minnum intrinsics; NFC
      adds  3dbe471a260 [clangd] Use atomics instead of locks to track periodic mem [...]
      adds  df6cbd37f57 [mlir] Lower gpu.memcpy to GPU runtime calls.
      adds  f7a26127f21 [clangd] Release notes for b8c37153d5393aad96
      adds  a781a706b96 [WebAssembly][SIMD] Rename shuffle, swizzle, and load_splats
      adds  8de43b926f0 [mlir] Remove instance methods from LLVMType
      adds  1c19804ebf4 [OpenMP] Add OpenMP Documentation for Libomptarget environm [...]
      adds  75a3f326c3d [IR] Add an ImplicitLocOpBuilder helper class for building  [...]
      adds  6dfe5801e01 scudo: Move the configuration for the primary allocator to  [...]
      adds  ca4bf58e4ee [AMDGPU] Support unaligned flat scratch in TLI
      adds  d15119a02d9 [AMDGPU][GlobalISel] GlobalISel for flat scratch
      adds  e6b3db6309f scudo: Replace the Cache argument on MapAllocator with a Co [...]
      adds  faac1c02c80 scudo: Move the management of the UseMemoryTagging bit out  [...]
      adds  22cf54a7fba Replace `T(x)` with `reinterpret_cast<T>(x)` everywhere it  [...]
      adds  5bec0828347 VirtRegMap: Use Register
      adds  29ed846d671 AMDGPU: Fix assert when checking for implicit operand legality
      adds  c8874464b5f [RISCV] Add intrinsics for vslide1up/down, vfslide1up/down  [...]
      adds  42687839980 [RISCV] Add intrinsics for vwmacc[u|su|us] instructions
      adds  ad0a7ad950f [RISCV] Add intrinsics for vf[n]macc/vf[n]msac/vf[n]madd/vf [...]
      adds  bac54639c7b AMDGPU: Add spilled CSR SGPRs to entry block live ins
      adds  8bf9cdeaee4 AMDGPU: Use Register
      adds  77fb45e59e4 [lld/mac] Add --version flag
      adds  581d13f8aeb GlobalISel: Return APInt from getConstantVRegVal
      adds  e6fde1ae7df [MemorySSA] Use is_contained (NFC)
      adds  efe7f5ede0b [WebAssembly][NFC] Refactor SIMD load/store tablegen defs
      adds  3c707d73f26 [NewGVN] Remove for_each_found (NFC)
      adds  0219cf7dfaf [NewPM] Fix objc-arc-apelim pass typo
      adds  4d479443934 [RISCV] Define the vfmin, vfmax RVV intrinsics
      adds  032600b9aef [RISCV] Define vmerge/vfmerge intrinsics.
      adds  bdef1f87aba [llvm-readobj] - Dump the ELF file type better.
      adds  6301871d06d [RISCV] Add intrinsics for vfwmacc, vfwnmacc, vfwmsac, vfwn [...]
      adds  221fdedc692 [AMDGPU][GlobalISel] Fold flat vgpr + constant addresses
      adds  65ba0cd3955 [mlir] Modernize std-to-llvm operation conversion doc
      adds  8451d4872ed [mlir] NFC: Remove ConvertToLLVMPattern::getDataPtr(). All  [...]
      adds  32a884c9c52 [mlir] Add translation of omp.wsloop to LLVM IR
      adds  19a0d0a40ce [mlir] Rename ConvertToLLVMPattern::isSupportedMemRefType() [...]
      adds  25a02c3d1a6 Revert "PR24076, PR33655, C++ CWG 1558: Consider the instan [...]
      adds  eb9483b2105 [format] Add overload to parseConfiguration that accept llv [...]
      adds  7ed9cfc7b19 [mlir] Remove static constructors from LLVMType
      adds  c3acda0798f [VE] Vector 'and' isel and tests
      adds  acaa6e4260c [NFC] Uniquify 'const' in TargetTransformInfoImpl.h
      adds  a9f14cdc620 [ARM] Add bank conflict hazarding
      adds  6e603464959 [OpenMP] Fixing Typo in Documentation
      adds  5426b2f9ed9 [clang-format] PR48535 clang-format Incorrectly Removes Spa [...]
      adds  031743cb5b3 [clang-format] PR48539 ReflowComments breaks Qt translation [...]
      adds  1d0dc9be6d7 [MLIR][SPIRV] Add rewrite pattern to convert select+cmp int [...]
      adds  2522fa053b6 [clangd] Do not take stale definition from the static index.
      adds  9fb074e7bb1 [BPI] Improve static heuristics for "cold" paths.
      adds  e122a71a0a2 [TableGen] Add the !substr() bang operator
       new  9d1140e18e6 [lld-macho] Simulator & DriverKit executables should always be PIE
       new  631501b1f90 [OpenMP] Fixing typo on memory size in Documenation
The 2 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
 .../readability/ContainerSizeEmptyCheck.cpp        |  183 ++-
 clang-tools-extra/clangd/ClangdLSPServer.cpp       |   37 +-
 clang-tools-extra/clangd/ClangdLSPServer.h         |   11 +-
 clang-tools-extra/clangd/DumpAST.cpp               |    1 -
 clang-tools-extra/clangd/FindTarget.cpp            |    1 -
 clang-tools-extra/clangd/index/Merge.cpp           |    6 +
 clang-tools-extra/clangd/index/remote/Client.cpp   |    3 +-
 clang-tools-extra/clangd/support/Threading.cpp     |   12 +
 clang-tools-extra/clangd/support/Threading.h       |   29 +
 clang-tools-extra/clangd/unittests/IndexTests.cpp  |   34 +
 .../clangd/unittests/support/ThreadingTests.cpp    |   21 +
 clang-tools-extra/docs/ReleaseNotes.rst            |   12 +-
 .../checkers/readability-container-size-empty.cpp  |  218 ++-
 clang/include/clang/AST/ASTContext.h               |    4 +-
 clang/include/clang/AST/DependenceFlags.h          |    6 -
 clang/include/clang/AST/Expr.h                     |   14 +-
 clang/include/clang/AST/PropertiesBase.td          |   12 -
 clang/include/clang/AST/RecursiveASTVisitor.h      |    2 -
 clang/include/clang/AST/TemplateArgumentVisitor.h  |    2 -
 clang/include/clang/AST/TemplateBase.h             |   53 +-
 clang/include/clang/AST/Type.h                     |    4 +-
 clang/include/clang/Basic/DiagnosticSemaKinds.td   |    5 +
 clang/include/clang/Format/Format.h                |   13 +-
 clang/include/clang/Sema/Sema.h                    |    7 +-
 .../include/clang/Serialization/ASTRecordWriter.h  |    1 -
 clang/lib/AST/ASTContext.cpp                       |   13 +-
 clang/lib/AST/ASTImporter.cpp                      |   11 -
 clang/lib/AST/ASTStructuralEquivalence.cpp         |    4 -
 clang/lib/AST/ComputeDependence.cpp                |   13 +-
 clang/lib/AST/Decl.cpp                             |    4 -
 clang/lib/AST/Expr.cpp                             |   35 +-
 clang/lib/AST/ExprCXX.cpp                          |   11 +-
 clang/lib/AST/ExprConstant.cpp                     |  101 +-
 clang/lib/AST/ItaniumMangle.cpp                    |   52 +-
 clang/lib/AST/MicrosoftMangle.cpp                  |   11 -
 clang/lib/AST/ODRHash.cpp                          |    2 -
 clang/lib/AST/StmtProfile.cpp                      |    6 -
 clang/lib/AST/TemplateBase.cpp                     |  127 +-
 clang/lib/AST/Type.cpp                             |   20 +-
 clang/lib/AST/TypeLoc.cpp                          |    1 -
 clang/lib/CodeGen/CGCall.h                         |    6 +-
 clang/lib/CodeGen/CGDebugInfo.cpp                  |    8 -
 clang/lib/CodeGen/CGExprConstant.cpp               |   10 +-
 clang/lib/Format/BreakableToken.cpp                |    4 +-
 clang/lib/Format/Format.cpp                        |   16 +-
 clang/lib/Format/TokenAnnotator.cpp                |    7 +
 clang/lib/Index/USRGeneration.cpp                  |    4 -
 clang/lib/Sema/SemaLookup.cpp                      |    1 -
 clang/lib/Sema/SemaOverload.cpp                    |   19 +-
 clang/lib/Sema/SemaTemplate.cpp                    |  232 +--
 clang/lib/Sema/SemaTemplateDeduction.cpp           |   94 +-
 clang/lib/Sema/SemaTemplateInstantiate.cpp         |   16 +-
 clang/lib/Sema/SemaTemplateVariadic.cpp            |    2 -
 clang/lib/Sema/TreeTransform.h                     |   12 +-
 clang/lib/Serialization/ASTReader.cpp              |    1 -
 clang/lib/Serialization/ASTWriter.cpp              |    1 -
 clang/test/CXX/drs/dr15xx.cpp                      |   14 -
 clang/test/CXX/drs/dr20xx.cpp                      |   12 -
 clang/test/CodeGenCXX/mangle-ms-templates.cpp      |   10 -
 clang/test/CodeGenCXX/mangle-template.cpp          |   60 +-
 clang/test/CodeGenCXX/template-arguments.cpp       |   81 -
 clang/test/Format/error-config.cpp                 |    4 +-
 .../OpenMP/distribute_dist_schedule_messages.cpp   |    2 +-
 ...tribute_parallel_for_dist_schedule_messages.cpp |    2 +-
 ...te_parallel_for_simd_dist_schedule_messages.cpp |    2 +-
 .../distribute_simd_dist_schedule_messages.cpp     |    2 +-
 .../target_parallel_for_simd_collapse_messages.cpp |    2 +-
 .../target_parallel_for_simd_ordered_messages.cpp  |    2 +-
 .../test/OpenMP/target_simd_collapse_messages.cpp  |    2 +-
 ...get_teams_distribute_dist_schedule_messages.cpp |    2 +-
 ...tribute_parallel_for_dist_schedule_messages.cpp |    2 +-
 ...te_parallel_for_simd_dist_schedule_messages.cpp |    2 +-
 ...eams_distribute_simd_dist_schedule_messages.cpp |    2 +-
 clang/test/OpenMP/target_update_from_messages.cpp  |    2 +-
 clang/test/OpenMP/target_update_to_messages.cpp    |    2 +-
 clang/test/OpenMP/task_messages.cpp                |    4 +-
 .../teams_distribute_dist_schedule_messages.cpp    |    2 +-
 ...tribute_parallel_for_dist_schedule_messages.cpp |    2 +-
 ...te_parallel_for_simd_dist_schedule_messages.cpp |    2 +-
 ...eams_distribute_simd_dist_schedule_messages.cpp |    2 +-
 clang/test/Sema/invalid-bitwidth-expr.mm           |    1 -
 .../SemaCXX/invalid-template-base-specifier.cpp    |    4 +-
 clang/test/SemaCXX/warn-unused-lambda-capture.cpp  |    2 +-
 clang/test/SemaTemplate/dependent-expr.cpp         |    7 +-
 .../test/SemaTemplate/instantiation-dependence.cpp |   74 -
 .../test/SemaTemplate/partial-spec-instantiate.cpp |   18 +-
 ...ontype_cxx17.cpp => temp_arg_nontype_cxx1z.cpp} |   50 +-
 clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp |   80 +-
 .../test/SemaTemplate/temp_arg_template_cxx1z.cpp  |    8 +-
 clang/tools/libclang/CIndex.cpp                    |    5 -
 clang/tools/libclang/CXCursor.cpp                  |    3 -
 clang/unittests/Format/FormatTest.cpp              |   14 +
 clang/unittests/Format/FormatTestComments.cpp      |    6 +
 clang/www/cxx_dr_status.html                       |    4 +-
 .../lib/scudo/standalone/allocator_config.h        |   51 +-
 compiler-rt/lib/scudo/standalone/combined.h        |   32 +-
 compiler-rt/lib/scudo/standalone/memtag.h          |    5 +
 compiler-rt/lib/scudo/standalone/options.h         |    6 +
 compiler-rt/lib/scudo/standalone/primary32.h       |   32 +-
 compiler-rt/lib/scudo/standalone/primary64.h       |   35 +-
 compiler-rt/lib/scudo/standalone/secondary.h       |   14 +-
 .../lib/scudo/standalone/tests/combined_test.cpp   |   25 +-
 .../lib/scudo/standalone/tests/primary_test.cpp    |   62 +-
 .../lib/scudo/standalone/tests/secondary_test.cpp  |   20 +-
 flang/include/flang/Parser/parse-tree.h            |    2 +-
 flang/lib/Parser/openmp-parsers.cpp                |    5 +-
 flang/lib/Parser/unparse.cpp                       |    2 +-
 flang/lib/Semantics/check-omp-structure.cpp        |    1 -
 flang/lib/Semantics/check-omp-structure.h          |    1 -
 flang/test/Semantics/omp-clause-validity01.f90     |    6 +-
 lld/COFF/Options.td                                |    2 +-
 lld/MachO/Driver.cpp                               |   40 +-
 lld/MachO/Options.td                               |    4 +-
 lld/MachO/SyntheticSections.cpp                    |   22 +-
 lld/test/MachO/driver.test                         |    4 +-
 lld/test/MachO/platform-version.s                  |    2 +-
 lld/test/MachO/symtab.s                            |    6 +-
 lld/test/MachO/x86-64-reloc-unsigned.s             |    4 +
 lldb/bindings/interface/SBType.i                   |    6 +
 lldb/include/lldb/API/SBType.h                     |    5 +
 lldb/include/lldb/Symbol/CompilerType.h            |    4 +
 lldb/include/lldb/Symbol/TypeSystem.h              |    5 +
 lldb/include/lldb/Utility/Timer.h                  |    7 +
 lldb/include/lldb/lldb-enumerations.h              |    1 -
 lldb/source/API/SBType.cpp                         |   20 +
 lldb/source/API/SystemInitializerFull.cpp          |    3 -
 lldb/source/Commands/CommandObjectTarget.cpp       |    3 +-
 lldb/source/Core/Disassembler.cpp                  |    4 +-
 lldb/source/Core/Mangled.cpp                       |    7 +-
 lldb/source/Core/Module.cpp                        |   43 +-
 .../Initialization/SystemInitializerCommon.cpp     |    6 +-
 lldb/source/Interpreter/CommandInterpreter.cpp     |   10 +-
 .../CPlusPlus/CPPLanguageRuntime.cpp               |    4 +-
 .../ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp   |    5 +-
 .../BSD-Archive/ObjectContainerBSDArchive.cpp      |    4 +-
 .../Plugins/ObjectFile/ELF/ObjectFileELF.cpp       |    4 +-
 .../Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp  |    3 +-
 .../ScriptInterpreter/Lua/ScriptInterpreterLua.cpp |    3 +-
 .../Python/ScriptInterpreterPython.cpp             |    9 +-
 .../Plugins/SymbolFile/DWARF/DWARFDebugAranges.cpp |    3 +-
 lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp |    8 +-
 .../Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp  |    3 +-
 .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp   |   19 +-
 .../SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp   |   12 +-
 .../Plugins/SymbolVendor/ELF/SymbolVendorELF.cpp   |    3 +-
 .../Plugins/SymbolVendor/wasm/SymbolVendorWasm.cpp |    3 +-
 .../Plugins/TypeSystem/Clang/TypeSystemClang.cpp   |   24 +-
 .../Plugins/TypeSystem/Clang/TypeSystemClang.h     |    5 +
 lldb/source/Symbol/CompileUnit.cpp                 |    3 +-
 lldb/source/Symbol/CompilerType.cpp                |   12 +
 lldb/source/Symbol/DWARFCallFrameInfo.cpp          |    3 +-
 lldb/source/Symbol/LocateSymbolFile.cpp            |    9 +-
 lldb/source/Symbol/ObjectFile.cpp                  |    8 +-
 lldb/source/Symbol/Symtab.cpp                      |   26 +-
 lldb/source/Target/Target.cpp                      |    4 +-
 lldb/source/Target/TargetList.cpp                  |    7 +-
 lldb/test/API/python_api/type/TestTypeList.py      |   23 +
 lldb/test/API/python_api/type/main.cpp             |    7 +
 lldb/tools/lldb-test/SystemInitializerTest.cpp     |    3 -
 llvm/docs/Coroutines.rst                           |   42 +
 llvm/docs/TableGen/ProgRef.rst                     |   10 +-
 llvm/include/llvm/ADT/SmallVector.h                |   14 +-
 llvm/include/llvm/Analysis/BranchProbabilityInfo.h |  153 +-
 .../llvm/Analysis/LazyBranchProbabilityInfo.h      |    2 +-
 .../llvm/Analysis/TargetTransformInfoImpl.h        |  196 ++-
 .../llvm/CodeGen/GlobalISel/MIPatternMatch.h       |    2 +-
 llvm/include/llvm/CodeGen/GlobalISel/Utils.h       |   11 +-
 llvm/include/llvm/CodeGen/VirtRegMap.h             |    8 +-
 llvm/include/llvm/Frontend/OpenMP/OMP.td           |    1 -
 llvm/include/llvm/IR/Intrinsics.td                 |    2 +
 llvm/include/llvm/IR/IntrinsicsRISCV.td            |   51 +-
 llvm/include/llvm/IR/SymbolTableListTraits.h       |    8 +-
 llvm/include/llvm/Object/Binary.h                  |    4 +-
 llvm/include/llvm/TableGen/Record.h                |    2 +-
 llvm/lib/Analysis/BranchProbabilityInfo.cpp        |  645 ++++----
 llvm/lib/Analysis/MemorySSA.cpp                    |    3 +-
 llvm/lib/Analysis/OptimizationRemarkEmitter.cpp    |    2 +-
 llvm/lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp     |    7 +-
 llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp     |   28 +-
 .../lib/CodeGen/GlobalISel/InstructionSelector.cpp |    2 +-
 llvm/lib/CodeGen/GlobalISel/Utils.cpp              |   30 +-
 llvm/lib/CodeGen/LiveRangeEdit.cpp                 |    2 +-
 llvm/lib/Object/COFFObjectFile.cpp                 |   24 +-
 llvm/lib/Object/ELFObjectFile.cpp                  |    3 +-
 llvm/lib/Object/XCOFFObjectFile.cpp                |    4 +-
 llvm/lib/Passes/PassRegistry.def                   |    2 +-
 llvm/lib/TableGen/Record.cpp                       |   28 +-
 llvm/lib/TableGen/TGLexer.cpp                      |    1 +
 llvm/lib/TableGen/TGLexer.h                        |    6 +-
 llvm/lib/TableGen/TGParser.cpp                     |   95 +-
 llvm/lib/TableGen/TGParser.h                       |    1 +
 .../AArch64/GISel/AArch64InstructionSelector.cpp   |   47 +-
 .../Target/AArch64/GISel/AArch64LegalizerInfo.cpp  |    2 +-
 .../AArch64/GISel/AArch64PostLegalizerCombiner.cpp |    2 +-
 .../AArch64/GISel/AArch64PostLegalizerLowering.cpp |    2 +-
 llvm/lib/Target/AMDGPU/AMDGPUGISel.td              |    8 +
 .../Target/AMDGPU/AMDGPUInstructionSelector.cpp    |   97 +-
 llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h |    3 +
 llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp     |   26 +-
 llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp  |    2 +-
 llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp         |    8 +-
 llvm/lib/Target/AMDGPU/SIFoldOperands.cpp          |   57 +-
 llvm/lib/Target/AMDGPU/SIISelLowering.cpp          |   15 +-
 llvm/lib/Target/AMDGPU/SIInstrInfo.h               |    3 +
 llvm/lib/Target/AMDGPU/SIInstrInfo.td              |    7 +
 llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp       |   19 +-
 llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp          |    4 +
 llvm/lib/Target/ARM/ARM.td                         |    4 +-
 llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp           |   25 +
 llvm/lib/Target/ARM/ARMBaseInstrInfo.h             |    4 +
 llvm/lib/Target/ARM/ARMHazardRecognizer.cpp        |  173 ++
 llvm/lib/Target/ARM/ARMHazardRecognizer.h          |   32 +
 llvm/lib/Target/ARM/ARMSubtarget.cpp               |    1 +
 llvm/lib/Target/ARM/ARMSubtarget.h                 |    2 +
 llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp       |    9 +-
 llvm/lib/Target/PowerPC/PPCInstrPrefix.td          |   25 +-
 llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td    |  242 ++-
 llvm/lib/Target/VE/VVPInstrInfo.td                 |    3 +
 llvm/lib/Target/VE/VVPInstrPatternsVec.td          |    3 +
 llvm/lib/Target/VE/VVPNodes.def                    |    1 +
 .../MCTargetDesc/WebAssemblyMCTargetDesc.h         |   40 +-
 .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td |  322 ++--
 llvm/lib/Target/X86/X86InstructionSelector.cpp     |    2 +-
 llvm/lib/Transforms/Coroutines/CoroEarly.cpp       |    7 +-
 llvm/lib/Transforms/Coroutines/CoroFrame.cpp       |   19 +-
 llvm/lib/Transforms/Coroutines/CoroInstr.h         |   40 +-
 llvm/lib/Transforms/Coroutines/CoroInternal.h      |    4 +-
 llvm/lib/Transforms/Coroutines/CoroSplit.cpp       |  100 +-
 llvm/lib/Transforms/Coroutines/Coroutines.cpp      |   25 +-
 llvm/lib/Transforms/Scalar/LoopPredication.cpp     |    2 +-
 llvm/lib/Transforms/Scalar/NewGVN.cpp              |   12 -
 llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp    |    3 +-
 .../Analysis/BlockFrequencyInfo/redundant_edges.ll |    2 +-
 llvm/test/Analysis/BranchProbabilityInfo/basic.ll  |   40 +-
 .../BranchProbabilityInfo/deopt-intrinsic.ll       |    4 +-
 .../Analysis/BranchProbabilityInfo/deopt-invoke.ll |  107 ++
 llvm/test/Analysis/BranchProbabilityInfo/loop.ll   |  209 ++-
 .../Analysis/BranchProbabilityInfo/noreturn.ll     |   35 +-
 .../Analysis/BranchProbabilityInfo/unreachable.ll  |  154 ++
 .../irtranslator-invoke-probabilities.ll           |    2 +-
 .../CodeGen/AArch64/sve-fixed-length-int-minmax.ll |   48 +-
 .../GlobalISel/extractelement-stack-lower.ll       | 1675 +++++++++++---------
 .../CodeGen/AMDGPU/GlobalISel/extractelement.ll    |   16 +-
 .../test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll |  749 +++++++++
 .../AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll    |  260 ++-
 .../GlobalISel/llvm.amdgcn.global.atomic.fadd.ll   |   30 +-
 .../CodeGen/AMDGPU/GlobalISel/load-constant.96.ll  |   89 +-
 llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll         |   11 +-
 .../CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir     |   35 +
 llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi.mir  |   88 +
 .../test/CodeGen/AMDGPU/frame-index-elimination.ll |    2 +-
 llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir    |   16 +
 .../transform-block-with-return-to-epilog.ll       |    4 +-
 llvm/test/CodeGen/AMDGPU/unaligned-load-store.ll   |   69 +-
 llvm/test/CodeGen/ARM/ifcvt-branch-weight-bug.ll   |    2 +-
 llvm/test/CodeGen/ARM/sub-cmp-peephole.ll          |    2 +-
 .../CodeGen/ARM/v8m.base-jumptable_alignment.ll    |   22 +-
 llvm/test/CodeGen/PowerPC/builtins-ppc-p10vsx.ll   |  261 +--
 llvm/test/CodeGen/PowerPC/p10-spill-crgt.ll        |  182 +--
 llvm/test/CodeGen/PowerPC/pr36292.ll               |    5 +-
 llvm/test/CodeGen/PowerPC/sms-cpy-1.ll             |    1 +
 .../CodeGen/PowerPC/store-rightmost-vector-elt.ll  |  109 ++
 llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll         |  856 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll         | 1142 +++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll         |  856 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll         | 1142 +++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll          |  881 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll          | 1201 ++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll        |  441 ++++++
 llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll        |  601 +++++++
 llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll          |  881 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfmin-rv64.ll          | 1201 ++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll         |  856 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll         | 1142 +++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll         |  856 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll         | 1142 +++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll        |  856 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll        | 1142 +++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll        |  856 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll        | 1142 +++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll        |  856 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll        | 1142 +++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll        |  856 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll        | 1142 +++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll   |  512 ++++++
 llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll   |  698 ++++++++
 llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll     |  523 ++++++
 llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll     |  713 +++++++++
 llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll        |  482 ++++++
 llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll        |  868 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll        |  482 ++++++
 llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll        |  868 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll       |  482 ++++++
 llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll       |  868 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll       |  482 ++++++
 llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll       |  868 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll         |  973 ++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vmerge-rv64.ll         | 1189 ++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll    |  800 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vslide1down-rv64.ll    |  978 ++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll      |   24 +
 llvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll      | 1000 ++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vwmacc-rv32.ll         | 1034 ++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vwmacc-rv64.ll         | 1412 +++++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll       | 1034 ++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv64.ll       | 1412 +++++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv32.ll        | 1034 ++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll        | 1412 +++++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv32.ll       |  516 ++++++
 llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv64.ll       |  704 ++++++++
 llvm/test/CodeGen/SPARC/missinglabel.ll            |    2 +-
 llvm/test/CodeGen/SystemZ/debuginstr-cgp.mir       |    4 +-
 llvm/test/CodeGen/Thumb2/schedm7-hazard.ll         |   38 +
 llvm/test/CodeGen/VE/Vector/vec_and.ll             |  132 ++
 llvm/test/CodeGen/WebAssembly/simd-build-vector.ll |    6 +-
 llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll   |   10 +-
 llvm/test/CodeGen/WebAssembly/simd-load-splat.ll   |    2 +-
 .../WebAssembly/simd-load-store-alignment.ll       |   36 +-
 .../CodeGen/WebAssembly/simd-nested-shuffles.ll    |    2 +-
 llvm/test/CodeGen/WebAssembly/simd-offset.ll       |   96 +-
 .../WebAssembly/simd-shift-complex-splats.ll       |    2 +-
 .../CodeGen/WebAssembly/simd-shuffle-bitcast.ll    |    2 +-
 llvm/test/CodeGen/WebAssembly/simd.ll              |   48 +-
 .../WebAssembly/switch-unreachable-default.ll      |    4 +-
 llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll   |   19 +-
 llvm/test/CodeGen/X86/block-placement.ll           |    4 +-
 .../CodeGen/X86/misched_phys_reg_assign_order.ll   |    6 +-
 llvm/test/CodeGen/X86/pr27501.ll                   |   10 +-
 llvm/test/CodeGen/X86/pr37916.ll                   |    2 +-
 llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll      |  117 +-
 llvm/test/MC/Disassembler/WebAssembly/wasm.txt     |    2 +-
 llvm/test/MC/WebAssembly/simd-encodings.s          |   24 +-
 llvm/test/Object/elf-unknown-type.test             |   10 -
 llvm/test/TableGen/substr.td                       |   81 +
 llvm/test/Transforms/Coroutines/coro-async.ll      |   67 +-
 .../test/Transforms/JumpThreading/thread-prob-3.ll |    4 +-
 .../AMDGPU/adjust-alloca-alignment.ll              |   35 +-
 .../LoopDeletion/noop-loops-with-subloops.ll       |  172 ++
 llvm/test/Transforms/LoopVectorize/loop-form.ll    |   88 +
 llvm/test/Transforms/SLPVectorizer/X86/fmaxnum.ll  |  147 ++
 llvm/test/Transforms/SLPVectorizer/X86/fminnum.ll  |  147 ++
 llvm/test/tools/llvm-readobj/ELF/file-types.test   |   10 +-
 llvm/tools/llvm-readobj/ELFDumper.cpp              |   49 +-
 llvm/unittests/ADT/SmallVectorTest.cpp             |   25 +
 mlir/docs/ConversionToLLVMDialect.md               |  467 ------
 mlir/docs/LLVMDialectMemRefConvention.md           |  439 +++++
 mlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp         |   21 +-
 mlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp         |   21 +-
 .../StandardToLLVM/ConvertStandardToLLVM.h         |   13 +-
 mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td        |   32 +-
 mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h       |  182 +--
 mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td        |    9 +-
 mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td      |    5 +
 .../Dialect/SPIRV/IR/SPIRVGLSLCanonicalization.h   |   31 +
 mlir/include/mlir/IR/ImplicitLocOpBuilder.h        |  123 ++
 .../include/mlir/Target/LLVMIR/ModuleTranslation.h |    3 +
 mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp    |  156 +-
 .../GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp  |  105 +-
 mlir/lib/Conversion/GPUCommon/GPUOpsLowering.h     |   24 +-
 .../GPUCommon/IndexIntrinsicsOpLowering.h          |   13 +-
 .../Conversion/GPUCommon/OpToFuncCallLowering.h    |   14 +-
 .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp  |    8 +-
 .../GPUToVulkan/ConvertLaunchFuncToVulkanCalls.cpp |  106 +-
 mlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp  |    2 +-
 .../SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp   |    7 +-
 .../Conversion/SPIRVToLLVM/ConvertSPIRVToLLVM.cpp  |   28 +-
 .../Conversion/StandardToLLVM/StandardToLLVM.cpp   |  263 +--
 .../VectorToLLVM/ConvertVectorToLLVM.cpp           |   48 +-
 .../lib/Conversion/VectorToROCDL/VectorToROCDL.cpp |   10 +-
 mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp         |  248 +--
 mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp           |  283 +---
 mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp         |   22 +-
 mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp        |   12 +-
 mlir/lib/Dialect/SPIRV/IR/CMakeLists.txt           |    1 +
 mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.td |   30 +
 .../Dialect/SPIRV/IR/SPIRVGLSLCanonicalization.cpp |   35 +
 mlir/lib/ExecutionEngine/JitRunner.cpp             |   19 +-
 mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp       |   45 +-
 mlir/lib/Target/LLVMIR/ModuleTranslation.cpp       |  136 +-
 .../lower-memcpy-to-gpu-runtime-calls.mlir         |   19 +
 mlir/test/Dialect/LLVMIR/invalid.mlir              |    8 +-
 .../SPIRV/Transforms/glsl_canonicalize.mlir        |  113 ++
 mlir/test/Target/openmp-llvm.mlir                  |   34 +-
 mlir/test/lib/Dialect/SPIRV/CMakeLists.txt         |    1 +
 .../lib/Dialect/SPIRV/TestGLSLCanonicalization.cpp |   39 +
 mlir/test/lib/Transforms/TestConvertCallOp.cpp     |    3 +-
 .../mlir-cuda-runner/cuda-runtime-wrappers.cpp     |    7 +
 mlir/tools/mlir-opt/mlir-opt.cpp                   |    2 +
 .../mlir-rocm-runner/rocm-runtime-wrappers.cpp     |    5 +
 openmp/docs/SupportAndFAQ.rst                      |   50 +-
 openmp/docs/design/Runtimes.rst                    |   82 +
 391 files changed, 51868 insertions(+), 5191 deletions(-)
 delete mode 100644 clang/test/CodeGenCXX/template-arguments.cpp
 delete mode 100644 clang/test/SemaTemplate/instantiation-dependence.cpp
 rename clang/test/SemaTemplate/{temp_arg_nontype_cxx17.cpp => temp_arg_nontype_cxx [...]
 create mode 100644 llvm/test/Analysis/BranchProbabilityInfo/deopt-invoke.ll
 create mode 100644 llvm/test/Analysis/BranchProbabilityInfo/unreachable.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi.mir
 create mode 100644 llvm/test/CodeGen/PowerPC/store-rightmost-vector-elt.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmin-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmerge-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslide1down-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwmacc-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwmacc-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv64.ll
 create mode 100644 llvm/test/CodeGen/Thumb2/schedm7-hazard.ll
 create mode 100644 llvm/test/CodeGen/VE/Vector/vec_and.ll
 delete mode 100644 llvm/test/Object/elf-unknown-type.test
 create mode 100644 llvm/test/TableGen/substr.td
 create mode 100644 llvm/test/Transforms/LoopDeletion/noop-loops-with-subloops.ll
 create mode 100644 mlir/docs/LLVMDialectMemRefConvention.md
 create mode 100644 mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLSLCanonicalization.h
 create mode 100644 mlir/include/mlir/IR/ImplicitLocOpBuilder.h
 create mode 100644 mlir/lib/Dialect/SPIRV/IR/SPIRVGLSLCanonicalization.cpp
 create mode 100644 mlir/test/Conversion/GPUCommon/lower-memcpy-to-gpu-runtime-calls.mlir
 create mode 100644 mlir/test/Dialect/SPIRV/Transforms/glsl_canonicalize.mlir
 create mode 100644 mlir/test/lib/Dialect/SPIRV/TestGLSLCanonicalization.cpp
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[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (9a7895dc208 -> 631501b1f90)