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from 9a604d610c6 [X86] Remove unnecessary BTmi/BTmr scheduler overrides new a86f87cfc71 [AArch64] Refactor cheap cost model new 3865b5ff69b [X86] Create schedule classes for BT(C|R|S)mi and BT(C|R|S) [...] new f8aaa5b2fb4 [x86] add tests for 256- and 512-bit vector types for scala [...]
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Summary of changes: lib/Target/AArch64/AArch64InstrInfo.cpp | 35 ++++--- lib/Target/X86/X86InstrInfo.td | 12 +-- lib/Target/X86/X86SchedBroadwell.td | 12 ++- lib/Target/X86/X86SchedHaswell.td | 12 ++- lib/Target/X86/X86SchedSandyBridge.td | 12 ++- lib/Target/X86/X86SchedSkylakeClient.td | 12 ++- lib/Target/X86/X86SchedSkylakeServer.td | 12 ++- lib/Target/X86/X86Schedule.td | 6 +- lib/Target/X86/X86ScheduleAtom.td | 10 +- lib/Target/X86/X86ScheduleBtVer2.td | 10 +- lib/Target/X86/X86ScheduleSLM.td | 12 ++- lib/Target/X86/X86ScheduleZnver1.td | 10 +- test/CodeGen/X86/load-scalar-as-vector.ll | 162 ++++++++++++++++++++++++++++++ 13 files changed, 256 insertions(+), 61 deletions(-)